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    Structure of packaging substrate having capacitor embedded therein and method for fabricating the same
    221.
    发明申请
    Structure of packaging substrate having capacitor embedded therein and method for fabricating the same 审中-公开
    其中包含电容器的封装衬底的结构及其制造方法

    公开(公告)号：US20080308309A1

    公开(公告)日：2008-12-18

    申请号：US11808962

    申请日：2007-06-14

    Applicant: Chung-Cheng Lien ,  Chih-Kui Yang

    Inventor： Chung-Cheng Lien ,  Chih-Kui Yang

    IPC: H05K1/16 ,  H05K3/10

    CPC classification number: H05K1/162 ,  H05K3/4644 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/09509 ,  H05K2201/09763 ,  H05K2203/0152 ,  H05K2203/0353 ,  H05K2203/0376 ,  H05K2203/0537 ,  H05K2203/1131 ,  Y10T29/49155

    Abstract: A structure of a packaging substrate having capacitors embedded therein is disclosed. The structure comprises a core substrate, a dielectric layer, and an outer circuit layer. The core substrate comprises an inner circuit layer. The dielectric layer is disposed at both sides of the core substrate, having first conductive vias each connecting to the inner circuit layer through a piece of outer electrode plate, a piece of high dielectric material layer, a piece of inner electrode plate, and a piece of adhesive layer, in sequence. The outer circuit layer is disposed on the surface of each of the dielectric layers. Herein, the capacitor is composed of a piece of the outer electrode plate, the high dielectric material layer and the inner electrode plate. The invention further comprises a method for manufacturing the same. This can achieve low costs, avoid the formation of voids, and reduce parasitic capacitance.

    Abstract translation: 公开了一种其中嵌有电容器的封装衬底的结构。 该结构包括芯基板，电介质层和外电路层。 芯基板包括内电路层。 电介质层设置在芯基板的两侧，具有通过一片外电极板，一片高电介质材料层，一片内电极板和一片连接到内电路层的第一导电通孔 的粘合剂层。 外电路层设置在每个电介质层的表面上。 这里，电容器由外电极板，高介电材料层和内电极板构成。 本发明还包括其制造方法。 这可以实现低成本，避免形成空隙，并减少寄生电容。

    Design of low inductance embedded capacitor layer connections
    222.
    发明授权
    Design of low inductance embedded capacitor layer connections 失效
    低电感嵌入式电容层连接设计

    公开(公告)号：US07456459B2

    公开(公告)日：2008-11-25

    申请号：US11516377

    申请日：2006-09-06

    Applicant: Lixi Wan

    Inventor： Lixi Wan

    IPC: H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119 ,  H01L29/04 ,  H01L29/12 ,  H01L31/036 ,  H01L31/112 ,  H01L29/786 ,  H01L29/80 ,  H01L29/00

    CPC classification number: H05K1/162 ,  H05K3/4644 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09618 ,  H05K2201/09763 ,  Y10S257/908

    Abstract: The present invention discloses capacitors having via connections and electrodes designed such that they provide a low inductance path, thus reducing needed capacitance, while enabling the use of embedded capacitors for power delivery and other uses. One embodiment of the present invention discloses a capacitor comprising the following: a top capacitor electrode and a bottom capacitor electrode, wherein the top electrode is smaller than the bottom electrode, comprising, on all sides of the capacitor; in an array, a multiplicity of vias located on all sides of the top and bottom capacitor electrodes, wherein the top electrode and the vias connecting to the top electrode act as an inner conductor, and the bottom electrode and the vias connecting to the bottom electrode act as an outer conductor.

    Abstract translation: 本发明公开了具有通孔连接和电极的电容器，其设计成使得它们提供低电感路径，从而减少所需的电容，同时能够使用嵌入式电容器进行功率输送和其它用途。 本发明的一个实施例公开了一种电容器，包括：顶部电容器电极和底部电容器电极，其中顶部电极小于底部电极，包括在电容器的所有侧面上; 在阵列中，位于顶部和底部电容器电极的所有侧面上的多个通孔，其中顶部电极和连接到顶部电极的通孔用作内部导体，并且底部电极和连接到底部电极的通孔 作为外部导体。

    Embedded capacitor
    223.
    发明申请
    Embedded capacitor 审中-公开
    嵌入式电容器

    公开(公告)号：US20080218932A1

    公开(公告)日：2008-09-11

    申请号：US11715651

    申请日：2007-03-08

    Applicant: Carl W. Berlin ,  Dwadasi H. R. Sarma ,  William J. Chappell ,  Eric E. Hoppenjans

    Inventor： Carl W. Berlin ,  Dwadasi H. R. Sarma ,  William J. Chappell ,  Eric E. Hoppenjans

    IPC: H01G7/04

    CPC classification number: H05K1/162 ,  H05K1/0306 ,  H05K1/0313 ,  H05K3/429 ,  H05K3/4611 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/09763 ,  Y10T29/435

    Abstract: An embedded capacitor method and system is provided for printed circuit boards. The capacitor structure is embedded within an insulator substrate, minimizes real-estate usage, provides a high capacitance, enhances capacitance density, and yet forms an advantageous planar surface topography. A cavity is defined within and contained by an insulator substrate layer, and a dielectric material at least partially fills the cavity. The dielectric material is connected to an electrical conductor, and vias are used for interconnections and traces. In an aspect, a plurality of stacked insulator substrate layers define a plurality of cavities filled with the dielectric material, providing even greater capacitance. In another aspect, an array of cavities is formed in the insulator substrate layer. The embedded capacitor can be employed within numerous systems that utilize capacitors including automotive electronics such as a pressure sensor, an engine control module, a transmission controller, and radio systems including satellite radio devices.

    Abstract translation: 为印刷电路板提供嵌入式电容器方法和系统。 电容器结构嵌入在绝缘体基板内，最小化不动产使用，提供高电容，增强电容密度，并形成有利的平面表面形貌。 空腔被限定在绝缘体衬底层内并由绝缘体衬底层包含，并且电介质材料至少部分地填充空腔。 介电材料连接到电导体，通孔用于互连和迹线。 在一个方面，多个堆叠的绝缘体衬底层限定了填充有电介质材料的多个空腔，提供了更大的电容。 在另一方面，在绝缘体基底层中形成空腔阵列。 嵌入式电容器可以用在许多使用诸如压力传感器，发动机控制模块，变速器控制器和包括卫星无线电设备的无线电系统的汽车电子产品的电容器的系统中。

    Capacitor and multi-layer board embedding the capacitor
    224.
    发明申请
    Capacitor and multi-layer board embedding the capacitor 审中-公开
    电容器和多层板嵌入电容器

    公开(公告)号：US20080158777A1

    公开(公告)日：2008-07-03

    申请号：US11979770

    申请日：2007-11-08

    Applicant: Seung Hyun Sohn ,  Yul Kyo Chung ,  Seung Eun Lee ,  Yee Na Shin

    Inventor： Seung Hyun Sohn ,  Yul Kyo Chung ,  Seung Eun Lee ,  Yee Na Shin

    IPC: H01G4/06 ,  H01G4/00

    CPC classification number: H05K1/162 ,  H01G4/232 ,  H01G4/30 ,  H01G4/33 ,  H05K1/0231 ,  H05K1/185 ,  H05K3/4644 ,  H05K2201/0179 ,  H05K2201/09509 ,  H05K2201/09763 ,  H05K2201/09781

    Abstract: There are provided a capacitor and a thin film capacitor-embedded multi-layer wiring board. The capacitor includes: first and second electrodes connected to first and second polarities; a dielectric layer formed therebetween; and at least one floating electrode disposed inside the dielectric layer and having overlaps with the first and second electrodes. The wiring board includes: an insulating body having a plurality of insulating layers thereon; a plurality of conductive patterns and conductive vias formed on the insulating layers, respectively, to constitute an interlayer circuit; and a thin film capacitor embedded in the insulating body, wherein the thin film capacitor includes a first electrode layer, a first dielectric layer, at least one floating electrode layer, a second dielectric layer and a second electrode layer sequentially formed, and wherein the first and second electrode layers are connected to the interlayer circuit and the floating electrode layer is not directly connected thereto.

    Abstract translation: 提供电容器和薄膜电容器嵌入式多层布线板。 电容器包括：连接到第一和第二极性的第一和第二电极; 在它们之间形成介电层; 以及至少一个浮置电极，其布置在电介质层的内部并与第一和第二电极重叠。 布线板包括：绝缘体，其上具有多个绝缘层; 分别形成在绝缘层上的多个导电图案和导电通孔，以构成层间电路; 以及嵌入在所述绝缘体中的薄膜电容器，其中所述薄膜电容器包括依次形成的第一电极层，第一电介质层，至少一个浮置电极层，第二电介质层和第二电极层，并且其中所述第一电极层 并且第二电极层连接到层间电路，并且浮动电极层不直接连接到其上。

    DIRECT APPLICATION VOLTAGE VARIABLE MATERIAL
    230.
    发明申请
    DIRECT APPLICATION VOLTAGE VARIABLE MATERIAL 有权
    直接应用电压可变材料

    公开(公告)号：US20070139848A1

    公开(公告)日：2007-06-21

    申请号：US11679064

    申请日：2007-02-26

    Applicant: Edwin Harris ,  Tushar Vyas ,  Timothy Pachla

    Inventor： Edwin Harris ,  Tushar Vyas ,  Timothy Pachla

    IPC: H02H9/06

    CPC classification number: H01C7/12 ,  H01G2/14 ,  H02H9/044 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/0298 ,  H05K1/0393 ,  H05K1/167 ,  H05K3/28 ,  H05K2201/0738 ,  H05K2201/09763

    Abstract: A first voltage variable material (“VVM”) includes an insulative binder, first conductive particles with a core and a shell held in the insulating binder and second conductive particles without a shell held in the insulating binder; a second VVM includes an insulating binder, first conductive particles with a core and a shell held in the insulating binder, second conductive particles without a shell held in the insulating binder, and semiconductive particles with a core and a shell held in the insulating binder; a third VVM includes only first conductive particles with a core and a shell held in the insulating binder.

    Abstract translation: 第一电压可变材料（“VVM”）包括绝缘粘合剂，具有芯和保持在绝缘粘合剂中的壳的第一导电颗粒和没有保持在绝缘粘合剂中的壳的第二导电颗粒; 第二VVM包括绝缘粘合剂，具有芯和保持在绝缘粘合剂中的壳的第一导电颗粒，没有保持在绝缘粘合剂中的壳的第二导电颗粒和保持在绝缘粘合剂中的芯和壳的半导体颗粒; 第三VVM仅包括具有芯和保持在绝缘粘合剂中的壳的第一导电颗粒。

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