公开(公告)号：US09345132B2

公开(公告)日：2016-05-17

申请号：US13761172

申请日：2013-02-07

Applicant: Yu-Ru Chang ,  Yu-Fang Hsia ,  Ling-Chih Chou

Inventor： Yu-Ru Chang ,  Yu-Fang Hsia ,  Ling-Chih Chou

IPC: H05K1/03 ,  H05K1/02 ,  H01L23/498 ,  H01L23/60

CPC classification number: H05K1/0298 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/60 ,  H01L2924/0002 ,  H05K1/0286 ,  H05K1/11 ,  H05K1/18 ,  H05K3/10 ,  H05K3/22 ,  H05K3/4694 ,  H05K2201/09127 ,  H05K2201/09972 ,  H05K2203/0228 ,  Y10T29/49155 ,  H01L2924/00

Abstract: The present invention discloses a package substrate layout design to achieve multiple substrate functions for engineering development and verification. The substrate layout contains a connection structure to connect to a plurality of power/ground domains on the package substrate. With different combination of the cutting lines on the package substrate, the invention can achieve multiple substrate functions without impacting the customer's PCB or system board design and provide cost effective and fast cycle time for engineering development phase.

Abstract translation: 本发明公开了一种封装基板布局设计，以实现用于工程开发和验证的多个基板功能。 衬底布局包含连接到封装衬底上的多个电源/接地区域的连接结构。 通过封装基板上切割线的不同组合，本发明可以实现多种基板功能，而不会影响客户的PCB或系统板设计，并为工程开发阶段提供成本效益和快速的周期时间。

公开(公告)号：US20160081201A1

公开(公告)日：2016-03-17

申请号：US14937337

申请日：2015-11-10

Applicant: Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd.

Inventor： Dror Hurwitz

IPC: H05K3/46 ,  H05K9/00 ,  H05K3/42

CPC classification number: H05K3/4644 ,  H01L2924/0002 ,  H01P3/06 ,  H01P3/085 ,  H05K1/0221 ,  H05K1/0242 ,  H05K3/429 ,  H05K3/4647 ,  H05K9/0024 ,  H05K2201/0723 ,  H05K2201/09618 ,  H05K2201/09672 ,  H05K2201/0979 ,  H05K2201/09972 ,  Y10T29/49165 ,  H01L2924/00

Abstract: A multilayer electronic support structure including at least one metallic component encapsulated in a dielectric material, and comprising at least one faraday barrier to shield the at least one metallic component from interference from external electromagnetic fields and to prevent electromagnetic emission from the metallic component.

公开(公告)号：US09232629B2

公开(公告)日：2016-01-05

申请号：US13564503

申请日：2012-08-01

Applicant: Shinichi Jingama ,  Kengo Aburaya ,  Hideki Nakazato ,  Kazumasa Sakata ,  Shinya Saito

Inventor： Shinichi Jingama ,  Kengo Aburaya ,  Hideki Nakazato ,  Kazumasa Sakata ,  Shinya Saito

IPC: H05K1/00 ,  H05K1/02 ,  H05K3/44

CPC classification number: H05K1/0203 ,  H05K3/44 ,  H05K2201/09972 ,  H05K2203/0242 ,  H05K2203/175

Abstract: Provided is a metal core board which has a preferable function for a vehicle-mountable junction box, specifically, is reduced in size or improved in mounting efficiency. A metal core board for a vehicle-mountable junction box, which is mountable on the vehicle-mountable junction box, wherein a core plate forming an intermediate layer of the metal core board has a plurality of slits and an island surrounded by separating connection parts present between the slits; and in the state where the island is held between insulating layers stacked on both of two surfaces of the core plate, through-bores 46 are formed at the separating connection parts to remove the separating connection parts and the island is made electrically independent from a remaining part of the core plate while being held between the insulating layers. Thus, a plurality of circuits can be formed.

Abstract translation: 本发明提供一种对车载接线盒具有优选功能的金属芯板，具体地说是减小了尺寸或提高了安装效率。 一种用于车载接线盒的金属芯板，其可安装在车载接线盒上，其中形成金属芯板的中间层的芯板具有多个狭缝和由分离的连接部分所包围的岛状物 在狭缝之间; 并且在岛被保持在堆叠在芯板的两个表面的绝缘层之间的状态下，在分离连接部分处形成通孔46以去除分离连接部分，并且使岛与剩余的电气独立 夹持在绝缘层之间的芯板的一部分。 因此，可以形成多个电路。

公开(公告)号：US20150282325A1

公开(公告)日：2015-10-01

申请号：US14672611

申请日：2015-03-30

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Tomoharu Fujii

IPC: H05K1/18 ,  H05K1/14 ,  H05K1/11

CPC classification number: G01R31/2818 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2924/15192 ,  H01L2924/19105 ,  H05K1/0268 ,  H05K3/0052 ,  H05K2201/09036 ,  H05K2201/09127 ,  H05K2201/0989 ,  H05K2201/09972 ,  H05K2203/175

Abstract: A semiconductor device includes a board, an electronic component, an evaluation component, a wiring, and a groove portion. The board includes a product area, a non-product area, and a boundary area between the product area and the non-product area. The electronic component is mounted in the product area. The evaluation component is mounted in the non-product area. The wiring electrically connects the electronic component and the evaluation component. The groove portion is formed in the boundary area of the board so as to overlap at least a part of the wiring in a plan view. The non-product area is surrounded by the groove portion and at least a portion of sides of the board.

Abstract translation: 半导体器件包括板，电子元件，评估元件，布线和槽部。 董事会包括产品区域，非产品区域和产品区域与非产品区域之间的边界区域。 电子部件安装在产品区域。 评估组件安装在非产品区域。 布线将电子部件和评估部件电连接。 凹槽部分形成在板的边界区域中，以在平面图中与布线的至少一部分重叠。 非产品区域被槽部分和板的至少一部分侧面包围。

公开(公告)号：US09137934B2

公开(公告)日：2015-09-15

申请号：US13189838

申请日：2011-07-25

Applicant: Thomas Scott Morris ,  Ulrik Riis Madsen ,  Brian D. Sawyer ,  Milind Shah ,  John Robert Siomkos ,  Mark Alan Crandall ,  Dan Carey

Inventor： Thomas Scott Morris ,  Ulrik Riis Madsen ,  Brian D. Sawyer ,  Milind Shah ,  John Robert Siomkos ,  Mark Alan Crandall ,  Dan Carey

IPC: H05K3/30 ,  H05K9/00 ,  H05K1/02 ,  H05K3/28

CPC classification number: H05K9/0024 ,  H05K1/0218 ,  H05K3/284 ,  H05K2201/0715 ,  H05K2201/09972 ,  Y10T29/49155

Abstract: Embodiments include devices and methods for manufacturing a module having a first shielded compartment and a second shielded compartment, wherein the first shielded compartment is electrically isolated from the second shielded compartment. Electrical conductivity is controlled in a manner in which current flow between shielded circuits is directed to reduce or eliminate energy from being coupled between one or more shielded compartments on the same module. Each module may have a plurality of individual shielded compartments, where each compartment has a dedicated ground plane. The shields for each compartment may be tied to the dedicated ground plane of the compartment. Because the dedicated ground planes are not tied together, each of the shielded compartments on the modules remains isolated from all the other shielded compartments on the modules. In some embodiments having a plurality of shielded compartments, there is at least one isolated shielded compartment depending upon the design needs of the module.

Abstract translation: 实施例包括用于制造具有第一屏蔽室和第二屏蔽隔室的模块的装置和方法，其中第一屏蔽室与第二屏蔽室电隔离。 控制电导率的方式是使屏蔽电路之间的电流流动被引导以减少或消除能量耦合在同一模块上的一个或多个屏蔽隔间之间。 每个模块可以具有多个单独的屏蔽隔室，其中每个隔间具有专用的接地平面。 每个隔间的护罩可以连接到隔间的专用接地平面。 由于专用接地层并未连接在一起，模块上的每个屏蔽隔间都与模块上所有其他屏蔽隔离隔离。 在具有多个屏蔽隔室的一些实施例中，根据模块的设计需要，存在至少一个隔离隔离室。

公开(公告)号：US20150257271A1

公开(公告)日：2015-09-10

申请号：US14718704

申请日：2015-05-21

Applicant: BROADCOM CORPORATION

Inventor： Iain Barnett ,  William Michael James Holland ,  Jonathan Ephraim David Hurwitz

IPC: H05K1/16 ,  G01R19/175 ,  H03H7/00

CPC classification number: H05K1/162 ,  G01R15/06 ,  G01R15/16 ,  G01R19/12 ,  G01R19/175 ,  H03H7/004 ,  H05K1/0239 ,  H05K1/0256 ,  H05K2201/09309 ,  H05K2201/09972

Abstract: A signal level crossing detector circuit includes a DC isolator and a detector circuit. The DC isolator has at least a first input, which is operable to receive a high voltage AC signal, and at least a first capacitor, a first plate of the first capacitor being electrically connected to the first input. The detector circuit is operable at a low voltage and has at least a first detector input, the first detector input being electrically connected to a second plate of the first capacitor, the low voltage detector circuit being operable to provide a change in output signal in dependence on a high voltage AC signal on the first input crossing a predetermined signal level. The signal level crossing detector may be single ended or differential.

Abstract translation: 信号电平交叉检测器电路包括直流隔离器和检测器电路。 DC隔离器具有至少第一输入，其可操作以接收高压AC信号，以及至少第一电容器，第一电容器的第一板电连接到第一输入端。 检测器电路可在低电压下操作并且具有至少第一检测器输入，第一检测器输入电连接到第一电容器的第二板，低电压检测器电路可操作以依次提供输出信号的变化 在第一输入端上的高电压AC信号上穿过预定的信号电平。 信号电平交叉检测器可以是单端或差分。

公开(公告)号：US20150241006A1

公开(公告)日：2015-08-27

申请号：US14606013

申请日：2015-01-26

Applicant: Gerald Edward BRIGGS

Inventor： Gerald Edward BRIGGS

IPC: F21S4/00 ,  F21K99/00 ,  F21V23/04 ,  H05B33/08 ,  F21V23/00

CPC classification number: H05B33/0827 ,  F21K9/60 ,  F21K99/00 ,  F21S4/20 ,  F21V23/005 ,  F21V23/04 ,  F21Y2105/10 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L33/62 ,  H01L2924/0002 ,  H05B33/0803 ,  H05B33/0845 ,  H05B33/0857 ,  H05K1/05 ,  H05K2201/09309 ,  H05K2201/09972 ,  H05K2201/10106 ,  H01L2924/00

Abstract: A LED based lighting apparatus is disclosed. The light engine used in the lighting apparatus may use a multi-layer metal core printed circuit board and have a plurality of LED groups that are independently controllable by a control unit. The power supply input and return paths connected to each LED group may be implemented on different layers to allow a compact footprint that may be used with traditional fluorescent encasements with relatively little modification.

Abstract translation: 公开了一种基于LED的照明装置。 在照明装置中使用的光引擎可以使用多层金属芯印刷电路板，并且具有可由控制单元独立控制的多个LED组。 连接到每个LED组的电源输入和返回路径可以在不同的层上实现，以允许紧凑的占地面积可以与具有相对较少修改的传统荧光灯罩一起使用。

公开(公告)号：US20150223339A1

公开(公告)日：2015-08-06

申请号：US14685747

申请日：2015-04-14

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Hideyo NAKAMURA ,  Masafumi HORIO

IPC: H05K1/18 ,  H05K7/20 ,  H01L23/31 ,  H05K1/02 ,  H01L23/00 ,  H01L25/07

CPC classification number: H05K1/181 ,  H01L21/565 ,  H01L23/04 ,  H01L23/3107 ,  H01L23/3735 ,  H01L23/49833 ,  H01L24/17 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/30107 ,  H05K1/0212 ,  H05K1/0243 ,  H05K1/0296 ,  H05K3/3447 ,  H05K7/2089 ,  H05K2201/0364 ,  H05K2201/06 ,  H05K2201/09972 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: A semiconductor device, while being small, makes it possible to achieve low inductance responding to high speed switching. The semiconductor device includes a plurality of conductive pattern members, on each of which is mounted one or a plurality of power semiconductor chips, and a printed circuit board wherein a chip rod-form conductive connection member connected to the power semiconductor chip and a pattern rod-form conductive connection member connected to the conductive pattern member are disposed on the surface opposing the conductive pattern member. The conductive pattern member is formed of a narrow portion and a wide portion, the narrow portion of at least one conductive pattern member and the printed circuit board are connected by the pattern rod-form conductive connection member, and a current path is formed between the conductive pattern member and the power semiconductor chip connected via the chip rod-form conductive connection member to the printed circuit board.

Abstract translation: 半导体器件虽然小，但可以实现响应于高速开关的低电感。 半导体器件包括多个导电图案构件，每个导电图案构件安装有一个或多个功率半导体芯片，以及印刷电路板，其中连接到功率半导体芯片的芯片棒状导电连接构件和图案棒 连接到导电图案构件的导电连接构件设置在与导电图案构件相对的表面上。 导电图案构件由狭窄部分和宽部分形成，至少一个导电图案构件的窄部分和印刷电路板通过图案棒状导电连接构件连接，并且电流路径形成在 导电图案构件和通过芯片棒状导电连接构件连接到印刷电路板的功率半导体芯片。

公开(公告)号：US20150116967A1

公开(公告)日：2015-04-30

申请号：US14518082

申请日：2014-10-20

Applicant: KYOCERA Circuit Solutions, Inc.

Inventor： Mitsuzo YOKOYAMA

IPC: H05K1/11 ,  H05K3/40 ,  H05K1/18

CPC classification number: H05K3/3452 ,  H01L2224/16225 ,  H01L2924/15174 ,  H05K1/113 ,  H05K3/3436 ,  H05K3/4007 ,  H05K3/4644 ,  H05K2201/0191 ,  H05K2201/09972 ,  Y10T29/49124

Abstract: Provided is a wiring board including: an insulating board having a mounting portion configured such that a semiconductor element is mounted on an upper surface thereof; a semiconductor element connection pad formed on the mounting portion; a conductor pillar formed on the semiconductor element connection pad; and a solder resist layer adhered on the insulating board. The solder resist layer has a first region with a thickness such that the semiconductor element connection pad and a lower end portion of the conductor pillar are embedded while an upper end portion of the conductor pillar protrudes, and a second region having a thickness larger than that of the first region and surrounding the first region.

Abstract translation: 本发明提供一种布线基板，包括：绝缘基板，具有将半导体元件安装在其上表面上的安装部， 形成在所述安装部上的半导体元件连接焊盘; 形成在所述半导体元件连接焊盘上的导体柱; 以及粘附在绝缘板上的阻焊层。 阻焊层具有第一区域，其厚度使得半导体元件连接焊盘和导体柱的下端部分嵌入，同时导体柱的上端部突出，并且具有大于该导体柱的厚度的第二区域 的第一个地区，并围绕第一个地区。

公开(公告)号：US20150114815A1

公开(公告)日：2015-04-30

申请号：US14525166

申请日：2014-10-27

Applicant: TPK Touch Systems (Xiamen) Inc.

Inventor： Chen-Hsin Chang ,  Che-I Wu ,  Zhihong Ke ,  Lixian Chen ,  Wenzhi Qian

IPC: H03K17/96 ,  H05K3/46

CPC classification number: H05K3/46 ,  G06F3/044 ,  G06F2203/04103 ,  H03K17/9622 ,  H03K2217/96015 ,  H03K2217/960755 ,  H05K1/0274 ,  H05K3/28 ,  H05K2201/09972

Abstract: The present disclosure provides a touch panel, including a substrate, at least one sensing electrode layer, a wire layer, a first light-shielding layer and a second light-shielding layer. The substrate has a visible region and a non-visible region. The wire layer corresponds to the non-visible region, wherein the wire layer includes signal lines and at least one gap therebetween, the signal lines electrically connect the sensing electrode layer. The first light-shielding layer is disposed within the non-visible region and between the substrate and the wire layer, wherein the first light-shielding layer includes at least one recess and a position of the recess corresponds to a position of the gap. The second light-shielding layer corresponds to the recess, wherein an area covered by the second light-shielding layer is equal to or greater than an aperture of the recess. The present disclosure also provides a method for manufacturing a touch panel.

Abstract translation: 本公开提供一种触摸面板，包括基板，至少一个感测电极层，线层，第一遮光层和第二遮光层。 基板具有可见区域和不可见区域。 线层对应于不可见区域，其中线层包括信号线及其间的至少一个间隙，信号线电连接感测电极层。 第一遮光层设置在不可见区域内和衬底与线层之间，其中第一遮光层包括至少一个凹部，凹部的位置对应于间隙的位置。 第二遮光层对应于凹部，其中被第二遮光层覆盖的面积等于或大于凹部的孔径。 本公开还提供了一种用于制造触摸面板的方法。