公开(公告)号：US20160093598A1

公开(公告)日：2016-03-31

申请号：US14804880

申请日：2015-07-21

Applicant: Cha-jea JO ,  Yun-hyeok IM ,  Tae-je CHO

Inventor： Cha-jea JO ,  Yun-hyeok IM ,  Tae-je CHO

IPC: H01L25/18 ,  H01L23/367 ,  H01L23/31 ,  H01L23/48 ,  H01L25/065

CPC classification number: H01L25/18 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/427 ,  H01L23/481 ,  H01L23/53223 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L25/0652 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/16195

Abstract: A semiconductor package includes a package base substrate, at least one first semiconductor chip disposed on the package base substrate, and at least one stacked semiconductor chip structure disposed on the package base substrate adjacent to the at least one first semiconductor chip. The at least one stacked semiconductor chip includes a plurality of second semiconductor chips. A penetrating electrode region including a plurality of penetrating electrodes is disposed adjacent to an edge of the at least one stacked semiconductor chip structure.

Abstract translation: 半导体封装包括封装基底基板，设置在封装基底基板上的至少一个第一半导体芯片以及设置在与该至少一个第一半导体芯片相邻的封装基底基板上的至少一个层叠半导体芯片结构。 所述至少一个层叠半导体芯片包括多个第二半导体芯片。 包括多个穿透电极的穿透电极区域设置成与所述至少一个堆叠的半导体芯片结构的边缘相邻。

公开(公告)号：US20140168902A1

公开(公告)日：2014-06-19

申请号：US14088482

申请日：2013-11-25

Applicant: Kyol PARK ,  Yun-Hyeok IM

Inventor： Kyol PARK ,  Yun-Hyeok IM

IPC: H05K1/02

CPC classification number: H01L23/3675 ,  H01L21/561 ,  H01L23/367 ,  H01L23/3677 ,  H01L24/83 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/8385 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/0209 ,  H05K3/284 ,  H05K3/30 ,  H05K2201/0215 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor package includes a circuit board having an inner circuit pattern and a plurality of contact pads connected to the inner circuit pattern, at least one integrated circuit (IC) device on the circuit board and making contact with the contact pads, a mold on the circuit board, the mold fixing the IC device to the circuit board, and a surface profile modifier on a surface of the IC device and a surface of the mold, and the surface profile modifier enlarging a surface area of the IC device and the mold to dissipate heat.

Abstract translation: 半导体封装包括具有内部电路图案和连接到内部电路图案的多个接触焊盘的电路板，电路板上的至少一个集成电路（IC）装置并与接触焊盘接触，模具在 电路板，将IC器件固定到电路板上的模具，以及IC器件表面和模具表面上的表面轮廓改性剂，以及将IC器件和模具的表面积扩大的表面轮廓修改器 散热

公开(公告)号：US20130134606A1

公开(公告)日：2013-05-30

申请号：US13587330

申请日：2012-08-16

Applicant: Yun-hyeok IM ,  Won-keun KIM ,  Tae-Je CHO ,  Kyol PARK

Inventor： Yun-hyeok IM ,  Won-keun KIM ,  Tae-Je CHO ,  Kyol PARK

IPC: H01L23/29 ,  H01L23/48

CPC classification number: H01L25/0657 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/367 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/10126 ,  H01L2224/10156 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2929 ,  H01L2224/29386 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83007 ,  H01L2224/83104 ,  H01L2224/83192 ,  H01L2224/83851 ,  H01L2224/83887 ,  H01L2224/83888 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/0665 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

Abstract: A semiconductor package may include a substrate including a substrate pad on a top surface thereof; at least one semiconductor chip including a connection terminal electrically connected to the substrate on an active surface thereof, and mounted on the substrate; a heat release pattern formed between the substrate and the at least one semiconductor chip and configured to generate heat; and underfill resin underfilled between the substrate and the at least one semiconductor chip and comprising fillers. A semiconductor package may include a substrate including a substrate pad on a top surface thereof and a first heat release pattern configured to generate heat, and a semiconductor chip including a bonding pad formed on an active surface facing the substrate and a second heat release pattern configured to generate heat.

Abstract translation: 半导体封装可以包括在其顶表面上包括衬底焊盘的衬底; 至少一个半导体芯片，包括在其有源表面上电连接到所述衬底的连接端子，并且安装在所述衬底上; 形成在所述基板和所述至少一个半导体芯片之间并被配置为产生热量的散热图案; 以及在所述基底和所述至少一个半导体芯片之间未填充的底部填充树脂，并且包括填料。 半导体封装可以包括：衬底，其包括在其顶表面上的衬底焊盘和被配置为产生热量的第一散热图案;以及半导体芯片，其包括形成在与衬底相对的有源表面上的焊盘，以及第二散热图案， 产生热量。

公开(公告)号：US07388286B2

公开(公告)日：2008-06-17

申请号：US11313721

申请日：2005-12-22

Applicant: Sang-uk Kim ,  Yun-hyeok Im

Inventor： Sang-uk Kim ,  Yun-hyeok Im

IPC: H01L23/10

CPC classification number: H01L23/4334 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package comprising a semiconductor chip and a first heat spreader adhered to the upper surface of the semiconductor chip is provided. The first heat spreader comprises a flat metal plate and a plurality of metal balls adhered to the flat metal plate. A method of fabricating the semiconductor chip package is also provided.

Abstract translation: 提供了包括半导体芯片和粘附到半导体芯片的上表面的第一散热器的半导体封装。 第一散热器包括平板金属板和粘附到平板金属板上的多个金属球。 还提供了制造半导体芯片封装的方法。

公开(公告)号：US20070216016A1

公开(公告)日：2007-09-20

申请号：US11585962

申请日：2006-10-25

Applicant: Yun-Hyeok Im ,  Dong-Han Kim ,  Jae-Wook Yoo

Inventor： Yun-Hyeok Im ,  Dong-Han Kim ,  Jae-Wook Yoo

IPC: H01L23/52

CPC classification number: H01L23/4334 ,  H01L23/49572 ,  H01L24/50 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/181 ,  H01L2924/00

Abstract: A tape carrier package may include an interposer having a first surface and a second surface. The first surface of the interposer may be attached to an exposed active surface of a semiconductor chip. A heat sink may be attached to the second surface of the interposer.

Abstract translation: 带状载体封装可以包括具有第一表面和第二表面的插入件。 插入器的第一表面可以附接到半导体芯片的暴露的有源表面。 散热器可以附接到插入件的第二表面。

公开(公告)号：US20060145316A1

公开(公告)日：2006-07-06

申请号：US11313721

申请日：2005-12-22

Applicant: Sang-uk Kim ,  Yun-hyeok Im

Inventor： Sang-uk Kim ,  Yun-hyeok Im

IPC: H01L23/495

CPC classification number: H01L23/4334 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package comprising a semiconductor chip and a first heat spreader adhered to the upper surface of the semiconductor chip is provided. The first heat spreader comprises a flat metal plate and a plurality of metal balls adhered to the flat metal plate. A method of fabricating the semiconductor chip package is also provided.

Abstract translation: 提供了包括半导体芯片和粘附到半导体芯片的上表面的第一散热器的半导体封装。 第一散热器包括平板金属板和粘附到平板金属板上的多个金属球。 还提供了制造半导体芯片封装的方法。

公开(公告)号：US20060012019A1

公开(公告)日：2006-01-19

申请号：US11173852

申请日：2005-06-30

Applicant: Suk-Chae Kang ,  Si-Hoon Lee ,  Sa-Yoon Kang ,  Dong-Han Kim ,  Yun-Hyeok Im ,  Gu-Sung Kim

Inventor： Suk-Chae Kang ,  Si-Hoon Lee ,  Sa-Yoon Kang ,  Dong-Han Kim ,  Yun-Hyeok Im ,  Gu-Sung Kim

IPC: H01L23/02

CPC classification number: H01L23/3675 ,  H01L23/13 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/12044 ,  H01L2924/15312 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package includes a semiconductor chip, a circuit board at which a wire pattern is formed, and a metal structure including a portion inserted through an opening of the circuit board and upon which the semiconductor chip rests. With the semiconductor chip in direct contact with the metal structure, thermal characteristics improve. With the circuit board supported by the metal structure, mechanical stability improves.

Abstract translation: 半导体封装包括半导体芯片，形成有线图形的电路板，以及包括插入电路板的开口部分的半导体芯片所在的金属结构体。 随着半导体芯片与金属结构直接接触，热特性得到改善。 由于电路板由金属结构支撑，机械稳定性提高。

公开(公告)号：US06756668B2

公开(公告)日：2004-06-29

申请号：US10232344

申请日：2002-08-30

Applicant: Joong-Hyun Baek ,  Ho-Jeong Moon ,  Dong-Kil Shin ,  Yun-Hyeok Im

Inventor： Joong-Hyun Baek ,  Ho-Jeong Moon ,  Dong-Kil Shin ,  Yun-Hyeok Im

IPC: H01L2312

CPC classification number: H01L23/433 ,  H01L24/31 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/15312 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/00

Abstract: A semiconductor package and a method for forming the same are provided. The semiconductor package comprises a chip having an active surface and a back surface. The semiconductor package further comprises a substrate having an upper surface and a lower surface opposite the upper surface. The chip is electrically connected to the upper surface of the substrate. A lid is thermally coupled to the back surface of the chip. A thermal interface material (TIM) is located between the chip and the lid. The TIM includes voids to reduce thermomechanical stresses applied on the chip and the TIM, thereby preventing package cracks.

公开(公告)号：US07372148B2

公开(公告)日：2008-05-13

申请号：US11274588

申请日：2005-11-14

Applicant: Yun-Hyeok Im ,  Jae-Wook Yoo ,  Hee-Seok Lee

Inventor： Yun-Hyeok Im ,  Jae-Wook Yoo ,  Hee-Seok Lee

IPC: H01L23/34

CPC classification number: H01L24/32 ,  H01L23/3128 ,  H01L23/473 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention relates to a semiconductor chip coolant path, a semiconductor package utilizing the semiconductor chip coolant path, and a cooling system for the semiconductor package. For effective dissipation of heat generated during semiconductor chip operation, a semiconductor chip having a coolant path formed through or adjacent to its backside and a semiconductor package utilizing the semiconductor chip are provided. In addition, a cooling system for the semiconductor package circulates a coolant through the coolant path within the semiconductor package to directly contact and cool the semiconductor chip.

Abstract translation: 本发明涉及半导体芯片冷却剂路径，利用半导体芯片冷却剂路径的半导体封装以及半导体封装的冷却系统。 为了有效消散在半导体芯片操作期间产生的热量，提供了具有形成在其背面或靠近其背面的冷却剂通道的半导体芯片以及利用半导体芯片的半导体封装。 此外，用于半导体封装的冷却系统使冷却剂循环通过半导体封装内的冷却剂路径，以直接接触和冷却半导体芯片。

公开(公告)号：US20070108599A1

公开(公告)日：2007-05-17

申请号：US11477547

申请日：2006-06-30

Applicant: Yun-Hyeok Im ,  Jae-Wook Yoo

Inventor： Yun-Hyeok Im ,  Jae-Wook Yoo

IPC: H01L23/34

CPC classification number: H01L23/3675 ,  H01L23/142 ,  H01L23/3128 ,  H01L23/4334 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor chip package includes: a metal substrate having a core; a semiconductor chip mounted on the metal substrate; and a heat sink extending from the core.

Abstract translation: 半导体芯片封装包括：具有芯的金属基板; 安装在所述金属基板上的半导体芯片; 以及从芯延伸的散热片。