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50 条记录 (耗时 0.028 秒)

    Demountable and repairable low pitch interconnect for stacked multichip modules
    24.
    发明授权
    Demountable and repairable low pitch interconnect for stacked multichip modules 失效
    用于堆叠多芯片模块的可拆卸和可修复的低间距互连

    公开(公告)号：US5857858A

    公开(公告)日：1999-01-12

    申请号：US773625

    申请日：1996-12-23

    申请人： Bernard Gorowitz ,  Robert John Wojnarowski ,  Ronald Frank Kolc

    发明人： Bernard Gorowitz ,  Robert John Wojnarowski ,  Ronald Frank Kolc

    IPC分类号： H01L25/065 ,  H05K1/14 ,  H05K3/32 ,  H05K3/40 ,  H05K1/11

    CPC分类号： H05K3/325 ,  H01L25/0652 ,  H05K1/144 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K3/403

    摘要： Connection elements which, for example, may be used to facilitate interconnection to and stacking of electronic assemblies or may include an elongated conductive core, such as a wire or a hollow tube structure, coated with a layer of elastomeric material containing conductive particle such that the elastomeric material is conductive at least when compressed. The substrates of multi-chip modules (MCMs) have electrical connection sites in the form of metal-lined channels in the substrate edges, and the connection elements are pressed into the channels. Separate compression or clamping elements may be employed to enhance conductivity, as well as to facilitate external connections. The elongated conductive core may take the form of a hollow tube structure which may be expanded under internal pressure to compress the layer of elastomeric material. The compression elements may take the form of printed circuit boards. In alternative embodiments the connection elements may be clamped between conductive channels of side-by-side substrates or between opposed conductive channels of stacked substrates.

    摘要翻译： 连接元件例如可用于促进电子组件的互连和堆叠，或者可以包括细长导电芯，例如线或中空管结构，涂覆有包含导电颗粒的弹性体材料层，使得 至少在压缩时弹性材料是导电的。 多芯片模块（MCM）的基板在基板边缘中具有金属衬里通道形式的电连接位置，并且连接元件被压入通道中。 可以使用单独的压缩或夹紧元件来增强导电性，并且便于外部连接。 细长导电芯可以采取中空管结构的形式，其可以在内部压力下膨胀以压缩弹性体材料层。 压缩元件可以采用印刷电路板的形式。 在替代实施例中，连接元件可以被夹持在并排衬底的导电沟道之间或层叠衬底的相对的导电沟道之间。

    Semiconductor interconnect method and structure for high temperature applications
    27.
    发明授权
    Semiconductor interconnect method and structure for high temperature applications 失效
    半导体互连方法和结构用于高温应用

    公开(公告)号：US5672546A

    公开(公告)日：1997-09-30

    申请号：US566624

    申请日：1995-12-04

    申请人： Robert John Wojnarowski

    发明人： Robert John Wojnarowski

    IPC分类号： H01L21/98 ,  H01L23/538 ,  H01L21/60

    CPC分类号： H01L25/50 ,  H01L23/5381 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/24137 ,  H01L2224/24225 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48472 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165

    摘要： A method for interconnecting at least one semiconductor chip (14 or 36) having chip pads (16 or 38) includes applying a removable polymer layer (22 or 44) over the chip; forming vias (26 or 50) in the polymer layer aligned with predetermined chip pads; depositing a pattern of electrical conductors (28 or 52) over the polymer layer and into the vias; and removing the polymer layer. Prior to applying the polymer layer, the chip can be attached to a substrate by attaching a backside of the chip in a substrate chip well using a high temperature chip attach material (12) or by inserting the chip in a through hole of the substrate and applying a metallization plane (54) supporting the backside of the chip and at least a portion of the substrate. The substrate can have substrate metallization (18 or 42) substantially planar to the chip pads with the step of applying the polymer layer over the at least one semiconductor chip including applying the removable polymer layer over the substrate, and the step of forming vias in the polymer layer including forming vias aligned with predetermined portions of the substrate metallization.

    摘要翻译： 用于互连至少一个具有芯片焊盘（16或38）的半导体芯片（14或36）的方法包括在芯片上施加可移除的聚合物层（22或44） 在与预定的芯片焊盘对准的聚合物层中形成通孔（26或50） 将电导体（28或52）的图案沉积在聚合物层上并进入通孔中; 并除去聚合物层。 在施加聚合物层之前，可以使用高温芯片附着材料（12）或通过将芯片插入基板的通孔中将芯片背面附着在基板芯片中，将芯片附接到基板，以及 施加支撑芯片的背面的金属化平面（54）以及衬底的至少一部分。 衬底可以具有与芯片焊盘基本上平面的衬底金属化（18或42），其中将聚合物层施加在至少一个半导体芯片上的步骤包括在衬底上施加可除去的聚合物层，以及在衬底中形成通孔的步骤 聚合物层包括与衬底金属化的预定部分对准的形成通孔。

    DEVICES FOR THERMAL TRANSFER AND POWER GENERATION AND SYSTEM AND METHOD INCORPORATING SAME
    29.
    发明申请
    DEVICES FOR THERMAL TRANSFER AND POWER GENERATION AND SYSTEM AND METHOD INCORPORATING SAME 有权
    用于热传递和发电的装置以及与之并入的系统和方法

    公开(公告)号：US20090078298A1

    公开(公告)日：2009-03-26

    申请号：US12328788

    申请日：2008-12-05

    申请人： Stanton Earl Weave, JR. ,  Robert John Wojnarowski

    发明人： Stanton Earl Weave, JR. ,  Robert John Wojnarowski

    IPC分类号： H01L35/34

    CPC分类号： H01L35/32 ,  Y10T156/1092

    摘要： A device includes first and second electrically conductive substrates that are positioned opposite from one another. The device also includes a sealing layer disposed between the first and second electrically conductive substrates and a plurality of hollow structures having a conductive material, wherein the plurality of hollow structures is contained by the sealing layer between the first and second electrically conductive substrates.

    摘要翻译： 一种器件包括彼此相对定位的第一和第二导电衬底。 该装置还包括设置在第一和第二导电基底之间的密封层和具有导电材料的多个中空结构，其中多个中空结构由第一和第二导电基底之间的密封层包含。

    Device for solid state thermal transfer and power generation
    30.
    发明授权
    Device for solid state thermal transfer and power generation 有权
    固态热转印和发电装置

    公开(公告)号：US07498507B2

    公开(公告)日：2009-03-03

    申请号：US11081986

    申请日：2005-03-16

    申请人： Stanton Earl Weaver, Jr. ,  Robert John Wojnarowski

    发明人： Stanton Earl Weaver, Jr. ,  Robert John Wojnarowski

    IPC分类号： H01L35/30 ,  H02N10/00

    CPC分类号： H01L35/32 ,  Y10T156/1092

    摘要： A solid state thermal transfer device includes first and second electrically conductive substrates that are positioned opposite from one another. The solid state thermal transfer device also includes a sealing layer disposed between the first and second electrically conductive substrates and a plurality of hollow structures having a conductive material, wherein the plurality of hollow structures is contained by the sealing layer between the first and second electrically conductive substrates.

    摘要翻译： 固态热转印装置包括彼此相对定位的第一和第二导电基板。 固态热转移装置还包括设置在第一和第二导电基板之间的密封层和具有导电材料的多个中空结构，其中多个中空结构由第一和第二导电 底物。