公开(公告)号：US10354958B2

公开(公告)日：2019-07-16

申请号：US14503962

申请日：2014-10-01

申请人： Michael B. Vincent

发明人： Michael B. Vincent

IPC分类号： H01L21/311 ,  H01L23/538 ,  H01L21/56 ,  H01L23/00 ,  H01L25/16 ,  H01L25/03 ,  H01L23/498 ,  H01L23/552

摘要： A method and apparatus are provided for manufacturing a packaged electronic device (3) having pre-formed and placed through package circuit devices (35) which include an embedded circuit component (39) and conductor terminals (37A, 37B) extending from a molded package (38) embedding the circuit component (39). The through package circuit devices (35) are placed on end with integrated circuit die (34) and encapsulated in a molded device package (32) which leaves exposed the one or more conductor terminals (37A, 37B) positioned on first and second surfaces of the through package circuit device, where the conductor terminals (37A, 37B) and embedded circuit component (39) form a circuit path through the molded device package.

公开(公告)号：US09111870B2

公开(公告)日：2015-08-18

申请号：US14056844

申请日：2013-10-17

申请人： Michael B. Vincent

发明人： Michael B. Vincent

IPC分类号： H01L21/78 ,  H01L23/28 ,  H01L23/00 ,  H01L23/538

CPC分类号： H01L24/30 ,  H01L21/568 ,  H01L21/78 ,  H01L23/28 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/25 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24137 ,  H01L2224/2518 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29347 ,  H01L2224/3001 ,  H01L2224/32145 ,  H01L2224/73267 ,  H01L2224/83005 ,  H01L2224/83851 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2224/82 ,  H01L2224/83 ,  H01L2924/00

摘要： Microelectronic packages and methods for fabricating microelectronic packages are provided. In one embodiment, the method includes encapsulating a device stack within a molded panel having a frontside and a backside. The device stack contains an upper semiconductor die and an interconnect buffer layer, which is formed over the upper semiconductor die and which is covered by the frontside of the molded panel. Material is removed from the frontside the molded panel to expose the interconnect buffer layer therethrough. One or more frontside redistribution layers are produced over the frontside of the molded panel and electrically coupled to the upper semiconductor die through the interconnect buffer layer. The molded panel is then singulated to yield a microelectronic package including a molded package body containing the device stack.

摘要翻译： 提供了用于制造微电子封装的微电子封装和方法。 在一个实施例中，该方法包括将装置堆叠封装在具有前侧和后侧的模制面板内。 器件堆叠包含上半导体管芯和互连缓冲层，其形成在上半导体管芯上方并且被模制面板的前侧覆盖。 材料从模制板的前侧移除，以使互连缓冲层暴露于其间。 在模制面板的前侧产生一个或多个前沿再分配层，并通过互连缓冲层电耦合到上半导体管芯。 然后将模制板分割成微电子封装，其包括包含器件堆叠的模制封装主体。

公开(公告)号：US20130215583A1

公开(公告)日：2013-08-22

申请号：US13402413

申请日：2012-02-22

申请人： Michael B. Vincent

发明人： Michael B. Vincent

IPC分类号： H05K7/00 ,  H05K3/30 ,  H05K3/28

CPC分类号： H01L23/4334 ,  H01L21/6835 ,  H01L23/315 ,  H01L23/3737 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/27 ,  H01L24/29 ,  H01L24/73 ,  H01L24/92 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/27002 ,  H01L2224/27312 ,  H01L2224/27318 ,  H01L2224/2732 ,  H01L2224/2748 ,  H01L2224/2784 ,  H01L2224/27848 ,  H01L2224/279 ,  H01L2224/28105 ,  H01L2224/29011 ,  H01L2224/29013 ,  H01L2224/29014 ,  H01L2224/29015 ,  H01L2224/29017 ,  H01L2224/29022 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/73153 ,  H01L2224/81191 ,  H01L2224/83191 ,  H01L2224/92 ,  H01L2224/94 ,  H01L2924/12042 ,  H01L2924/3511 ,  H01L2924/35121 ,  Y10T29/49146 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/27 ,  H01L21/78 ,  H01L21/568 ,  H01L2224/274 ,  H01L2224/273 ,  H01L2924/00

摘要： An electrical component package is disclosed comprising: an electrical component having an embedded surface, a structure attached to the electrical component opposite the embedded surface, a conductive adhesive directly attached to the embedded surface, where the conductive adhesive is shaped to taper away from the embedded surface, and an encapsulation material covering the conductive adhesive and the electrical component. In various embodiments, the tapered conductive adhesive facilitates the securing of the conductive adhesive to the electrical component by the encapsulation material. Also disclosed are various methods of forming an electrical component package having a single interface conductive interconnection on the embedded surface. The conductive interconnection is configured to maintain an interconnection while under stress forces. Further disclosed in a method of applied a conductive adhesive that enables design flexibility regarding the shape and depth of the conductive interconnection.

摘要翻译： 公开了一种电气部件封装，包括：具有嵌入表面的电气部件，与嵌入表面相对的电气部件附接的结构，直接附着到嵌入表面的导电粘合剂，其中导电粘合剂成形为远离嵌入 表面和覆盖导电粘合剂和电气部件的封装材料。 在各种实施例中，锥形导电粘合剂有助于通过封装材料将导电粘合剂固定到电气部件。 还公开了形成在嵌入表面上具有单个界面导电互连的电气部件封装的各种方法。 导电互连配置为在应力下保持互连。 进一步公开了一种应用导电粘合剂的方法，其使得能够对导电互连的形状和深度设计灵活性。

公开(公告)号：US07763188B2

公开(公告)日：2010-07-27

申请号：US11072193

申请日：2005-03-04

申请人： Michael Gaynes ,  Jeffrey D. Gelorme ,  Luis J. Matienzo ,  Rebecca S. Northey ,  Michael B. Vincent

发明人： Michael Gaynes ,  Jeffrey D. Gelorme ,  Luis J. Matienzo ,  Rebecca S. Northey ,  Michael B. Vincent

IPC分类号： H01B1/06 ,  H01B1/02

CPC分类号： C09J163/00 ,  C08L63/00 ,  C09J9/02 ,  H05K1/095 ,  H05K3/321 ,  H05K3/4069 ,  H05K2203/122 ,  Y10T156/10 ,  Y10T428/24917

摘要： An electrically conductive adhesive (ECA) with low and stable contact resistance includes at least one melt-processable reactive resin, at least one reactive diluent, at least one rheological additive, copper particles, at least one curing agent and at least one organic acid catalyst. The ECA is useful for filling vias, and bonding together components of electronic circuit structures.

摘要翻译： 具有低且稳定的接触电阻的导电粘合剂（ECA）包括至少一种可熔融加工的反应性树脂，至少一种反应性稀释剂，至少一种流变添加剂，铜颗粒，至少一种固化剂和至少一种有机酸催化剂 。 ECA可用于填充通孔，并将电子电路结构的组件结合在一起。

公开(公告)号：US20080223604A1

公开(公告)日：2008-09-18

申请号：US12032644

申请日：2008-02-16

申请人： Michael Gaynes ,  Jeffrey D. Gelorme ,  Luis J. Matienzo ,  Rebecca S. Northey ,  Michael B. Vincent

发明人： Michael Gaynes ,  Jeffrey D. Gelorme ,  Luis J. Matienzo ,  Rebecca S. Northey ,  Michael B. Vincent

IPC分类号： H05K1/09 ,  H01B1/12

CPC分类号： C09J163/00 ,  C08L63/00 ,  C09J9/02 ,  H05K1/095 ,  H05K3/321 ,  H05K3/4069 ,  H05K2203/122 ,  Y10T156/10 ,  Y10T428/24917

摘要： A process for preparing an electrically conductive adhesive (ECA) with low and stable contact resistance by mixing at least one melt-processable reactive resin, at least one reactive diluent, at least one rheological additive, at least one curing agent, at least one organic acid catalyst, and copper particles. The ECA is useful for filling vias, and bonding together components of electronic circuit structures.

摘要翻译： 一种通过将至少一种可熔融加工的反应性树脂，至少一种反应性稀释剂，至少一种流变助剂，至少一种固化剂，至少一种有机物 酸催化剂和铜颗粒。 ECA可用于填充通孔，并将电子电路结构的组件结合在一起。

公开(公告)号：US07094966B2

公开(公告)日：2006-08-22

申请号：US10278687

申请日：2002-10-22

申请人： Barry A. Bonitz ,  Eric A. Johnson ,  Michael B. Vincent

发明人： Barry A. Bonitz ,  Eric A. Johnson ,  Michael B. Vincent

IPC分类号： H01L23/12

CPC分类号： H01L21/563 ,  H01L23/36 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/16195 ,  Y10T29/49126 ,  Y10T29/49128 ,  H01L2924/00

摘要： A package for an integrated circuit that is attached to a rigid substrate by the flip-chip method has a heat spreader that is attached to the IC by a thermally conductive, compliant adhesive and that is attached to the package substrate by a set of rigid posts of adhesive, the result of which is that the heat spreader is more closely parallel to the substrate than was the case for a stiffener bonded to the substrate by a thin film extending over a large area.

摘要翻译： 用于通过倒装芯片方法附接到刚性基板的集成电路的封装具有散热器，该散热器通过导热柔顺的粘合剂附接到IC，并且通过一组刚性柱附接到封装基板 的粘合剂，其结果是散热器比通过在大面积上延伸的薄膜结合到基板的加强件的情况更紧密地平行于基板。

公开(公告)号：US06739497B2

公开(公告)日：2004-05-25

申请号：US10145467

申请日：2002-05-13

申请人： Clément J. Fortin ,  Pierre M. Langevin ,  Son K. Tran ,  Michael B. Vincent

发明人： Clément J. Fortin ,  Pierre M. Langevin ,  Son K. Tran ,  Michael B. Vincent

IPC分类号： B23K3102

CPC分类号： H05K3/3442 ,  H01L21/563 ,  H01L2924/0002 ,  H05K3/284 ,  H05K3/305 ,  H05K3/3489 ,  H05K3/3494 ,  H05K2201/10636 ,  H05K2201/10977 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00

摘要： An electronic fabrication process and structure is provided for attaching discrete passive surface mount devices (SMD) to a substrate in a single step. A liquid noflow resin encapsulant containing flux material is dispensed between presoldered pads on a substrate. The SMD, having a pair of electrical contacts, is pressed into said encapsulant so that the electrical contacts make contact with said presoldered pads. Heat is applied to first activate said flux material and then reflow the solder on said presoldered pads to bond said SMD contacts to said presoldered pads. The reflow temperature is maintained for about 180 seconds during which time the resin solidifies. The resin encapsulant fills the space between substrate and SMD and forms fillets around the solder bonded contacts.

摘要翻译： 提供电子制造工艺和结构，用于在单个步骤中将分立的被动表面贴装器件（SMD）附接到衬底。 含有助焊剂材料的液体流动树脂密封剂被分配在基材上的预铸焊盘之间。 具有一对电触点的SMD被压入所述密封剂中，使得电触头与所述预铸焊盘接触。 施加热量以首先激活所述焊剂材料，然后回流所述预铸焊盘上的焊料，以将所述SMD触点接合到所述预铸焊盘。 回流温度保持约180秒，在此期间树脂固化。 树脂密封剂填充基板和SMD之间的空间，并在焊接接合点周围形成圆角。

公开(公告)号：US06674172B2

公开(公告)日：2004-01-06

申请号：US09850922

申请日：2001-05-08

申请人： Michael B. Vincent

发明人： Michael B. Vincent

IPC分类号： H01L2348

CPC分类号： H01L23/295 ,  H01L21/563 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83102 ,  H01L2224/83192 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/0401

摘要： A method and structure for solderably coupling a semiconductor chip to a substrate, with an underfill between the chip and the substrate. In forming the structure, underfill material is dispensed upon a conductive pad on the substrate. The underfill material comprises a resin and a filler. The filler density is less than the resin density. The chip is moved toward the substrate and into the underfill until a solder member coupled to the chip is proximate the conductive pad. The structure is heated, resulting in soldering the solder member to the conductive pad and in curing the underfill. Filler particles move through the resin and toward the chip, resulting in an increased filler concentration near the solder member, and a reduced underfill coefficient of thermal expansion (CTE) near the solder member that is close to the CTE of the solder member.

摘要翻译： 一种用于将半导体芯片可焊接地耦合到衬底的方法和结构，其中在芯片和衬底之间具有底部填充。 在形成结构时，将底部填充材料分配在基板上的导电垫上。 底部填充材料包括树脂和填料。 填料密度小于树脂密度。 芯片移动到衬底并进入底部填充物中，直到耦合到芯片的焊料件靠近导电焊盘。 该结构被加热，导致将焊料焊接到导电焊盘并固化底部填充物。 填料颗粒通过树脂移动并且朝向芯片，导致焊料附近的填料浓度增加，并且焊料附近靠近焊料构件的CTE的底部填充热膨胀系数（CTE）降低。

公开(公告)号：US09305911B2

公开(公告)日：2016-04-05

申请号：US14097459

申请日：2013-12-05

申请人： Michael B. Vincent ,  Jason R. Wright ,  Weng F. Yap

发明人： Michael B. Vincent ,  Jason R. Wright ,  Weng F. Yap

IPC分类号： H01L23/538 ,  H01L23/02 ,  H01L23/48 ,  H01L21/00 ,  H01L25/00 ,  H01L23/00 ,  H01L25/10

CPC分类号： H01L25/50 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/02371 ,  H01L2224/04105 ,  H01L2225/1035 ,  H01L2225/1064 ,  H01L2924/12042 ,  H01L2924/1815 ,  H01L2924/00

摘要： Embodiments of methods for forming microelectronic device packages include forming a trench on a surface of a package body in an area adjacent to where first and second package surface conductors will be (or have been) formed on both sides of the trench. The method also includes forming the first and second package surface conductors to electrically couple exposed ends of various combinations of device-to-edge conductors. The trench may be formed using laser cutting, drilling, sawing, etching, or another suitable technique. The package surface conductors may be formed by dispensing (e.g., coating, spraying, inkjet printing, aerosol jet printing, stencil printing, or needle dispensing) one or more conductive materials on the package body surface between the exposed ends of the device-to-edge conductors.

摘要翻译： 用于形成微电子器件封装的方法的实施例包括在第一和第二封装表面导体将（或已经）形成在沟槽的两侧上的邻近区域中在封装主体的表面上形成沟槽。 该方法还包括形成第一和第二封装表面导体以电耦合器件对边缘导体的各种组合的暴露端。 沟槽可以使用激光切割，钻孔，锯切，蚀刻或其它合适的技术形成。 封装表面导体可以通过在器件 - 表面导体的暴露端之间的封装主体表面上分配（例如，涂覆，喷涂，喷墨印刷，喷雾印刷，模版印刷或针分配）形成一个或多个导电材料， 边缘导体。

公开(公告)号：US09299670B2

公开(公告)日：2016-03-29

申请号：US13829737

申请日：2013-03-14

申请人： Weng F. Yap ,  Michael B. Vincent ,  Jason R. Wright

发明人： Weng F. Yap ,  Michael B. Vincent ,  Jason R. Wright

IPC分类号： H01L23/28 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L23/538

CPC分类号： H01L24/05 ,  H01L21/561 ,  H01L21/565 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L24/96 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05647 ,  H01L2224/06182 ,  H01L2224/24011 ,  H01L2224/24105 ,  H01L2224/24147 ,  H01L2224/244 ,  H01L2224/245 ,  H01L2224/25175 ,  H01L2224/2518 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/82101 ,  H01L2224/82365 ,  H01L2224/92244 ,  H01L2224/96 ,  H01L2225/06524 ,  H01L2225/06551 ,  H01L2225/06558 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2924/00014 ,  H01L2924/0665

摘要： A stacked microelectronic package can comprise a package body having an external vertical package sidewall, a plurality of microelectronic devices embedded within the package body, and package edge conductors electrically coupled to the plurality of microelectronic devices and extending to the external vertical package sidewall. A cavity is formed on an external surface of the package body between a first one of the package edge conductors and a second one of the package edge conductors. Electrically conductive material is in the cavity and in electrical contact with a first and a second one of the package edge conductors, wherein the conductive material in the cavity is within planform dimensions of the microelectronic package.

摘要翻译： 堆叠的微电子封装可以包括具有外部垂直封装侧壁的封装主体，嵌入封装体内的多个微电子器件，以及电耦合到多个微电子器件并延伸到外部垂直封装侧壁的封装边缘导体。 在包装体的第一个封装边缘导体和第二封装边缘导体之间的封装主体的外表面上形成一个空腔。 导电材料在空腔中并与第一和第二封装边缘导体电接触，其中空腔中的导电材料在微电子封装的平面形状尺寸内。