Method of solving contact oblique problems of an ILD layer using a rapid
thermal anneal
    21.
    发明授权
    Method of solving contact oblique problems of an ILD layer using a rapid thermal anneal 失效
    使用快速热退火解决ILD层的接触倾斜问题的方法

    公开(公告)号:US6033999A

    公开(公告)日:2000-03-07

    申请号:US20584

    申请日:1998-02-02

    摘要: A method of annealing an interlevel dielectric (IDL) layer 24 composed of PE-TEOS oxide before contact openings are formed in the ILD layer. The anneal prevents the contact openings 30 in IDL layer 24 from shifting and causing contact problems (contact oblique 33). The method begins by forming a first insulating layer 16 20 over a semiconductor structure 12. An ILD layer 24 composed of silicon oxide formed by a PECVD process using TEOS overlying the structure 12. In a key step, first rapid thermal anneal (RTA) is performed on the interlevel dielectric layer 24. The first RTA is preferably performed at a temperature in a range of between about 940 and 1100.degree. C. for a time in a range of between about 10 and 120 seconds. A contact hole 30 is then formed through the first insulating layer and the interlevel dielectric layer 24. The invention's first rapid thermal anneal prevents the ILD layer 24 from shrinking and shifting that distorts the contact hole 30.

    摘要翻译: 在ILD层中形成在接触开口之前退火由PE-TEOS氧化物构成的层间电介质(IDL)层24的方法。 退火防止IDL层24中的接触开口30移动并引起接触问题(接触倾斜33)。 该方法开始于在半导体结构12上形成第一绝缘层16 20.由通过使用TEOS覆盖在结构12上的PECVD工艺形成的由氧化硅构成的ILD层24.在关键步骤中,第一快速热退火(RTA)是 在层间电介质层24上执行。第一RTA优选在约940和1100℃之间的温度下进行约10至120秒范围内的时间。 然后通过第一绝缘层和层间电介质层24形成接触孔30.本发明的第一快速热退火防止ILD层24收缩和移位,从而扭曲接触孔30。

    Post passivation metal scheme for high-performance integrated circuit devices
    23.
    再颁专利
    Post passivation metal scheme for high-performance integrated circuit devices 有权
    后钝化金属方案用于高性能集成电路器件

    公开(公告)号:USRE43674E1

    公开(公告)日:2012-09-18

    申请号:US11518595

    申请日:2006-09-08

    IPC分类号: H01L21/4763 H01L23/48

    CPC分类号: H01L2924/0002 H01L2924/00

    摘要: A new post-passivation metal interconnect scheme is provided over the surface of a IC device that has been covered with a conventional layer of passivation. The metal scheme of the invention comprises, overlying a conventional layer of passivation, thick and wide metal lines in combination with thick layers of dielectric and bond pads. The interconnect system of the invention can be used for the distribution of power, ground, signal and clock lines from bond pads to circuits of a device that are provided in any location of the IC device without introducing significant power drop. No, or smaller ESD circuits are required due to the low impedance post-passivation interconnection, since any accumulated electrostatic discharge will be evenly distributed across all junction capacitance of the circuits on the chip. The post passivation metal scheme is connected to external circuits through bond pads, solder bonding, TAB bonding and the like. A top layer of the interconnect metal scheme is formed using a composite metal for purposes of wirebonding, the composite metal is created over a bulk conduction metal. A diffusion metal may be applied between the bulk metal and the composite metal, in addition a layer of Under-Barrier-Metal (UBM) may be required underneath the bulk conduction metal.

    摘要翻译: 在已经被常规钝化层覆盖的IC器件的表面上提供了新的后钝化金属互连方案。 本发明的金属方案包括叠加常规的钝化层,厚和宽的金属线与厚的介电层和接合焊盘的组合。 本发明的互连系统可以用于将功率,接地,信号和时钟线从接合焊盘分配到设置在IC器件的任何位置的器件的电路,而不引入显着的功率下降。 由于低阻抗钝化后互连,不需要或更小的ESD电路,因为任何累积的静电放电将均匀分布在芯片上电路的所有结电容上。 后钝化金属方案通过接合焊盘,焊接,TAB接合等连接到外部电路。 互连金属方案的顶层使用用于引线键合的复合金属形成,复合金属在体导电金属上形成。 扩散金属可以施加在本体金属和复合金属之间,另外在体导电金属之下可能需要一层下阻挡金属(UBM)。

    Predictions of leakage modes in integrated circuits
    27.
    发明授权
    Predictions of leakage modes in integrated circuits 有权
    集成电路中泄漏模式的预测

    公开(公告)号:US07439084B2

    公开(公告)日:2008-10-21

    申请号:US11405650

    申请日:2006-04-17

    IPC分类号: H01L21/66 G01R31/26

    CPC分类号: H01L22/14 G01R31/307

    摘要: A method for determining leakage currents in integrated circuits is provided. The method includes providing a substrate comprising a target structure having a first region and a second region, grounding the second region, scanning the substrate using a scanning electron microscope to produce a voltage contrast (VC) image, determining a gray level of the first region in the VC image, and using the gray level to determine a leakage current between the first region and the second region.

    摘要翻译: 提供了一种用于确定集成电路中的漏电流的方法。 该方法包括提供包括具有第一区域和第二区域的目标结构的基板,使第二区域接地,使用扫描电子显微镜扫描基板以产生电压对比度(VC)图像,确定第一区域的灰度级 在VC图像中,并且使用灰度级来确定第一区域和第二区域之间的漏电流。

    Post passivation metal scheme for high-performance integrated circuit devices
    30.
    发明授权
    Post passivation metal scheme for high-performance integrated circuit devices 有权
    后钝化金属方案用于高性能集成电路器件

    公开(公告)号:US06649509B1

    公开(公告)日:2003-11-18

    申请号:US09998862

    申请日:2001-10-24

    IPC分类号: H01L214763

    摘要: A new post-passivation metal interconnect scheme is provided over the surface of a IC device that has been covered with a conventional layer of passivation. The metal scheme of the invention comprises, overlying a conventional layer of passivation, thick and wide metal lines in combination with thick layers of dielectric and bond pads. The interconnect system of the invention can be used for the distribution of power, ground, signal and clock lines from bond pads to circuits of a device that are provided in any location of the IC device without introducing significant power drop. The post passivation metal scheme is connected to external circuits through bond pads, solder bonding, TAB bonding and the like. A top layer of the interconnect metal scheme is formed using a composite metal for purposes of wirebonding, the composite metal is created over a bulk conduction metal. A diffusion metal may be applied between the bulk metal and the composite metal, in addition a layer of Under-Barrier-Metal (UBM) may be required underneath the bulk conduction metal.

    摘要翻译: 在已经被常规钝化层覆盖的IC器件的表面上提供了新的后钝化金属互连方案。 本发明的金属方案包括叠加常规的钝化层,厚和宽的金属线与厚的介电层和接合焊盘的组合。 本发明的互连系统可以用于将功率,接地,信号和时钟线从接合焊盘分配到设置在IC器件的任何位置的器件的电路,而不引入显着的功率下降。 后钝化金属方案通过接合焊盘,焊接,TAB接合等连接到外部电路。 互连金属方案的顶层使用用于引线键合的复合金属形成,复合金属在体导电金属上形成。 扩散金属可以施加在本体金属和复合金属之间,另外在体导电金属之下可能需要一层下阻挡金属(UBM)。