公开(公告)号：US2493199A

公开(公告)日：1950-01-03

申请号：US76873447

申请日：1947-08-15

Applicant: GLOBE UNION INC

Inventor： KHOURI ALFRED S ,  FISCHER WILLIAM C

IPC: H01G2/00 ,  H05K1/03 ,  H05K1/16 ,  H05K1/18

CPC classification number: H01G2/00 ,  H05K1/0306 ,  H05K1/16 ,  H05K1/167 ,  H05K1/181 ,  H05K2201/10643 ,  Y10T29/49144

公开(公告)号：US20160181480A1

公开(公告)日：2016-06-23

申请号：US14988537

申请日：2016-01-05

Applicant: Bridgelux, Inc.

Inventor： Brian Cumpston

IPC: H01L33/48 ,  H01L33/50 ,  H01L33/58 ,  H01L33/60 ,  H01L33/62 ,  H01L33/64 ,  H01L25/16 ,  H01L33/56

CPC classification number: H01L33/486 ,  H01L25/0753 ,  H01L25/165 ,  H01L25/167 ,  H01L33/20 ,  H01L33/507 ,  H01L33/56 ,  H01L33/58 ,  H01L33/60 ,  H01L33/62 ,  H01L33/644 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/49107 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/181 ,  H05K1/0274 ,  H05K1/184 ,  H05K2201/10106 ,  H05K2201/10643 ,  H05K2203/049 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A low-cost device for packaging LED dies provides superior reflectivity and thermal conductivity without covering entire surfaces of an LED luminaire with an expensive reflective aluminum substrate. The LED packaging device includes a highly reflective substrate disposed in a hole in a printed circuit board. The substrate has a reflectivity greater than 97% and includes an insulating layer and a reflective layer disposed above a thicker aluminum layer. An LED die is disposed on the top surface of the substrate. The PCB has a layer of glass fiber in resin and a metal layer. The lower surface of the PCB and the bottom surface of the substrate are substantially coplanar. The metal layer of the PCB is electrically coupled to the LED die only through bond wires. Electronic circuitry is disposed on the upper surface of the PCB and is used to control light emitted from the LED die.

Abstract translation: 用于封装LED裸片的低成本设备提供了优异的反射率和导热性，而不用昂贵的反射铝基板覆盖LED照明器的整个表面。 LED封装装置包括设置在印刷电路板的孔中的高反射性基板。 基板的反射率大于97％，并且包括设置在较厚铝层上方的绝缘层和反射层。 LED芯片设置在基板的顶表面上。 PCB具有树脂中的玻璃纤维层和金属层。 PCB的下表面和衬底的底表面基本上共面。 PCB的金属层仅通过接合线电耦合到LED管芯。 电子电路设置在PCB的上表面上，用于控制从LED管芯发出的光。

公开(公告)号：US09252337B1

公开(公告)日：2016-02-02

申请号：US14579937

申请日：2014-12-22

Applicant: Bridgelux, Inc.

Inventor： Brian Cumpston

IPC: H01L27/15 ,  H01L29/88 ,  H01L33/48 ,  H01L33/50 ,  H01L33/64 ,  H01L33/56 ,  H01L33/62 ,  H01L33/60 ,  H01L25/16 ,  H05K1/18 ,  H05K1/02 ,  H01L33/58 ,  H01L33/20

CPC classification number: H01L33/486 ,  H01L25/0753 ,  H01L25/165 ,  H01L25/167 ,  H01L33/20 ,  H01L33/507 ,  H01L33/56 ,  H01L33/58 ,  H01L33/60 ,  H01L33/62 ,  H01L33/644 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/49107 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/181 ,  H05K1/0274 ,  H05K1/184 ,  H05K2201/10106 ,  H05K2201/10643 ,  H05K2203/049 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A low-cost device for packaging LED dies provides superior reflectivity and thermal conductivity without covering entire surfaces of an LED luminaire with an expensive reflective aluminum substrate. The LED packaging device includes a highly reflective substrate disposed in a hole in a printed circuit board. The substrate has a reflectivity greater than 97% and includes an insulating layer and a reflective layer disposed above a thicker aluminum layer. An LED die is disposed on the top surface of the substrate. The PCB has a layer of glass fiber in resin and a metal layer. The lower surface of the PCB and the bottom surface of the substrate are substantially coplanar. The metal layer of the PCB is electrically coupled to the LED die only through bond wires. Electronic circuitry is disposed on the upper surface of the PCB and is used to control light emitted from the LED die.

Abstract translation: 用于封装LED裸片的低成本设备提供了优异的反射率和导热性，而不用昂贵的反射铝基板覆盖LED照明器的整个表面。 LED封装装置包括设置在印刷电路板的孔中的高反射性基板。 基板的反射率大于97％，并且包括设置在较厚铝层上方的绝缘层和反射层。 LED芯片设置在基板的顶表面上。 PCB具有树脂中的玻璃纤维层和金属层。 PCB的下表面和衬底的底表面基本上共面。 PCB的金属层仅通过接合线电耦合到LED管芯。 电子电路设置在PCB的上表面上，用于控制从LED管芯发出的光。

公开(公告)号：US08324727B2

公开(公告)日：2012-12-04

申请号：US12720110

申请日：2010-03-09

Applicant: Joseph C. Fjelstad ,  Kevin P. Grundy ,  Para K. Segaram ,  William F. Wiedemann ,  Thomas J. Obenhuber ,  Inessa Obenhuber, legal representative

Inventor： Joseph C. Fjelstad ,  Kevin P. Grundy ,  Para K. Segaram ,  William F. Wiedemann ,  Thomas J. Obenhuber

IPC: H01L23/34

CPC classification number: H01C7/003 ,  H01C13/02 ,  H01G4/33 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48091 ,  H01L2224/48235 ,  H01L2224/49109 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H05K1/0231 ,  H05K1/0233 ,  H05K1/0234 ,  H05K1/0246 ,  H05K1/186 ,  H05K3/4602 ,  H05K2201/09536 ,  H05K2201/10643 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Disclosed are low profile discrete electronic component structures that are suitable for placement and use in a vertical interconnection mode either within an electronic interconnection substrate, between interconnection substrate and electronic component or within an IC package.

Abstract translation: 公开了适用于在电子互连衬底内，互连衬底和电子部件之间或IC封装内的垂直互连模式下放置和使用的薄型离散电子部件结构。

公开(公告)号：US20120039053A1

公开(公告)日：2012-02-16

申请号：US13283655

申请日：2011-10-28

Applicant: David S. Slaton ,  David L. McDonald ,  Shreenath S. Perlaguri

Inventor： David S. Slaton ,  David L. McDonald ,  Shreenath S. Perlaguri

IPC: H05K5/00 ,  H05K1/11 ,  H05K7/00 ,  H05K3/30

CPC classification number: H01R13/2442 ,  H01M2/1044 ,  H05K1/182 ,  H05K3/301 ,  H05K2201/10037 ,  H05K2201/10325 ,  H05K2201/10454 ,  H05K2201/10643 ,  Y10T29/49108 ,  Y10T29/4913 ,  Y10T29/49153 ,  Y10T29/49174 ,  Y10T29/49176 ,  Y10T29/49204

Abstract: A method for coupling a battery within an embedded system is described. The method includes creating a hole extending through a printed circuit board (PCB), inserting a portion of the battery into the hole, and electrically coupling the battery to at least one contact.

Abstract translation: 描述了一种用于在嵌入式系统内耦合电池的方法。 该方法包括创建延伸穿过印刷电路板（PCB）的孔，将电池的一部分插入到孔中，以及将电池电耦合到至少一个触点。

公开(公告)号：US20110180312A1

公开(公告)日：2011-07-28

申请号：US13064541

申请日：2011-03-30

Applicant: Han Kim ,  Je-Gwang Yoo ,  Mi-Ja Han ,  Dae-Hyun Park

Inventor： Han Kim ,  Je-Gwang Yoo ,  Mi-Ja Han ,  Dae-Hyun Park

IPC: H05K1/18

CPC classification number: H05K1/0231 ,  H01L2224/16225 ,  H05K1/0236 ,  H05K1/165 ,  H05K1/185 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09663 ,  H05K2201/10636 ,  H05K2201/10643 ,  Y02P70/611 ,  Y10T29/4913 ,  Y10T29/49146

Abstract: A printed circuit board having an embedded chip capacitor includes a first conductive layer; a second conductive layer, placed away from the first conductive layer; a chip capacitor, having a first electrode connected to the first conductive layer through being seated in a cavity formed between the first conductive layer and the second conductive layer; a filled material, filled in a space excluding a space occupied by the chip capacitor in the cavity; and a via, penetrating the filled material and connecting the second conductive layer to the second electrode of the chip capacitor.

Abstract translation: 具有嵌入式芯片电容器的印刷电路板包括：第一导电层; 远离所述第一导电层放置的第二导电层; 芯片电容器，其具有通过位于形成在第一导电层和第二导电层之间的空腔中而连接到第一导电层的第一电极; 填充材料，填充在空腔内不包括由片状电容器占据的空间的空间中; 以及通孔，穿透填充材料并将第二导电层连接到片式电容器的第二电极。

公开(公告)号：US20090296310A1

公开(公告)日：2009-12-03

申请号：US12132316

申请日：2008-06-03

Applicant: Azuma Chikara

Inventor： Azuma Chikara

IPC: H05K1/18 ,  H01G4/30 ,  H01L21/50

CPC classification number: H05K3/303 ,  H01G2/065 ,  H01G4/06 ,  H01G4/30 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19106 ,  H01L2924/30105 ,  H05K1/0231 ,  H05K1/162 ,  H05K1/181 ,  H05K1/185 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4644 ,  H05K3/4688 ,  H05K2201/0187 ,  H05K2201/10643 ,  H05K2201/10674 ,  Y10T29/4913 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A capacitive precursor (100) and packaged semiconductor devices therefrom includes a substrate (105), a plurality of electrically conductive material layers (111-118) stacked on the substrate (105). The plurality of electrically conductive layers (111-118) provide first and second patterns (200 and 250). The first patterns (200) each include at least a first pair of overlaying areas free of the electrically conductive material, and the second patterns (250) each include at least a second pair of overlaying areas free of the electrically conductive material. The first pair of areas overlay areas of the second pattern having the electrically conductive material and the second pair of areas overlay areas of the first pattern having the electrically conductive material. A plurality of dielectric layers (101-107) are interposed between neighboring electrically conductive material layers (111-118) for electrical isolation. One or more capacitive precursors can be dropped onto or into a board and during assembly of a packaged semiconductor device and have electrically conducting layers associated with its respective plates connected together to form a capacitor during assembly using conventional assembly steps.

Abstract translation: 电容前驱体（100）及其封装的半导体器件包括衬底（105），堆叠​​在衬底（105）上的多个导电材料层（111-118）。 多个导电层（111-118）提供第一和第二图案（200和250）。 第一图案（200）各自包括至少第一对无导电材料的重叠区域，并且第二图案（250）各自包括至少第二对不含导电材料的重叠区域。 第一对区域覆盖具有导电材料的第二图案的区域，并且第二对区域覆盖具有导电材料的第一图案的区域。 在相邻的导电材料层（111-118）之间插入多个电介质层（101-107），用于电隔离。 一个或多个电容性前体可以掉落到基板上或者在组装封装的半导体器件期间并且具有与连接在一起的相应板相关联的导电层，以在组装期间使用传统的组装步骤形成电容器。

公开(公告)号：US07499258B2

公开(公告)日：2009-03-03

申请号：US11319722

申请日：2005-12-29

Applicant: Chang Hoon Shim ,  Jin Yong An ,  Suk Hyeon Cho ,  Sung Hyung Kang

Inventor： Chang Hoon Shim ,  Jin Yong An ,  Suk Hyeon Cho ,  Sung Hyung Kang

IPC: H01G4/236 ,  H01G4/06

CPC classification number: H01G2/06 ,  H01G4/232 ,  H01G4/30 ,  H01L2924/0002 ,  H05K1/0231 ,  H05K1/185 ,  H05K2201/10643 ,  H01L2924/00

Abstract: The invention provides an embedded multilayer chip capacitor, and a printed circuit board having the same. The embedded multilayer chip capacitor has a capacitor body having a plurality of dielectric layers stacked one on another; a plurality of first and second internal electrodes formed inside the capacitor body, separated by the dielectric layers; and first and second vias extended vertically inside the capacitor body. The first via is connected to the first internal electrodes and the second via is connected to the second internal electrodes. The first via is led to a bottom of the capacitor body and the second via is led to a top of the capacitor body.

Abstract translation: 本发明提供一种嵌入式多层片状电容器及具有该电容器的印刷电路板。 嵌入式多层片状电容器具有电容器主体，该电容器本体具有彼此层叠的多个电介质层; 多个第一和第二内部电极，形成在电容器本体内部，被电介质层分隔开; 并且第一和第二通孔在电容器体内垂直延伸。 第一通孔连接到第一内部电极，第二通孔连接到第二内部电极。 第一通孔被引导到电容器主体的底部，第二通孔被引导到电容器主体的顶部。

公开(公告)号：US07417870B2

公开(公告)日：2008-08-26

申请号：US11709156

申请日：2007-02-22

Applicant: Sung Taek Lim ,  Yul Kyo Chung

Inventor： Sung Taek Lim ,  Yul Kyo Chung

IPC: H05K1/18

CPC classification number: H05K1/0231 ,  H01L2924/15311 ,  H05K1/162 ,  H05K1/185 ,  H05K2201/0179 ,  H05K2201/09509 ,  H05K2201/10636 ,  H05K2201/10643 ,  H05K2201/10734 ,  Y02P70/611

Abstract: A multi-layer board having a superior decoupling function in a low frequency band and a radio frequency band. The multi-layer board includes a board body having a plurality of stacked dielectric layers, power terminals connected through a via, ground terminals connected through a via and an integrated circuit component connected to the power and ground terminals. The multi-layer board also includes a power line unit connected to the power terminals and the integrated circuit component and a ground line unit connected to the ground terminals and the integrated circuit component. The multi-layer board further includes at least one multilayer chip capacitor mounted on the board body and connected between the power terminal and the ground terminal formed on the board body and at least one thin film capacitor mounted inside the board body and connected between the power line unit and the ground line unit.

Abstract translation: 一种在低频带和无线电频带中具有优异的去耦功能的多层板。 多层板包括具有多层堆叠电介质层的电路板，通过通孔连接的电源端子，通过通孔连接的接地端子和连接到电源接地端子的集成电路部件。 多层板还包括连接到电源端子和集成电路部件的电力线单元和连接到接地端子和集成电路部件的接地线单元。 多层板还包括安装在板体上并连接在电源端子和形成在电路板主体上的接地端子之间的至少一个多层片式电容器，以及安装在电路板主体内并连接在电源之间的至少一个薄膜电容器 线路单元和地线单元。

公开(公告)号：US20070194876A1

公开(公告)日：2007-08-23

申请号：US11709156

申请日：2007-02-22

Applicant: Sung Taek Lim ,  Yul Kyo Chung

Inventor： Sung Taek Lim ,  Yul Kyo Chung

IPC: H01F27/28

CPC classification number: H05K1/0231 ,  H01L2924/15311 ,  H05K1/162 ,  H05K1/185 ,  H05K2201/0179 ,  H05K2201/09509 ,  H05K2201/10636 ,  H05K2201/10643 ,  H05K2201/10734 ,  Y02P70/611

Abstract: A multi-layer board having a superior decoupling function in a low frequency band and a radio frequency band. The multi-layer board includes a board body having a plurality of stacked dielectric layers, power terminals connected through a via, ground terminals connected through a via and an integrated circuit component connected to the power and ground terminals. The multi-layer board also includes a power line unit connected to the power terminals and the integrated circuit component and a ground line unit connected to the ground terminals and the integrated circuit component. The multi-layer board further includes at least one multilayer chip capacitor mounted on the board body and connected between the power terminal and the ground terminal formed on the board body and at least one thin film capacitor mounted inside the board body and connected between the power line unit and the ground line unit.

Abstract translation: 一种在低频带和无线电频带中具有优异的去耦功能的多层板。 多层板包括具有多层堆叠电介质层的电路板，通过通孔连接的电源端子，通过通孔连接的接地端子和连接到电源接地端子的集成电路部件。 多层板还包括连接到电源端子和集成电路部件的电力线单元和连接到接地端子和集成电路部件的接地线单元。 多层板还包括安装在板体上并连接在电源端子和形成在电路板主体上的接地端子之间的至少一个多层片式电容器，以及安装在电路板主体内并连接在电源之间的至少一个薄膜电容器 线路单元和地线单元。