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    PHOTOSENSITIVE MODULE AND METHOD FOR FORMING THE SAME
    31.
    发明申请
    PHOTOSENSITIVE MODULE AND METHOD FOR FORMING THE SAME 有权
    感光性模块及其形成方法

    公开(公告)号：US20160218133A1

    公开(公告)日：2016-07-28

    申请号：US15006052

    申请日：2016-01-25

    Applicant: XINTEC INC.

    Inventor： Yen-Shih HO ,  Tsang-Yu LIU ,  Chi-Chang LIAO

    IPC: H01L27/146

    CPC classification number: H01L27/14618 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/14683 ,  H01L2224/16

    Abstract: A method for forming a photosensitive module is provided. The method includes providing a sensing device. The sensing device includes a conducting pad located on a substrate. A first opening penetrates the substrate and exposes the conducting pad. A redistribution layer is in the first opening to electrically connect to the conducting pad. A cover plate is located on the substrate and covers the conducting pad. The method also includes removing the cover plate of the sensing device. The method further includes bonding the sensing device to a circuit board after the removal of the cover plate. The redistribution layer in the first opening is exposed and faces the circuit board. In addition, the method includes mounting an optical component corresponding to the sensing device on the circuit board. A photosensitive module formed by the method is also provided.

    Abstract translation: 提供一种形成光敏模块的方法。 该方法包括提供感测装置。 感测装置包括位于基板上的导电垫。 第一开口穿透衬底并暴露导电垫。 再分布层位于第一开口中，以电连接到导电垫。 盖板位于基板上并覆盖导电垫。 该方法还包括移除感测装置的盖板。 该方法还包括在移除盖板之后将感测装置接合到电路板。 第一开口中的再分配层被暴露并面向电路板。 此外，该方法包括将对应于感测装置的光学部件安装在电路板上。 还提供了通过该方法形成的感光模块。

    Manufacturing method of semiconductor structure
    32.
    发明授权
    Manufacturing method of semiconductor structure 有权
    半导体结构的制造方法

    公开(公告)号：US09397138B2

    公开(公告)日：2016-07-19

    申请号：US14613231

    申请日：2015-02-03

    Applicant: XINTEC INC.

    Inventor： Chien-Hung Liu

    IPC: H01L27/146

    CPC classification number: H01L27/14685 ,  H01L27/14618 ,  H01L27/14687 ,  H01L2224/11

    Abstract: A manufacturing method of a semiconductor structure includes the following steps. A carrier and a dam element are provided, and the dam element is adhered to the carrier by a temporary bonding layer. The dam element is bonded on the wafer. A first isolation layer, a redistribution layer, a second isolation layer, and a conductive structure are formed on the wafer in sequence. The carrier, the dam element and the wafer are diced to form a semiconductor element. The semiconductor element is disposed on a printed circuit board, such that the conductive structure is electrically connected to the printed circuit board. An adhesion force of the temporary bonding layer is eliminated to remove the carrier. A lens assembly is disposed on the printed circuit board, such that the semiconductor element without the carrier is located in the lens assembly.

    Abstract translation: 半导体结构的制造方法包括以下步骤。 提供了载体和坝元件，并且坝元件通过临时粘合层粘附到载体上。 坝体结合在晶片上。 在晶片上依次形成第一隔离层，再分配层，第二隔离层和导电结构。 将载体，坝元件和晶片切割成半导体元件。 半导体元件设置在印刷电路板上，使得导电结构电连接到印刷电路板。 消除了临时粘合层的粘合力以除去载体。 透镜组件设置在印刷电路板上，使得没有载体的半导体元件位于透镜组件中。

    CHIP PACKAGE AND METHOD FOR FORMING THE SAME
    35.
    发明申请
    CHIP PACKAGE AND METHOD FOR FORMING THE SAME 有权
    芯片包装及其形成方法

    公开(公告)号：US20160141219A1

    公开(公告)日：2016-05-19

    申请号：US15008241

    申请日：2016-01-27

    Applicant: XINTEC INC.

    Inventor： Chien-Hung LIU

    IPC: H01L23/31 ,  H01L23/29 ,  H01L21/48 ,  G06K9/00 ,  H05K1/18 ,  H05K1/02 ,  H05K1/11 ,  H05K3/32 ,  H01L23/498 ,  H01L21/56

    CPC classification number: H01L23/3192 ,  G01L19/0061 ,  G01L19/06 ,  G01L19/14 ,  G06F21/32 ,  G06K9/00 ,  G06K9/00006 ,  H01L21/0212 ,  H01L21/02263 ,  H01L21/56 ,  H01L23/291 ,  H01L23/3114 ,  H01L23/3185 ,  H01L23/525 ,  H01L2021/60022 ,  H01L2224/11 ,  H05K1/0298 ,  H05K1/111 ,  H05K1/181 ,  H05K3/32

    Abstract: A chip package includes a chip, a dam layer, a permanent adhesive layer, a support, a buffer layer, a redistribution layer, a passivation layer, and a conducting structure. A conducting pad and a sensing device of the chip are located on a first surface of a substrate of the chip, and the conducting pad protrudes from the side surface of the substrate. The dam layer surrounds the sensing device. The permanent adhesive layer is between the support and the substrate. The support and the permanent adhesive layer have a trench to expose the conducting pad. The buffer layer is located on the support. The redistribution layer is located on the buffer layer and on the support, the permanent adhesive layer, and the conducting pad facing the trench. The passivation layer covers the redistribution layer, the buffer layer, and the conducting pad.

    Abstract translation: 芯片封装包括芯片，阻挡层，永久粘合剂层，支撑体，缓冲层，再分配层，钝化层和导电结构。 芯片的导电焊盘和感测装置位于芯片的基板的第一表面上，并且导电焊盘从基板的侧表面突出。 坝层围绕感测装置。 永久性粘合剂层位于载体和基底之间。 支撑体和永久粘合剂层具有暴露导电垫的沟槽。 缓冲层位于支架上。 再分配层位于缓冲层上，在支撑体上，永久性粘合剂层和导电垫面对沟槽。 钝化层覆盖再分配层，缓冲层和导电焊盘。

    Chip package and method thereof
    36.
    发明授权
    Chip package and method thereof 有权
    芯片封装及其方法

    公开(公告)号：US09334156B2

    公开(公告)日：2016-05-10

    申请号：US14747507

    申请日：2015-06-23

    Applicant: XINTEC INC.

    Inventor： Chien-Min Lin ,  Yu-Ting Huang ,  Chen-Ning Fu ,  Yen-Shih Ho

    IPC: B81B7/00 ,  B81C1/00 ,  H01L21/48 ,  H01L23/498

    CPC classification number: B81B7/007 ,  B81C1/00182 ,  B81C1/00269 ,  B81C2201/0197 ,  H01L21/4853 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A chip package includes a semiconductor chip, an interposer, a polymer adhesive supporting layer, a redistribution layer and a packaging layer. The semiconductor chip has a sensor device and a conductive pad electrically connected to the sensing device, and the interposer is disposed on the semiconductor chip. The interposer has a trench and a through hole, which the trench exposes a portion of the sensing device, and the through hole exposes the conductive pad. The polymer adhesive supporting layer is interposed between the semiconductor chip and the interposer, and the redistribution layer is disposed on the interposer and in the through hole to be electrically connected to the conductive pad. The packaging layer covers the interposer and the redistribution layer, which the packaging layer has an opening exposing the trench.

    Abstract translation: 芯片封装包括半导体芯片，插入件，聚合物粘合剂支撑层，再分布层和包装层。 半导体芯片具有传感器装置和与感测装置电连接的导电焊盘，并且插入器设置在半导体芯片上。 插入器具有沟槽和通孔，沟槽暴露感测装置的一部分，并且通孔暴露导电垫。 聚合物粘合剂支撑层插入在半导体芯片和插入件之间，并且再分配层设置在插入件上和通孔中以与导电焊盘电连接。 包装层覆盖插入件和再分配层，其中封装层具有露出沟槽的开口。

    SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
    37.
    发明申请
    SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF 有权
    半导体封装及其制造方法

    公开(公告)号：US20160118506A1

    公开(公告)日：2016-04-28

    申请号：US14570949

    申请日：2014-12-15

    Applicant: XINTEC INC.

    Inventor： Chien-Hung LIU

    IPC: H01L31/0203 ,  H01L35/02 ,  H01L35/34 ,  H01L31/18 ,  H01L31/02

    CPC classification number: H01L35/08 ,  G01J5/024 ,  G01J5/045 ,  G01J5/20 ,  H01L21/78 ,  H01L23/053 ,  H01L23/3178 ,  H01L23/3185 ,  H01L23/498 ,  H01L24/33 ,  H01L24/94 ,  H01L27/14618 ,  H01L27/1462 ,  H01L27/14636 ,  H01L27/14685 ,  H01L27/14687 ,  H01L31/02005 ,  H01L31/0203 ,  H01L31/1876 ,  H01L35/02 ,  H01L35/10 ,  H01L35/34 ,  H01L2224/11

    Abstract: A semiconductor package includes a substrate, at least one support, a cover, and a plate. The substrate has at least one light sensor or thermal sensor, a first surface, and a second surface opposite to the first surface. The light sensor or the thermal sensor is disposed on the first surface. The second surface has an opening to expose the light sensor (or the thermal sensor). The support is disposed on the first surface. The cover is disposed on the support, such that the cover is above the light sensor (or the thermal sensor) to form a first space between the cover and the light sensor (or the thermal sensor). The plate is placed on the second surface to cover the opening, such that a second space is formed between the plate and the light sensor (or the thermal sensor).

    Abstract translation: 半导体封装包括基板，至少一个支撑件，盖板和板。 衬底具有至少一个光传感器或热传感器，第一表面和与第一表面相对的第二表面。 光传感器或热传感器设置在第一表面上。 第二表面具有露出光传感器（或热传感器）的开口。 支撑件设置在第一表面上。 盖子设置在支撑件上，使得盖子在光传感器（或热传感器）上方，以在盖和光传感器（或热传感器）之间形成第一空间。 板被放置在第二表面上以覆盖开口，使得在板和光传感器（或热传感器）之间形成第二空间。

    CHIP PACKAGE AND METHOD OF MANUFACTURING THE SAME
    38.
    发明申请
    CHIP PACKAGE AND METHOD OF MANUFACTURING THE SAME 有权
    芯片包装及其制造方法

    公开(公告)号：US20160111555A1

    公开(公告)日：2016-04-21

    申请号：US14971395

    申请日：2015-12-16

    Applicant: XINTEC INC.

    Inventor： Tsang-Yu LIU ,  Shu-Ming CHANG ,  Po-Han LEE

    IPC: H01L31/0203 ,  H01L31/02 ,  H01L31/18

    CPC classification number: H01L31/0203 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/12 ,  H01L24/13 ,  H01L31/02005 ,  H01L31/18 ,  H01L2224/131 ,  H01L2224/73253 ,  Y02P70/521 ,  H01L2924/014

    Abstract: A method of manufacturing chip package includes providing a semiconductor wafer having a plurality of semiconductor chips. An outer spacer and a plurality of inner spacers are formed on the semiconductor wafer. A protection lid is formed and disposed on the outer spacer and the inner spacers. A plurality of cavities is formed on each of the semiconductor chips from a lower surface thereof to expose the conductive pad disposed on the upper surface of the semiconductor chip. A plurality of conductive portions is formed and fills each of the cavities and electrically connected to each of the conductive pads. A plurality of solder balls is disposed on the lower surface and electrically connected to each of the conductive portions. The semiconductor chips are separated by cutting along a plurality of cutting lines between each of the semiconductor chips.

    Abstract translation: 制造芯片封装的方法包括提供具有多个半导体芯片的半导体晶片。 在半导体晶片上形成有外隔离物和多个内隔离物。 保护盖形成并设置在外隔离件和内间隔件上。 从其下表面在每个半导体芯片上形成多个空腔，以露出设置在半导体芯片的上表面上的导电焊盘。 形成多个导电部分，并填充每个空腔并电连接到每个导电焊盘。 多个焊球设置在下表面并电连接到每个导电部分。 半导体芯片通过沿着每个半导体芯片之间的多个切割线进行切割来分离。

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