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31.
公开(公告)号:US20140248780A1
公开(公告)日:2014-09-04
申请号:US14186059
申请日:2014-02-21
Applicant: Applied Materials, Inc.
Inventor: Nitin K. Ingle , Dmitry Lubomirsky , Xinglong Chen , Shankar Venkataraman
IPC: H01L21/3065
CPC classification number: H01L21/3065 , H01J37/32082 , H01J37/32357 , H01J37/3244 , H01J37/32449 , H01J2237/334
Abstract: Methods of etching a patterned substrate may include flowing an oxygen-containing precursor into a first remote plasma region fluidly coupled with a substrate processing region. The oxygen-containing precursor may be flowed into the region while forming a plasma in the first remote plasma region to produce oxygen-containing plasma effluents. The methods may also include flowing a fluorine-containing precursor into a second remote plasma region fluidly coupled with the substrate processing region while forming a plasma in the second remote plasma region to produce fluorine-containing plasma effluents. The methods may include flowing the oxygen-containing plasma effluents and fluorine-containing plasma effluents into the processing region, and using the effluents to etch a patterned substrate housed in the substrate processing region.
Abstract translation: 蚀刻图案化衬底的方法可以包括使含氧前体流入与衬底处理区流体耦合的第一远程等离子体区域。 可以在第一远程等离子体区域中形成等离子体的同时将含氧前体流入该区域以产生含氧等离子体流出物。 所述方法还可以包括使含氟前体流入与基板处理区流体耦合的第二远程等离子体区域,同时在第二远程等离子体区域中形成等离子体以产生含氟等离子体流出物。 所述方法可以包括将含氧等离子体流出物和含氟等离子体流出物流入处理区域,并且使用流出物蚀刻容纳在基板处理区域中的图案化基板。
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公开(公告)号:US20230223281A1
公开(公告)日:2023-07-13
申请号:US18175104
申请日:2023-02-27
Applicant: Applied Materials, Inc.
Inventor: Toan Q. Tran , Zilu Weng , Dmitry Lubomirsky , Satoru Kobayashi , Tae Seung Cho , Soonam Park , Son M. Phi , Shankar Venkataraman
IPC: H01L21/67 , H01L21/3065 , H01L21/683 , H01J37/32 , H01L21/687 , H01L21/311
CPC classification number: H01L21/67069 , H01J37/32715 , H01L21/3065 , H01L21/6831 , H01L21/67103 , H01L21/67248 , H01L21/68757 , H01L21/68785 , H01L21/68792 , H01L21/31116 , H01L21/31138
Abstract: A wafer chuck assembly includes a puck, a shaft and a base. The puck includes an electrically insulating material that defines a top surface of the puck; a plurality of electrodes are embedded within the electrically insulating material. The puck also includes an inner puck element that forms one or more channels for a heat exchange fluid, the inner puck element being in thermal communication with the electrically insulating material, and an electrically conductive plate disposed proximate to the inner puck element. The shaft includes an electrically conductive shaft housing that is electrically coupled with the plate, and a plurality of connectors, including electrical connectors for the electrodes. The base includes an electrically conductive base housing that is electrically coupled with the shaft housing, and an electrically insulating terminal block disposed within the base housing, the plurality of connectors passing through the terminal block.
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公开(公告)号:US20220037126A1
公开(公告)日:2022-02-03
申请号:US16983164
申请日:2020-08-03
Applicant: Applied Materials, Inc.
Inventor: Jennifer Y. Sun , Ren-Guan Duan , Gayatri Natu , Tae Won Kim , Jiyong Huang , Nitin Deepak , Paul Brillhart , Lin Zhang , Yikai Chen , Sanni Sinikka Seppälä , Ganesh Balasubramanian , JuanCarlos Rocha , Shankar Venkataraman , Katherine Elizabeth Woo
IPC: H01J37/32 , C23C16/30 , C23C16/455 , C23C16/44
Abstract: Embodiments of the disclosure relate to articles, coated chamber components and methods of coating chamber components with a protective coating that includes at least one metal fluoride having a formula selected from the group consisting of M1xFw, M1xM2yFw and M1xM2yM3zFw, where at least one of M1, M2, or M3 is magnesium or lanthanum. The protective coating can be deposited by atomic layer deposition, chemical vapor deposition, electron beam ion assisted deposition, or physical vapor deposition.
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公开(公告)号:US10468285B2
公开(公告)日:2019-11-05
申请号:US15642977
申请日:2017-07-06
Applicant: Applied Materials, Inc.
Inventor: Toan Q. Tran , Sultan Malik , Dmitry Lubomirsky , Shambhu N. Roy , Satoru Kobayashi , Tae Seung Cho , Soonam Park , Shankar Venkataraman
IPC: H01L21/683 , H01L21/3065 , H01L21/67
Abstract: A wafer chuck assembly includes a puck, a shaft and a base. An insulating material defines a top surface of the puck, a heater element is embedded within the insulating material, and a conductive plate lies beneath the insulating material. The shaft includes a housing coupled with the plate, and electrical connectors for the heater elements and the electrodes. A conductive base housing couples with the shaft housing, and the connectors pass through a terminal block within the base housing. A method of plasma processing includes loading a workpiece onto a chuck having an insulating top surface, providing a DC voltage differential across two electrodes within the top surface, heating the chuck by passing current through heater elements, providing process gases in a chamber surrounding the chuck, and providing an RF voltage between a conductive plate beneath the chuck, and one or more walls of the chamber.
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公开(公告)号:US10354843B2
公开(公告)日:2019-07-16
申请号:US15581357
申请日:2017-04-28
Applicant: Applied Materials, Inc.
Inventor: Qiwei Liang , Xinglong Chen , Kien Chuc , Dmitry Lubomirsky , Soonam Park , Jang-Gyoo Yang , Shankar Venkataraman , Toan Tran , Kimberly Hinckley , Saurabh Garg
IPC: C23C16/455 , H01J37/32 , B05B1/00 , C23C16/452 , B05B1/18 , C23C16/50 , H01L21/67
Abstract: Gas distribution assemblies are described including an annular body, an upper plate, and a lower plate. The upper plate may define a first plurality of apertures, and the lower plate may define a second and third plurality of apertures. The upper and lower plates may be coupled with one another and the annular body such that the first and second apertures produce channels through the gas distribution assemblies, and a volume is defined between the upper and lower plates.
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公开(公告)号:US10319649B2
公开(公告)日:2019-06-11
申请号:US15484985
申请日:2017-04-11
Applicant: Applied Materials, Inc.
Inventor: Tae Seung Cho , Soonam Park , Junghoon Kim , Dmitry Lubomirsky , Shankar Venkataraman
Abstract: Methods and systems for etching substrates using a remote plasma are described. Remotely excited etchants are formed in a remote plasma and flowed through a showerhead into a substrate processing region to etch the substrate. Optical emission spectra are acquired from the substrate processing region just above the substrate. The optical emission spectra may be used to determine an endpoint of the etch, determine the etch rate or otherwise characterize the etch process. A weak plasma may be present in the substrate processing region. The weak plasma may have much lower intensity than the remote plasma. In cases where no bias plasma is used above the substrate in an etch process, a weak plasma may be ignited near a viewport disposed near the side of the substrate processing region to characterize the etchants.
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公开(公告)号:US20180294198A1
公开(公告)日:2018-10-11
申请号:US15484985
申请日:2017-04-11
Applicant: Applied Materials, Inc.
Inventor: Tae Seung Cho , Soonam Park , Junghoon Kim , Dmitry Lubomirsky , Shankar Venkataraman
IPC: H01L21/66 , G01N21/73 , H01L21/3065 , H01L21/67 , H01J37/32
CPC classification number: H01L22/26 , G01N21/73 , G01N2201/08 , G01N2201/0833 , H01J37/32082 , H01J37/32568 , H01J37/32743 , H01J2237/3341 , H01L21/31116 , H01L21/67253
Abstract: Methods and systems for etching substrates using a remote plasma are described. Remotely excited etchants are formed in a remote plasma and flowed through a showerhead into a substrate processing region to etch the substrate. Optical emission spectra are acquired from the substrate processing region just above the substrate. The optical emission spectra may be used to determine an endpoint of the etch, determine the etch rate or otherwise characterize the etch process. A weak plasma may be present in the substrate processing region. The weak plasma may have much lower intensity than the remote plasma. In cases where no bias plasma is used above the substrate in an etch process, a weak plasma may be ignited near a viewport disposed near the side of the substrate processing region to characterize the etchants.
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公开(公告)号:US09991134B2
公开(公告)日:2018-06-05
申请号:US14246915
申请日:2014-04-07
Applicant: APPLIED MATERIALS, INC.
Inventor: Anchuan Wang , Xinglong Chen , Zihui Li , Hiroshi Hamana , Zhijun Chen , Ching-Mei Hsu , Jiayin Huang , Nitin K. Ingle , Dmitry Lubomirsky , Shankar Venkataraman , Randhir Thakur
IPC: C23C16/44 , H01J37/32 , H01L21/02 , H01L21/263 , H01L21/268 , H01L21/306 , H01L21/3065 , H01L21/3105 , H01L21/311 , H01L21/3213 , H01L21/324 , H01L21/67 , H01L21/677 , H01L21/683
CPC classification number: H01L21/324 , C23C16/4405 , H01J37/32357 , H01J37/32862 , H01L21/02041 , H01L21/02057 , H01L21/0206 , H01L21/263 , H01L21/2686 , H01L21/30604 , H01L21/3065 , H01L21/3105 , H01L21/31111 , H01L21/31116 , H01L21/31144 , H01L21/32136 , H01L21/32137 , H01L21/67069 , H01L21/67075 , H01L21/6708 , H01L21/67109 , H01L21/67115 , H01L21/67184 , H01L21/6719 , H01L21/67196 , H01L21/67201 , H01L21/67207 , H01L21/67248 , H01L21/67253 , H01L21/67288 , H01L21/67703 , H01L21/67739 , H01L21/67742 , H01L21/6831
Abstract: Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools.
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公开(公告)号:US09406523B2
公开(公告)日:2016-08-02
申请号:US14309625
申请日:2014-06-19
Applicant: Applied Materials, Inc.
Inventor: Zhijun Chen , Zihui Li , Nitin K. Ingle , Anchuan Wang , Shankar Venkataraman
IPC: B44C1/22 , C03C15/00 , C03C25/68 , C23F1/00 , H01L21/302 , H01L21/461 , H01L21/311 , H01L21/02 , H01L21/033 , H01L21/3213 , H01L21/70
CPC classification number: H01L21/31116 , H01J37/32357 , H01J2237/334 , H01L21/02164 , H01L21/0337 , H01L21/31138 , H01L21/31144 , H01L21/32139 , H01L21/70
Abstract: A method of etching doped silicon oxide on patterned heterogeneous structures is described and includes a gas phase etch using partial remote plasma excitation. The remote plasma excites a fluorine-containing precursor and the plasma effluents created are flowed into a substrate processing region. A hydrogen-containing precursor, e.g. water, is concurrently flowed into the substrate processing region without plasma excitation. The plasma effluents are combined with the unexcited hydrogen-containing precursor in the substrate processing region where the combination reacts with the doped silicon oxide. The plasmas effluents react with the patterned heterogeneous structures to selectively remove doped silicon oxide.
Abstract translation: 描述了在图案化的异质结构上蚀刻掺杂的氧化硅的方法,并且包括使用部分远程等离子体激发的气相蚀刻。 远程等离子体激发含氟前体,产生的等离子体流出物流入基板处理区域。 含氢前体,例如 水同时流入基板处理区域而没有等离子体激发。 将等离子体流出物与基板处理区域中的未喷射含氢前体结合,其中组合与掺杂的氧化硅反应。 等离子体流出物与图案化的异质结构反应以选择性地去除掺杂的氧化硅。
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40.
公开(公告)号:US09378978B2
公开(公告)日:2016-06-28
申请号:US14448901
申请日:2014-07-31
Applicant: Applied Materials, Inc.
Inventor: Vinod R. Purayath , Randhir Thakur , Shankar Venkataraman , Nitin K. Ingle
IPC: H01L21/3213 , H01L21/28 , H01L29/40 , H01L29/423 , H01L21/677
CPC classification number: H01L21/32137 , H01J37/32357 , H01L21/28035 , H01L21/28114 , H01L21/28273 , H01L21/31116 , H01L21/67739 , H01L21/76224 , H01L29/401 , H01L29/42324 , H01L29/66825
Abstract: Methods of etching back shallow trench isolation (STI) dielectric and trimming the exposed floating gate without breaking vacuum are described. The methods include recessing silicon oxide dielectric gapfill to expose vertical sidewalls of polysilicon floating gates. The exposed vertical sidewalls are then isotropically etched to evenly thin the polysilicon floating gates on the same substrate processing mainframe. Both recessing silicon oxide and isotropically etching polysilicon use remotely excited fluorine-containing apparatuses attached to the same mainframe to facilitate performing both operations without an intervening atmospheric exposure. An inter-poly dielectric may then be conformally deposited either on the same mainframe or outside the mainframe.
Abstract translation: 描述了在不破坏真空的情况下回蚀浅沟槽隔离(STI)电介质和修整暴露的浮动栅极的方法。 这些方法包括凹陷氧化硅电介质间隙填充以暴露多晶硅浮动栅极的垂直侧壁。 然后对暴露的垂直侧壁进行各向同性蚀刻,以在相同的基板处理主机上均匀地稀薄多晶硅浮动栅极。 凹陷氧化硅和各向同性蚀刻多晶硅都使用连接在同一主机上的远程激发的含氟设备,以便于在没有中间大气暴露的情况下进行两种操作。 然后可将多晶硅电介质保形地沉积在同一主机上或主机外部。
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