公开(公告)号：US20120015532A1

公开(公告)日：2012-01-19

申请号：US12837640

申请日：2010-07-16

申请人： Voya R. Markovich ,  Ronald V. Smith ,  How T. Lin ,  Frank D. Egitto ,  Rabindra N. Das ,  William E. Wilson ,  Rajinder S. Rai

发明人： Voya R. Markovich ,  Ronald V. Smith ,  How T. Lin ,  Frank D. Egitto ,  Rabindra N. Das ,  William E. Wilson ,  Rajinder S. Rai

IPC分类号： H01R12/00 ,  H01L21/66

CPC分类号： H05K3/3436 ,  H05K1/111 ,  H05K2201/10378 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/4919

摘要： A flexible, high density decal and the use thereof methods of forming detachable electrical interconnections between a flexible chip carrier and a printed wiring board. The flexible decal has fine-pitch pads on a first surface and pads of a pitch wider than the fine pitch on a second surface, the fine-pitch pads on the first surface designed to electrically connect to a semiconductor device, and the wider-pitch pads on the second surface designed to electrically connect to a printed wiring board or the like. The pads on the first surface are conductively wired to the pads on the second surface through one or more insulating levels in the flexible decal.

摘要翻译： 柔性，高密度贴花及其在柔性芯片载体和印刷线路板之间形成可拆卸电互连的方法。 柔性贴花在第一表面上具有细间距焊盘，并且在第二表面上具有比微细间距更宽的间距的焊盘，设计成电连接到半导体器件的第一表面上的细间距焊盘和较宽间距 第二表面上的焊盘被设计成电连接到印刷线路板等。 第一表面上的焊盘通过柔性贴花中的一个或多个绝缘水平导电地连接到第二表面上的焊盘。

公开(公告)号：US07981245B2

公开(公告)日：2011-07-19

申请号：US11872942

申请日：2007-10-16

申请人： Frank D. Egitto ,  Donald S. Farquhar ,  Voya R. Markovich ,  Mark D. Poliks ,  Douglas O. Powell

发明人： Frank D. Egitto ,  Donald S. Farquhar ,  Voya R. Markovich ,  Mark D. Poliks ,  Douglas O. Powell

IPC分类号： C08J5/00

CPC分类号： H01L21/4853 ,  H01L23/3735 ,  H01L23/49822 ,  H01L2224/16225 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/114 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4608 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4626 ,  H05K3/4632 ,  H05K3/4641 ,  H05K3/4688 ,  H05K2201/0141 ,  H05K2201/0191 ,  H05K2201/068 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/10378 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T156/1092

摘要： A multi-layered interconnect structure and method of formation. In a first embodiment, first and second liquid crystal polymer (LCP) dielectric layers are directly bonded, respectively, to first and second opposing surface of a thermally conductive layer, with no extrinsic adhesive material bonding the thermally conductive layer with either the first or second LCP dielectric layer. In a second embodiment, first and second 2S1P substructures are directly bonded, respectively, to first and second opposing surfaces of a LCP dielectric joining layer, with no extrinsic adhesive material bonding the LCP dielectric joining layer with either the first or second 2S1P substructures.

摘要翻译： 多层互连结构和形成方法。 在第一实施例中，第一和第二液晶聚合物（LCP）电介质层分别直接接合到导热层的第一和第二相对表面，没有外在粘合材料将导热层与第一或第二液晶聚合物 LCP电介质层。 在第二实施例中，第一和第二2S1P子结构分别直接接合到LCP电介质接合层的第一和第二相对表面，没有外部粘合材料将LCP电介质接合层与第一或第二2S1P子结构结合。

公开(公告)号：US07823274B2

公开(公告)日：2010-11-02

申请号：US11905188

申请日：2007-09-28

申请人： Frank D. Egitto ,  Voya R. Markovich ,  Luis J. Matienzo

发明人： Frank D. Egitto ,  Voya R. Markovich ,  Luis J. Matienzo

IPC分类号： H05K3/46

CPC分类号： H05K3/462 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/445 ,  H05K2201/015 ,  H05K2201/0245 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/1152 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A method of making a multilayered circuitized substrate assembly which includes bonding at least two circuitized substrates each including at least one layer of high temperature dielectric material, one of these layers in turn including at least one thru-hole therein having therein a quantity of a a low temperature conductive paste, the paste including an organic binder component and at least one metallic component. The flakes of the metallic component are sintered during the bonding to form a conductive path through the dielectric of one of the substrates.

摘要翻译： 一种制造多层电路化基板组件的方法，该方法包括粘合至少两个电路化基板，每个电路基板包括至少一层高温介电材料，这些层中的一个依次包括至少一个其中具有一定数量的低电介质材料的通孔 所述膏体包含有机粘合剂成分和至少一种金属成分。 金属部件的薄片在接合期间被烧结以形成通过其中一个基板的电介质的导电路径。

公开(公告)号：US07803688B2

公开(公告)日：2010-09-28

申请号：US12380616

申请日：2009-03-02

申请人： Rabindra N. Das ,  Frank D. Egitto ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

发明人： Rabindra N. Das ,  Frank D. Egitto ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

IPC分类号： H01L21/20

CPC分类号： H05K1/162 ,  H01L27/12 ,  H01L28/40 ,  H05K1/0306 ,  H05K3/125 ,  H05K3/4667 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2203/013

摘要： A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.

摘要翻译： 电容性基板及其制造方法，其中使用第一和第二玻璃层。 第一导体形成在第一玻璃层上，并且电容电介质材料位于导体上方。 然后将第二导体定位在电容电介质上，并且第二玻璃层位于第二导体上。 形成导电通孔以分别耦合到第一和第二导体，使得当电容基板工作时，导体和电容电介质材料形成电容器。

公开(公告)号：US07738249B2

公开(公告)日：2010-06-15

申请号：US11976468

申请日：2007-10-25

申请人： Benson Chan ,  Frank D. Egitto ,  How T. Lin ,  Roy H. Magnuson ,  Voya R. Markovich ,  David L. Thomas

发明人： Benson Chan ,  Frank D. Egitto ,  How T. Lin ,  Roy H. Magnuson ,  Voya R. Markovich ,  David L. Thomas

IPC分类号： H05K7/20

CPC分类号： H05K1/0206 ,  H01L2924/0002 ,  H05K1/0272 ,  H05K3/0061 ,  H05K3/44 ,  H05K2201/064 ,  H05K2201/09745 ,  H05K2201/10674 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T428/24917 ,  H01L2924/00

摘要： An electrical assembly which includes a circuitized substrate including a first plurality of dielectric and electrically conductive circuit layers alternatively oriented in a stacked orientation, a thermal cooling structure bonded to one of the dielectric layers and at least one electrical component mounted on the circuitized substrate. The circuitized substrate includes a plurality of electrically conductive and thermally conductive thru-holes located therein, selected ones of the thermally conductive thru-holes thermally coupled to the electrical component(s) and extending through the first plurality of dielectric and electrically conductive circuit layers and being thermally coupled to the thermal cooling structure, each of these selected ones of thermally conductive thru-holes providing a thermal path from the electrical component to the thermal cooling structure during assembly operation. The thermal cooling structure is adapted for having cooling fluid pass there-through during operation of the assembly. A method of making the substrate is also provided.

摘要翻译： 一种电气组件，其包括电路化衬底，其包括以层叠取向交替取向的第一多个电介质和导电电路层，结合到所述电介质层之一的热冷结构和安装在所述电路化衬底上的至少一个电气部件。 电路化衬底包括位于其中的多个导电和导热通孔，选择的导热通孔热耦合到电气部件并延伸穿过第一多个电介质和导电电路层，并且 热耦合到热冷却结构，这些选择的导热通孔中的每一个在组装操作期间提供从电气部件到热冷却结构的热路径。 热冷却结构适于在组件的操作期间使冷却流体通过。 还提供了制造基板的方法。

公开(公告)号：US07679005B2

公开(公告)日：2010-03-16

申请号：US11401401

申请日：2006-04-11

申请人： Benson Chan ,  Frank D. Egitto ,  Roy H. Magnuson ,  Voya R. Markovich ,  David L. Thomas

发明人： Benson Chan ,  Frank D. Egitto ,  Roy H. Magnuson ,  Voya R. Markovich ,  David L. Thomas

IPC分类号： H01R12/04 ,  H05K1/11 ,  H01K3/10

CPC分类号： G06K7/084 ,  G06K17/00 ,  G06K19/005 ,  G06K19/07354 ,  G06K2017/0064 ,  H05K1/0221 ,  H05K1/0222 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/09809 ,  H05K2203/0733 ,  Y10T29/49165

摘要： A circuitized substrate in which selected ones of the signal conductors are substantially surrounded by shielding members which shield the conductors during passage of high frequency signals, e.g., to reduce noise. The shielding members may form solid members which lie parallel and/or perpendicular to the signal conductors, and may also be substantially cylindrical in shape to surround a conductive thru-hole which also forms part of the substrate. An electrical assembly and an information handling system are also defined.

摘要翻译： 电路化基板，其中所选择的信号导体基本上由在高频信号通过期间屏蔽导体的屏蔽构件包围，例如降低噪声。 屏蔽构件可以形成平行和/或垂直于信号导体的固体构件，并且也可以基本上为圆柱形，以包围也形成衬底的一部分的导电通孔。 还定义了电组件和信息处理系统。

公开(公告)号：US20090206051A1

公开(公告)日：2009-08-20

申请号：US12380616

申请日：2009-03-02

申请人： Rabindra N. Das ,  Frank D. Egitto ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

发明人： Rabindra N. Das ,  Frank D. Egitto ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

IPC分类号： H01G13/00 ,  B05D5/12 ,  C23C14/34 ,  C23C14/30 ,  B05D3/00

CPC分类号： H05K1/162 ,  H01L27/12 ,  H01L28/40 ,  H05K1/0306 ,  H05K3/125 ,  H05K3/4667 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2203/013

摘要： A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.

摘要翻译： 电容性基板及其制造方法，其中使用第一和第二玻璃层。 第一导体形成在第一玻璃层上，并且电容电介质材料位于导体上方。 然后将第二导体定位在电容电介质上，并且第二玻璃层位于第二导体上。 形成导电通孔以分别耦合到第一和第二导体，使得当电容基板工作时，导体和电容电介质材料形成电容器。

公开(公告)号：US20080244902A1

公开(公告)日：2008-10-09

申请号：US11783306

申请日：2007-04-09

申请人： Kim J. Blackwell ,  Frank D. Egitto ,  John M. Lauffer ,  Voya R. Markovich

发明人： Kim J. Blackwell ,  Frank D. Egitto ,  John M. Lauffer ,  Voya R. Markovich

IPC分类号： H05K3/00

CPC分类号： H05K1/186 ,  H01L23/4985 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K3/4611 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/10515 ,  H05K2201/10681 ,  Y10T29/49126 ,  Y10T29/49151 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/0401

摘要： A circuitized substrate assembly comprised of at least two circuitized substrates each including a thin dielectric layer and a conductive layer with a plurality of conductive members as part thereof, the conductive members of each substrate being electrically coupled to the conductive sites of a semiconductor chip. A dielectric layer is positioned between both substrates and the substrates are bonded together, such that the chips are internally located within the assembly and oriented in a stacked orientation. A method of making such an assembly is also provided, as is an electrical assembly utilizing same and an information handling system adapted for having such an electrical assembly as part thereof.

摘要翻译： 电路化衬底组件由至少两个电路化衬底组成，每个衬底均包括薄介电层和具有多个导电构件作为其一部分的导电层，每个衬底的导电构件电耦合到半导体芯片的导电部位。 电介质层位于两个基板之间，并且基板接合在一起，使得芯片在内部位于组件内并且以堆叠取向定向。 还提供了制造这种组件的方法，以及使用其的电组件以及适于将这种电组件作为其一部分的信息处理系统。

公开(公告)号：US20080178999A1

公开(公告)日：2008-07-31

申请号：US11872942

申请日：2007-10-16

申请人： Frank D. Egitto ,  Donald S. Farquhar ,  Voya R. Markovich ,  Mark D. Poliks ,  Douglas O. Powell

发明人： Frank D. Egitto ,  Donald S. Farquhar ,  Voya R. Markovich ,  Mark D. Poliks ,  Douglas O. Powell

IPC分类号： B32B37/04

CPC分类号： H01L21/4853 ,  H01L23/3735 ,  H01L23/49822 ,  H01L2224/16225 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/114 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4608 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4626 ,  H05K3/4632 ,  H05K3/4641 ,  H05K3/4688 ,  H05K2201/0141 ,  H05K2201/0191 ,  H05K2201/068 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/10378 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T156/1092

摘要： A multi-layered interconnect structure and method of formation. In a first embodiment, first and second liquid crystal polymer (LCP) dielectric layers are directly bonded, respectively, to first and second opposing surface of a thermally conductive layer, with no extrinsic adhesive material bonding the thermally conductive layer with either the first or second LCP dielectric layer. In a second embodiment, first and second 2S1P substructures are directly bonded, respectively, to first and second opposing surfaces of a LCP dielectric joining layer, with no extrinsic adhesive material bonding the LCP dielectric joining layer with either the first or second 2S1P substructures.

公开(公告)号：US07334323B2

公开(公告)日：2008-02-26

申请号：US11177413

申请日：2005-07-11

申请人： Frank D. Egitto ,  Voya R. Markovich ,  Luis J. Matienzo

发明人： Frank D. Egitto ,  Voya R. Markovich ,  Luis J. Matienzo

IPC分类号： H05K3/36

CPC分类号： H05K3/462 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/445 ,  H05K2201/015 ,  H05K2201/0245 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/1152 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T156/1056 ,  Y10T156/1062

摘要： A method of making a circuitized substrate which includes a high temperature dielectric material in combination with a low temperature conductive paste, the paste including an organic binder component and at least one metallic component. The flakes of the metallic component are sintered to form a conductive path through the dielectric when the dielectric is used as a layer in the substrate.

摘要翻译： 一种制造电路化基板的方法，该基板包括与低温导电浆料组合的高温电介质材料，所述糊料包括有机粘合剂成分和至少一种金属成分。 当电介质用作衬底中的层时，金属部件的薄片被烧结以形成通过电介质的导电路径。