公开(公告)号：US06933586B2

公开(公告)日：2005-08-23

申请号：US10290616

申请日：2002-11-08

申请人： Ann R Fornof ,  Jeffrey C Hedrick ,  Kang-Wook Lee ,  Christy S Tyberg

发明人： Ann R Fornof ,  Jeffrey C Hedrick ,  Kang-Wook Lee ,  Christy S Tyberg

IPC分类号： H01L21/316 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L29/00

CPC分类号： H01L21/22 ,  H01L21/02118 ,  H01L21/02126 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02282 ,  H01L21/02362 ,  H01L21/31695 ,  H01L21/76801 ,  H01L21/76807 ,  H01L21/7682 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76835 ,  H01L23/5222 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1047 ,  H01L2924/0002 ,  Y10T428/31663 ,  H01L2924/00

摘要： An electrical interconnect structure on a substrate, includes a first porous dielectric layer with surface region from which a porogen has been removed; and an etch stop layer disposed upon the first porous dielectric layer so that the etch stop layer extends to partially fill pores in the surface region of the first porous dielectric layer from which the porogen has been removed, thus improving adhesion during subsequent processing. The porogen may be removed from the surface region by heating, and in particular by hot plate baking. A second porous dielectric layer, which may have the same composition as the first porous dielectric layer, may be formed over the etch stop layer. Electrical vias and lines may be formed in the first and second porous dielectric layer, respectively. The layers may be part of a multilayer stack, wherein all of the layers are cured simultaneously in a spin application tool porous dielectric layer.

公开(公告)号：US06854778B2

公开(公告)日：2005-02-15

申请号：US10330333

申请日：2002-12-30

申请人： Kang-Wook Lee

发明人： Kang-Wook Lee

IPC分类号： B60N3/00 ,  B60N3/12 ,  B60R7/06

CPC分类号： B60N3/002 ,  B60N3/12 ,  B60R7/06

摘要： An upper tray mounted on an instrument panel of a vehicle includes a receiving member mounted on an upper portion of the instrument panel. A hinge member is movably attached to the receiving member. A cover member is joined to the hinge member to rotate about a fixed pivot and configured to close the receiving member. A coil spring connects the hinge member with the receiving member. The coil spring is configured to provide a force in a direction that the cover member opens.

摘要翻译： 安装在车辆的仪表板上的上托盘包括安装在仪表板上部的接收构件。 铰链构件可移动地附接到接收构件。 盖构件连接到铰链构件以围绕固定枢轴旋转并且构造成关闭接收构件。 螺旋弹簧将铰链构件与接收构件连接。 螺旋弹簧构造成在盖构件打开的方向上提供力。

公开(公告)号：US5786041A

公开(公告)日：1998-07-28

申请号：US476214

申请日：1995-06-07

申请人： Atsushi Takenaka ,  Kenichi Tajima ,  Hideo Takano ,  Shui-Chih A. Lien ,  Kang-Wook Lee

发明人： Atsushi Takenaka ,  Kenichi Tajima ,  Hideo Takano ,  Shui-Chih A. Lien ,  Kang-Wook Lee

IPC分类号： G02F1/1337

CPC分类号： G02F1/133788 ,  G02F1/133711 ,  Y10T428/1005

摘要： An alignment-film in which the pretilt angle is changed by ultraviolet irradiation, a material for forming the same, a liquid crystal display device using the alignment film, a method for producing an alignment-film formation material, and a method for producing an alignment film. Ultraviolet irradiation causes large changes in pretilt angle but few changes in electrical characteristics, and a liquid crystal display device free from deterioration of the liquid crystal, image sticking, or the occurrence of flicker results. A first polymer forms the underlying principal layer and a second polymer forms thereon a surface layer thinner than the principal layer. The first polymer may exhibit a small change in electrical characteristics due to ultraviolet radiation and the second polymer may exhibit a large change in pretilt angle due to ultraviolet radiation.

摘要翻译： 其中通过紫外线照射改变预倾斜角度的取向膜，其形成用材料，使用取向膜的液晶显示装置，取向膜形成材料的制造方法以及对准膜的制造方法 电影。 紫外线照射引起预倾角变化大，电特性变化小，液晶显示装置没有劣化，图像残留，闪烁现象等。 第一聚合物形成下面的主要层，并且第二聚合物在其上形成比主层更薄的表面层。 第一聚合物可能由于紫外线辐射而表现出小的电特性变化，并且第二聚合物可能由于紫外线辐射而呈现预倾角变化大。

公开(公告)号：US5151304A

公开(公告)日：1992-09-29

申请号：US644063

申请日：1991-01-22

申请人： Kang-Wook Lee

发明人： Kang-Wook Lee

IPC分类号： C08G73/10 ,  B05D3/02 ,  B05D3/10 ,  C08J7/04 ,  C08J7/12 ,  C23C14/02 ,  C23C14/20 ,  H05K1/03 ,  H05K3/38

CPC分类号： C08J7/12 ,  B05D3/10 ,  C23C14/02 ,  C23C14/20 ,  B05D2202/10 ,  B05D2505/50 ,  B05D3/0254 ,  C08J2379/08 ,  H05K1/0346 ,  H05K3/381

摘要： The surface of a substrate made of substantially crystalline polyimide is converted to form a layer of substantially amorphous polyimide. The substantially amorphous layer is formed by treating the crystalline polimide surface with a base followed by treatment with an acid to form a polyamic acid layer, which is reimidized to form a substantially amorphous layer by a low temperature heat cycle. Metals or polyimides can be deposited onto this amorphous layer, which is then cured to convert the amorphous layer to substantially crystalline polyimide. This process enhances the adhesion of the metal or polyimide layer without introducing contamination (new foreign materials or new functional groups) from surface treatments of adhesion layers.

摘要翻译： 将由基本上结晶的聚酰亚胺制成的基材的表面转化成基本无定形的聚酰亚胺层。 基本上非晶层通过用碱处理结晶聚酰亚胺表面然后用酸处理形成聚酰胺酸层而形成，其被重塑以通过低温热循环形成基本无定形的层。 可以将金属或聚酰亚胺沉积到该非晶层上，然后将其固化以将非晶层转化为基本上结晶的聚酰亚胺。 该过程增强了金属或聚酰亚胺层的粘附性，而不会从粘附层的表面处理中引入污染（新的异物或新的官能团）。

公开(公告)号：US08858205B2

公开(公告)日：2014-10-14

申请号：US13387446

申请日：2009-12-02

申请人： Kang-Wook Lee ,  Bum-Dong Sa

发明人： Kang-Wook Lee ,  Bum-Dong Sa

IPC分类号： F03C4/00 ,  F04C15/00 ,  F04C2/00 ,  F04C27/02 ,  F04C23/00 ,  F04C23/02 ,  F04C29/00 ,  F01C21/02 ,  F04C18/356 ,  F04C18/32 ,  F04C29/02

CPC分类号： F01C21/02 ,  F04C18/322 ,  F04C18/3564 ,  F04C23/008 ,  F04C23/02 ,  F04C29/0071 ,  F04C29/0085 ,  F04C29/023 ,  F04C2230/603 ,  F04C2240/10 ,  F04C2240/30 ,  F04C2240/40 ,  F04C2240/52 ,  F04C2240/60 ,  F04C2270/12

摘要： A compressor is provided in which a rotary member suspended on a stationary member is rotated to compress a refrigerant. The rotary member is suspended on a first stationary member and rotatably supported on a second stationary member spaced apart from the first stationary member, which achieves the structural stability and allows the components to be easily centered and assembled. A refrigerant suction passage and a refrigerant discharge passage are such that the refrigerant may be sucked and discharged without a valve.

摘要翻译： 提供了一种压缩机，其中悬挂在固定构件上的旋转构件旋转以压缩制冷剂。 旋转构件悬挂在第一固定构件上并且可旋转地支撑在与第一固定构件间隔开的第二固定构件上，这实现了结构稳定性并且允许构件容易地居中和组装。 制冷剂吸入通路和制冷剂排出通路使制冷剂在没有阀的情况下被抽吸排出。

公开(公告)号：US08368231B2

公开(公告)日：2013-02-05

申请号：US13154165

申请日：2011-06-06

申请人： Kang-Wook Lee ,  Gu-Sung Kim ,  Dong-Hyeon Jang ,  Seung-Duk Baek ,  Jae-Sik Chung

发明人： Kang-Wook Lee ,  Gu-Sung Kim ,  Dong-Hyeon Jang ,  Seung-Duk Baek ,  Jae-Sik Chung

IPC分类号： H01L23/48

CPC分类号： H01L25/50 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/05556 ,  H01L2224/05569 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  Y02P80/30 ,  Y10S438/977 ,  Y10T436/104998 ,  Y10T436/108331 ,  Y10T436/17 ,  Y10T436/175383 ,  H01L2224/81 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for manufacturing chip stack packages may include: providing at least two wafers, each wafer having a plurality of chips, and scribe lanes formed between and separating adjacent chips; forming a plurality of via holes in peripheral portions of the scribe lanes; forming connection vias by filling the via holes; establishing electrical connections between the chip pads and corresponding connection vias; removing material from the back sides of the wafers to form thinned wafers; separating the thinned wafers into individual chips by removing a central portion of each scribe lane; attaching a first plurality of individual chips to a test wafer; attaching a second plurality of individual chips to the first plurality of individual chips to form a plurality of chip stack structures; encapsulating the plurality of chip stack structures; and separating the plurality of chip stack structures to form individual chip stack packages.

公开(公告)号：US20110237004A1

公开(公告)日：2011-09-29

申请号：US13154165

申请日：2011-06-06

申请人： Kang-Wook Lee ,  Gu-Sung Kim ,  Dong-Hyeon Jang ,  Seung-Duk Baek ,  Jae-Sik Chung

发明人： Kang-Wook Lee ,  Gu-Sung Kim ,  Dong-Hyeon Jang ,  Seung-Duk Baek ,  Jae-Sik Chung

IPC分类号： H01L21/66

CPC分类号： H01L25/50 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/05556 ,  H01L2224/05569 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  Y02P80/30 ,  Y10S438/977 ,  Y10T436/104998 ,  Y10T436/108331 ,  Y10T436/17 ,  Y10T436/175383 ,  H01L2224/81 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for manufacturing chip stack packages may include: providing at least two wafers, each wafer having a plurality of chips, and scribe lanes formed between and separating adjacent chips; forming a plurality of via holes in peripheral portions of the scribe lanes; forming connection vias by filling the via holes; establishing electrical connections between the chip pads and corresponding connection vias; removing material from the back sides of the wafers to form thinned wafers; separating the thinned wafers into individual chips by removing a central portion of each scribe lane; attaching a first plurality of individual chips to a test wafer; attaching a second plurality of individual chips to the first plurality of individual chips to form a plurality of chip stack structures; encapsulating the plurality of chip stack structures; and separating the plurality of chip stack structures to form individual chip stack packages.

摘要翻译： 用于制造芯片堆叠封装的方法可以包括：提供至少两个晶片，每个晶片具有多个芯片，以及在相邻芯片之间形成并分隔相邻芯片的划线; 在划线的周边部分形成多个通孔; 通过填充通孔形成连接通孔; 建立芯片焊盘和相应的连接通孔之间的电连接; 从晶片的背面去除材料以形成薄的晶片; 通过去除每个划线的中心部分将薄的晶片分离成单独的芯片; 将第一多个独立芯片附接到测试晶片; 将第二多个独立芯片附接到所述第一多个独立芯片以形成多个芯片堆叠结构; 封装所述多个芯片堆叠结构; 以及分离所述多个芯片堆叠结构以形成单独的芯片堆叠封装。

公开(公告)号：US07977156B2

公开(公告)日：2011-07-12

申请号：US12385855

申请日：2009-04-22

申请人： Kang-Wook Lee ,  Gu-Sung Kim ,  Dong-Hyeon Jang ,  Seung-Duk Baek ,  Jae-Sik Chung

发明人： Kang-Wook Lee ,  Gu-Sung Kim ,  Dong-Hyeon Jang ,  Seung-Duk Baek ,  Jae-Sik Chung

IPC分类号： H01L21/00 ,  H01L21/26 ,  H01L21/44 ,  H01L29/40

CPC分类号： H01L25/50 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/05556 ,  H01L2224/05569 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  Y02P80/30 ,  Y10S438/977 ,  Y10T436/104998 ,  Y10T436/108331 ,  Y10T436/17 ,  Y10T436/175383 ,  H01L2224/81 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for manufacturing chip stack packages may include: providing at least two wafers, each wafer having a plurality of chips, and scribe lanes formed between and separating adjacent chips; forming a plurality of via holes in peripheral portions of the scribe lanes; forming connection vias by filling the via holes; establishing electrical connections between the chip pads and corresponding connection vias; removing material from the back sides of the wafers to form thinned wafers; separating the thinned wafers into individual chips by removing a central portion of each scribe lane; attaching a first plurality of individual chips to a test wafer; attaching a second plurality of individual chips to the first plurality of individual chips to form a plurality of chip stack structures; encapsulating the plurality of chip stack structures; and separating the plurality of chip stack structures to form individual chip stack packages.

摘要翻译： 用于制造芯片堆叠封装的方法可以包括：提供至少两个晶片，每个晶片具有多个芯片，以及在相邻芯片之间形成并分隔相邻芯片的划线; 在划线的周边部分形成多个通孔; 通过填充通孔形成连接通孔; 建立芯片焊盘和相应的连接通孔之间的电连接; 从晶片的背面去除材料以形成薄的晶片; 通过去除每个划线的中心部分将薄的晶片分离成单独的芯片; 将第一多个独立芯片附接到测试晶片; 将第二多个独立芯片附接到所述第一多个独立芯片以形成多个芯片堆叠结构; 封装所述多个芯片堆叠结构; 以及分离所述多个芯片堆叠结构以形成单独的芯片堆叠封装。

公开(公告)号：US07875552B2

公开(公告)日：2011-01-25

申请号：US12476793

申请日：2009-06-02

申请人： Ho-Jin Lee ,  Kang-Wook Lee ,  Myeong-Soon Park ,  Ju-il Choi ,  Son-Kwan Hwang

发明人： Ho-Jin Lee ,  Kang-Wook Lee ,  Myeong-Soon Park ,  Ju-il Choi ,  Son-Kwan Hwang

IPC分类号： H01L23/48

CPC分类号： H01L23/528 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/06181 ,  H01L2224/13009 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/48145 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/15311 ,  H01L2924/00012

摘要： Methods of forming an integrated circuit device include forming an interlayer dielectric layer on a first surface of a semiconductor substrate and then forming an interconnect hole that extends through the interlayer dielectric layer and into the semiconductor substrate. A first sidewall spacer layer is formed on a sidewall of the interconnect hole. The semiconductor substrate at a bottom of the interconnect hole is isotropically etched to define an undercut recess in the semiconductor substrate. This etching step is performed using the first sidewall spacer layer as an etching mask. The interconnect hole and the uncut recess are then filled with a through-via electrode. A second surface of the semiconductor substrate is removed for a sufficient duration to expose the uncut recess containing the through-via electrode.

摘要翻译： 形成集成电路器件的方法包括在半导体衬底的第一表面上形成层间电介质层，然后形成延伸穿过层间电介质层并进入半导体衬底的互连孔。 第一侧壁间隔层形成在互连孔的侧壁上。 在互连孔的底部的半导体衬底被各向同性蚀刻以在半导体衬底中限定底切凹部。 该蚀刻步骤使用第一侧壁间隔层作为蚀刻掩模进行。 然后用通孔电极填充互连孔和未切割凹部。 去除半导体衬底的第二表面足够的持续时间以露出包含通孔电极的未切割凹部。

公开(公告)号：US20100320597A1

公开(公告)日：2010-12-23

申请号：US12805321

申请日：2010-07-26

申请人： Kang-Wook Lee ,  Se-Yong Oh ,  Young-Hee Song ,  Gu-Sung Kim

发明人： Kang-Wook Lee ,  Se-Yong Oh ,  Young-Hee Song ,  Gu-Sung Kim

IPC分类号： H01L23/48

CPC分类号： H01L25/50 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/06 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/02372 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A system-in-package, comprising a wafer level stack structure, including at least one first device chip including a first device region having a plurality of input/output(I/O) pads, and at least one second device chip including a second device region having a plurality of input/output(I/O) pads and a second peripheral region surrounding the second device region, wherein the size of the second device region is different from the size of the first device region, wherein the at least one first device chip and the at least one second device chip have approximately equal size; and a common circuit board to which the wafer level stack structure is connected.

摘要翻译： 一种系统级封装，包括晶片级堆叠结构，其包括至少一个包括具有多个输入/输出（I / O）焊盘的第一器件区域的第一器件芯片，以及包括第二器件芯片的至少一个第二器件芯片 器件区域具有多个输入/输出（I / O）焊盘和围绕第二器件区域的第二外围区域，其中第二器件区域的尺寸不同于第一器件区域的尺寸，其中至少一个 第一器件芯片和至少一个第二器件芯片具有大致相等的尺寸; 以及连接晶片级堆叠结构的公共电路板。