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98 条记录 (耗时 0.027 秒)

    Semiconductor device and method for fabricating the same
    41.
    发明授权
    Semiconductor device and method for fabricating the same 有权
    半导体装置及其制造方法

    公开(公告)号：US06580125B2

    公开(公告)日：2003-06-17

    申请号：US10204097

    申请日：2002-08-15

    申请人： Makoto Kitabatake ,  Toshiya Yokogawa ,  Osamu Kusumoto ,  Masao Uchida ,  Kunimasa Takahashi ,  Kenya Yamashita

    发明人： Makoto Kitabatake ,  Toshiya Yokogawa ,  Osamu Kusumoto ,  Masao Uchida ,  Kunimasa Takahashi ,  Kenya Yamashita

    IPC分类号： H01L2976

    CPC分类号： H01L29/7395 ,  H01L29/1608 ,  H01L29/365 ,  H01L29/66068 ,  H01L29/7391 ,  H01L29/7828

    摘要： A DMOS device (or IGBT) includes an SiC substrate 2, an n-SiC layer 3 (drift region) formed in an epitaxial layer, a gate insulating film 6, a gate electrode 7a, a source electrode 7b formed to surround the gate electrode 7a, a drain electrode 7c formed on the lower surface of the SiC substrate 2, a p-SiC layer 4, an n+ SiC layer 3 formed to be present from under edges of the source electrode 7b to under associated edges of the gate electrode 7a. In addition, the device includes an n-type doped layer 10a containing a high concentration of nitrogen and an undoped layer 10b, which are stacked in a region in the surface portion of the epitaxial layer except the region where the n+ SiC layer 5 is formed. By utilizing a quantum effect, the device can have its on-resistance decreased, and can also have its breakdown voltage increased when in its off state.

    摘要翻译： DMOS器件（或IGBT）包括SiC衬底2，形成在外延层中的n-SiC层3（漂移区），栅极绝缘膜6，栅电极7a，形成为围绕栅电极的源电极7b 如图7a所示，形成在SiC衬底2的下表面上的漏极电极7c，形成为从源电极7b的下边缘形成的p-SiC层4，n + SiC层3到栅电极7a的相关边缘 。 此外，该器件包括含有高浓度氮的n型掺杂层10a和未掺杂层10b，层叠在除了形成n + SiC层5的区域之外的外延层的表面部分的区域中 。 通过利用量子效应，器件可以使其导通电阻降低，并且当其处于截止状态时也可以使其击穿电压增加。

    Electron emitting device and method of manufacturing the same
    42.
    发明授权
    Electron emitting device and method of manufacturing the same 有权
    电子发射元件及其制造方法

    公开(公告)号：US06445114B1

    公开(公告)日：2002-09-03

    申请号：US09402899

    申请日：1999-12-10

    申请人： Hideo Kurokawa ,  Tetsuya Shiratori ,  Toshifumi Sato ,  Masahiro Deguchi ,  Makoto Kitabatake

    发明人： Hideo Kurokawa ,  Tetsuya Shiratori ,  Toshifumi Sato ,  Masahiro Deguchi ,  Makoto Kitabatake

    IPC分类号： H01J130

    CPC分类号： H01J1/316 ,  H01J2329/00

    摘要： The first basic structure of the electron emission element of the present invention, includes at least two electrodes disposed in a horizontal direction at a predetermined interval, and a plurality of electron emission portions made of a particle or an aggregate of the particles dispersively disposed between the electrodes. On the other hand, the second basic structure of the electron emission element of the present invention includes at least two electrodes disposed at a predetermined interval, a conductive layer disposed between the electrodes so as to be electrically connected thereto, and a plurality of electron emission portions made of a particle or an aggregate of the particles dispersively disposed on the surface of the conductive layer between the electrodes. According to these structures, an electron emission element with high stability can be obtained, in which emissions can be emitted efficiently and uniformly even in the absence of a bias voltage (electric field) from outside in an output (emission) direction of the electrons, by utilizing a transverse electric field generated between the electrodes disposed in a horizontal direction at a predetermined interval or an in-plane electric current flowing through the conductive layer disposed between the electrodes.

    摘要翻译： 本发明的电子发射元件的第一基本结构包括至少两个以预定间隔设置在水平方向上的电极，以及多个电子发射部分，其由分散地设置在 电极。 另一方面，本发明的电子发射元件的第二基本结构包括以预定间隔设置的至少两个电极，设置在电极之间以与其电连接的导电层和多个电子发射 分散地设置在电极之间的导电层的表面上的由颗粒或聚集体构成的部分。 根据这些结构，可以获得具有高稳定性的电子发射元件，其中即使在电子的输出（发射）方向上没有来自外部的偏置电压（电场）的情况下也可以有效且均匀地发射， 通过利用在预定间隔沿水​​平方向布置的电极之间产生的横向电场或流过设置在电极之间的导电层的面内电流。

    Method for growing semiconductor film and method for fabricating semiconductor device
    43.
    发明授权
    Method for growing semiconductor film and method for fabricating semiconductor device 失效
    用于生长半导体膜的方法和用于制造半导体器件的方法

    公开(公告)号：US06306211B1

    公开(公告)日：2001-10-23

    申请号：US09523671

    申请日：2000-03-10

    申请人： Kunimasa Takahashi ,  Makoto Kitabatake ,  Masao Uchida ,  Toshiya Yokogawa

    发明人： Kunimasa Takahashi ,  Makoto Kitabatake ,  Masao Uchida ,  Toshiya Yokogawa

    IPC分类号： C30B2514

    CPC分类号： H01L29/66068 ,  C30B25/02 ,  C30B25/14 ,  C30B29/52 ,  H01L21/0237 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02634 ,  H01L21/02658 ,  H01L21/0455 ,  H01L29/365 ,  H01L29/66431

    摘要： In a chamber, a substrate is mounted on a susceptor and then heated to an elevated temperature. Source and diluting gases are supplied into the chamber through source and diluting gas supply pipes provided with respective flow meters. In addition, a doping gas is also supplied through an additive gas supply pipe, which is provided with a pulse valve, and a gas inlet pipe into the chamber by repeatedly opening and closing the pulse valve. In this manner, a doped layer is grown epitaxially on the substrate. In this case, a pulsed flow of the doping gas is directly supplied through the pulse valve onto the substrate from the outlet port of a pressure reducer for a doping gas cylinder. As a result, a steeply rising dopant concentration profile appears in a transition region between the substrate and the doped layer, and the surface of the doped layer is planarized.

    摘要翻译： 在室中，将基底安装在基座上，然后加热到升高的温度。 源和稀释气体通过源和稀释供应有相应流量计的气体供应管道供应到室中。 此外，还通过反复打开和关闭脉冲阀，通过设置有脉冲阀的添加剂气体供给管和进入管中的气体导入管来供给掺杂气体。 以这种方式，在衬底上外延生长掺杂层。 在这种情况下，掺杂气体的脉冲流通过脉冲阀从用于掺杂气体筒的减压器的出口直接供给到基板上。 结果，在衬底和掺杂层之间的过渡区域中出现急剧上升的掺杂剂浓度分布，并且掺杂层的表面被平坦化。

    Method and device for activating semiconductor impurities
    45.
    发明授权
    Method and device for activating semiconductor impurities 失效
    激活半导体杂质的方法和装置

    公开(公告)号：US06255201B1

    公开(公告)日：2001-07-03

    申请号：US09341464

    申请日：1999-07-12

    申请人： Akihisa Yoshida ,  Masatoshi Kitagawa ,  Masao Uchida ,  Makoto Kitabatake ,  Tsuneo Mitsuyu

    发明人： Akihisa Yoshida ,  Masatoshi Kitagawa ,  Masao Uchida ,  Makoto Kitabatake ,  Tsuneo Mitsuyu

    IPC分类号： H01L2142

    CPC分类号： H01L29/6606 ,  H01L21/046 ,  H01L29/1608 ,  H01L29/861 ,  Y10T29/41

    摘要： An impurity doped SiC substrate 1 and SiC thin film 2 are irradiated with a laser light 5 having a wavelength longer than such a wavelength that a band edge absorption of a semiconductor is caused. The wavelength of the laser light 5 may be such a wavelength that an absorption is caused by a vibration by the bond of an impurity element and an element constituting the semiconductor, for example, a wavelength of 9 &mgr;m to 11 &mgr;m. Specifically, in the case where Al is doped in SiC, the wavelength of the laser light 5 may be within the range of 9.5 &mgr;m to 10 &mgr;m.

    摘要翻译： 用波长比发生半导体的带边缘吸收的波长的波长的激光5照射杂质掺杂的SiC衬底1和SiC薄膜2。 激光5的波长可以是由杂质元素和构成半导体的元素的键合引起的吸收引起的波长，例如9μm〜11μm的波长。 具体地，在Al中掺杂有Al的情况下，激光5的波长可以在9.5μm〜10μm的范围内。

    Method for deposition of hard carbon film
    46.
    发明授权
    Method for deposition of hard carbon film 失效
    沉积硬质碳膜的方法

    公开(公告)号：US4844785A

    公开(公告)日：1989-07-04

    申请号：US51798

    申请日：1987-05-20

    申请人： Makoto Kitabatake ,  Kiyotaka Wasa

    发明人： Makoto Kitabatake ,  Kiyotaka Wasa

    IPC分类号： C23C14/06 ,  C23C16/26 ,  C23C16/28 ,  C30B23/02 ,  H01L21/314

    CPC分类号： H01L21/3146 ,  C23C14/0605 ,  C23C16/26 ,  C23C16/28 ,  C30B23/02 ,  C30B29/04

    摘要： A diamond-like hard carbon film is formed on a substrate by impinging particles of carbon onto a surface of the substrate, bombarding the surface of the substrate with accelerated particles of inert gas or particles of carbon together with hydrogen in a direction not more than 10 degrees out of parallel to the surface so that the particles of carbon aggregate on the surface, at room temperature.

    摘要翻译： 通过在基板的表面上冲击碳颗粒而在基板上形成类金刚石状硬质碳膜，用加速的惰性气体颗粒或碳颗粒与氢气以不大于10的方向轰击基板的表面 在与表面平行的程度上使得碳粒子在表面上聚集，在室温下。

    SEMICONDUCTOR ELEMENT
    47.
    发明申请
    SEMICONDUCTOR ELEMENT 有权
    半导体元件

    公开(公告)号：US20120305944A1

    公开(公告)日：2012-12-06

    申请号：US13504360

    申请日：2011-10-14

    申请人： Makoto Kitabatake ,  Masao Uchida

    发明人： Makoto Kitabatake ,  Masao Uchida

    IPC分类号： H01L29/78

    CPC分类号： H01L29/7828 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/7391

    摘要： A semiconductor element according to the present invention can perform both a transistor operation and a diode operation via its channel layer. If the potential Vgs of its gate electrode 165 with respect to that of its source electrode 150 is 0 volts, then a depletion layer with a thickness Dc, which has been depleted entirely in the thickness direction, is formed in at least a part of the channel layer 150 due to the presence of a pn junction between a portion of its body region 130 and the channel layer 150, and another depletion layer that has a thickness Db as measured from the junction surface of the pn junction is formed in that portion of the body region 130. If the dielectric constant of the wide bandgap semiconductor is identified by ∈s, the dielectric constant and the thickness of the insulating film 160 are identified by ∈i and Di, respectively, the sum of Dc and Db is identified by Ds, and the absolute value of the turn-on voltage of the diode is identified by Vf0, then Ds

    摘要翻译： 根据本发明的半导体元件可以经由其沟道层执行晶体管操作和二极管操作两者。 如果栅极电极165的电位Vgs相对于其源电极150的电压为0伏，则在至少一部分厚度方向上已经耗尽的具有厚度Dc的耗尽层 由于在其主体区域130的一部分和沟道层150之间存在pn结，并且从pn结的接合表面测量出的具有厚度Db的另一个耗尽层形成在沟道层150的那部分 如果宽带隙半导体的介电常数用∈s识别，则绝缘膜160的介电常数和厚度分别由∈i和Di标识，Dc和Db之和通过 Ds，二极管的导通电压的绝对值由Vf0表示，则满足Ds

    Semiconductor device and production method therefor
    48.
    发明授权
    Semiconductor device and production method therefor 有权
    半导体装置及其制造方法

    公开(公告)号：US07816688B2

    公开(公告)日：2010-10-19

    申请号：US10494616

    申请日：2002-11-27

    申请人： Kenya Yamashita ,  Makoto Kitabatake ,  Kunimasa Takahashi ,  Osamu Kusumoto ,  Masao Uchida ,  Ryoko Miyanaga

    发明人： Kenya Yamashita ,  Makoto Kitabatake ,  Kunimasa Takahashi ,  Osamu Kusumoto ,  Masao Uchida ,  Ryoko Miyanaga

    IPC分类号： H01L29/51

    CPC分类号： H01L21/28185 ,  H01L21/049 ,  H01L21/28202 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66068 ,  H01L29/78 ,  H01L29/7802 ,  H01L29/7838

    摘要： An upper part of a SIC substrate 1 is oxidized at a temperature of 800 to 1400° C., inclusive, in an oxygen atmosphere at 1.4×102 Pa or less, thereby forming a first insulating film 2 which is a thermal oxide film of 20 nm or less in thickness. Thereafter, annealing is performed, and then a first cap layer 3, which is a nitride film of about 5 nm in thickness, is formed thereon by CVD. A second insulating film 4, which is an oxide film of about 130 nm in thickness, is deposited thereon by CVD. A second cap layer 5, which is a nitride film of about 10 nm in thickness, is formed thereon. In this manner, a gate insulating film 6 made of the first insulating film 2 through the second cap layer 5 is formed, thus obtaining a low-loss highly-reliable semiconductor device.

    摘要翻译： SIC基板1的上部在氧气气氛中在800〜1400℃的温度下氧化，在1.4×102Pa以下，由此形成作为热氧化膜的第一绝缘膜2 nm以下的厚度。 然后，进行退火，然后通过CVD在其上形成厚度为约5nm的氮化物膜的第一盖层3。 作为厚度约130nm的氧化物膜的第二绝缘膜4通过CVD沉积在其上。 在其上形成厚度为约10nm的氮化膜的第二盖层5。 以这种方式，形成通过第二盖层5由第一绝缘膜2制成的栅极绝缘膜6，从而获得低损耗高可靠性的半导体器件。