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公开(公告)号：US09922955B2
公开(公告)日：2018-03-20
申请号：US12717335
申请日：2010-03-04
IPC分类号： H01L25/065 , H01L21/48 , H01L23/498 , H01L23/00 , H01L23/52
CPC分类号： H01L25/0657 , H01L21/4853 , H01L23/49816 , H01L23/52 , H01L24/73 , H01L24/96 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73204 , H01L2224/73265 , H01L2924/01322 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/18161 , H01L2924/00012 , H01L2924/00 , H01L2924/00014
摘要： A semiconductor wafer has a plurality of semiconductor die. First and second conductive layers are formed over opposing surfaces of the semiconductor die, respectively. Each semiconductor die constitutes a WLCSP. A TSV is formed through the WLCSP. A semiconductor component is mounted to the WLCSP. The first semiconductor component is electrically connected to the first conductive layer. A first bump is formed over the first conductive layer, and a second bump is formed over the second conductive layer. An encapsulant is deposited over the first bump and first semiconductor component. A second semiconductor component is mounted to the first bump. The second semiconductor component is electrically connected to the first semiconductor component and WLCSP through the first bump and TSV. A third semiconductor component is mounted to the first semiconductor component, and a fourth semiconductor component is mounted to the third semiconductor component.
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42.发明授权Semiconductor device and method of forming a conductive via-in-via structure 有权半导体器件和形成导电通孔在通孔结构的方法公开(公告)号：US09252075B2
公开(公告)日：2016-02-02
申请号：US13604539
申请日：2012-09-05
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L23/481 , H01L21/76898 , H01L2224/04042 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/05611 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/16225 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/00014 , H01L2924/13091 , H01L2924/15311 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A semiconductor device is made from a semiconductor wafer containing semiconductor die separated by a peripheral region. A conductive via-in-via structure is formed in the peripheral region or through an active region of the device to provide additional tensile strength. The conductive via-in-via structure includes an inner conductive via and outer conductive via separated by insulating material. A middle conductive via can be formed between the inner and outer conductive vias. The inner conductive via has a first cross-sectional area adjacent to a first surface of the semiconductor device and a second cross-sectional area adjacent to a second surface of the semiconductor device. The outer conductive via has a first cross-sectional area adjacent to the first surface of the semiconductor device and a second cross-sectional area adjacent to the second surface of the semiconductor device. The first cross-sectional area is different from the second cross-sectional area.
摘要翻译： 半导体器件由包含由周边区域分离的半导体管芯的半导体晶片制成。 在周边区域或通过器件的有源区域形成导电通孔结构，以提供额外的拉伸强度。 导电通孔结构包括由绝缘材料隔开的内部导电通孔和外部导电通孔。 中间导电通孔可以形成在内导电通孔和外导电通孔之间。 内部导电通孔具有与半导体器件的第一表面相邻的第一横截面区域和与半导体器件的第二表面相邻的第二横截面区域。 外导电通孔具有与半导体器件的第一表面相邻的第一横截面区域和与半导体器件的第二表面相邻的第二横截面区域。 第一截面积与第二横截面积不同。
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43.发明授权公开(公告)号：US08940636B2
公开(公告)日：2015-01-27
申请号：US13273537
申请日：2011-10-14
IPC分类号： H01L21/44 , H01L21/683 , H01L21/56 , H01L23/31 , H01L23/538 , H01L23/00 , H01L25/065 , H01L25/10 , H01L25/00
CPC分类号： H01L21/6835 , H01L21/568 , H01L23/3114 , H01L23/5389 , H01L24/12 , H01L24/13 , H01L24/19 , H01L24/25 , H01L24/28 , H01L24/81 , H01L24/94 , H01L24/96 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2221/68372 , H01L2224/02372 , H01L2224/0401 , H01L2224/04105 , H01L2224/05009 , H01L2224/0557 , H01L2224/12105 , H01L2224/13009 , H01L2224/13099 , H01L2224/16147 , H01L2224/16237 , H01L2224/19 , H01L2224/24011 , H01L2224/32145 , H01L2224/73267 , H01L2224/81141 , H01L2224/81191 , H01L2224/81801 , H01L2224/81894 , H01L2224/82039 , H01L2224/9202 , H01L2224/92244 , H01L2225/06551 , H01L2225/06558 , H01L2225/1035 , H01L2225/1058 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/0132 , H01L2924/014 , H01L2924/09701 , H01L2924/12044 , H01L2924/14 , H01L2924/1433 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2224/05552 , H01L2924/00 , H01L2224/83005
摘要： A semiconductor package includes a semiconductor wafer having a plurality of semiconductor die. A contact pad is formed over and electrically connected to an active surface of the semiconductor die. A gap is formed between the semiconductor die. An insulating material is deposited in the gap between the semiconductor die. An adhesive layer is formed over a surface of the semiconductor die and the insulating material. A via is formed in the insulating material and the adhesive layer. A conductive material is deposited in the via to form a through hole via (THV). A conductive layer is formed over the contact pad and the THV to electrically connect the contact pad and the THV. The plurality of semiconductor die is singulated. The insulating material can include an organic material. The active surface of the semiconductor die can include an optical device.
摘要翻译： 半导体封装包括具有多个半导体管芯的半导体晶片。 接触垫形成在半导体管芯的有源表面上并电连接到半导体管芯的有源表面。 在半导体管芯之间形成间隙。 绝缘材料沉积在半导体管芯之间的间隙中。 在半导体管芯和绝缘材料的表面上形成粘合剂层。 在绝缘材料和粘合剂层中形成通孔。 导电材料沉积在通孔中以形成通孔（THV）。 在接触焊盘和THV上形成导电层，以电连接接触焊盘和THV。 多个半导体管芯被切割。 绝缘材料可以包括有机材料。 半导体管芯的有源表面可以包括光学器件。
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44.发明申请Optical Semiconductor Device having Pre-Molded Leadframe with Window and Method Therefor 有权具有带窗口的预成型引线框的光半导体器件及其方法公开(公告)号：US20120168806A1
公开(公告)日：2012-07-05
申请号：US13419242
申请日：2012-03-13
IPC分类号： H01L31/18 , H01L31/0232
CPC分类号： H01L31/0203 , H01L21/563 , H01L23/3121 , H01L24/32 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2224/16245 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2924/00014 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15151 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/05599
摘要： A semiconductor device is made by providing a semiconductor die having an optically active area, providing a leadframe or pre-molded laminated substrate having a plurality of contact pads and a light transmitting material disposed between the contact pads, attaching the semiconductor die to the leadframe so that the optically active area is aligned with the light transmitting material to provide a light transmission path to the optically active area, and disposing an underfill material between the semiconductor die and leadframe. The light transmitting material includes an elevated area to prevent the underfill material from blocking the light transmission path. The elevated area includes a dam surrounding the light transmission path, an adhesive ring, or the light transmission path itself can be the elevated area. An adhesive ring can be disposed on the dam. A filler material can be disposed between the light transmitting material and contact pads.
摘要翻译： 通过提供具有光学活性区域的半导体管芯制造半导体器件，提供具有多个接触焊盘的引线框架或预成型层叠基板和设置在接触焊盘之间的透光材料，将半导体管芯附接到引线框架 光学活性区域与透光材料对准以提供到光学有效区域的光传输路径，并且在半导体管芯和引线框架之间设置底部填充材料。 透光材料包括用于防止底部填充材料阻挡光传输路径的升高区域。 升高区域包括围绕光传输路径的堤坝，粘合环，或者光传输路径本身可以是高架区域。 可以在大坝上设置粘合环。 填充材料可以设置在透光材料和接触垫之间。
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45.发明申请公开(公告)号：US20120034777A1
公开(公告)日：2012-02-09
申请号：US13273537
申请日：2011-10-14
IPC分类号： H01L21/768
CPC分类号： H01L21/6835 , H01L21/568 , H01L23/3114 , H01L23/5389 , H01L24/12 , H01L24/13 , H01L24/19 , H01L24/25 , H01L24/28 , H01L24/81 , H01L24/94 , H01L24/96 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2221/68372 , H01L2224/02372 , H01L2224/0401 , H01L2224/04105 , H01L2224/05009 , H01L2224/0557 , H01L2224/12105 , H01L2224/13009 , H01L2224/13099 , H01L2224/16147 , H01L2224/16237 , H01L2224/19 , H01L2224/24011 , H01L2224/32145 , H01L2224/73267 , H01L2224/81141 , H01L2224/81191 , H01L2224/81801 , H01L2224/81894 , H01L2224/82039 , H01L2224/9202 , H01L2224/92244 , H01L2225/06551 , H01L2225/06558 , H01L2225/1035 , H01L2225/1058 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/0132 , H01L2924/014 , H01L2924/09701 , H01L2924/12044 , H01L2924/14 , H01L2924/1433 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2224/05552 , H01L2924/00 , H01L2224/83005
摘要： A semiconductor package includes a semiconductor wafer having a plurality of semiconductor die. A contact pad is formed over and electrically connected to an active surface of the semiconductor die. A gap is formed between the semiconductor die. An insulating material is deposited in the gap between the semiconductor die. An adhesive layer is formed over a surface of the semiconductor die and the insulating material. A via is formed in the insulating material and the adhesive layer. A conductive material is deposited in the via to form a through hole via (THV). A conductive layer is formed over the contact pad and the THV to electrically connect the contact pad and the THV. The plurality of semiconductor die is singulated. The insulating material can include an organic material. The active surface of the semiconductor die can include an optical device.
摘要翻译： 半导体封装包括具有多个半导体管芯的半导体晶片。 接触垫形成在半导体管芯的有源表面上并电连接到半导体管芯的有源表面。 在半导体管芯之间形成间隙。 绝缘材料沉积在半导体管芯之间的间隙中。 在半导体管芯和绝缘材料的表面上形成粘合剂层。 在绝缘材料和粘合剂层中形成通孔。 导电材料沉积在通孔中以形成通孔（THV）。 在接触焊盘和THV上形成导电层，以电连接接触焊盘和THV。 多个半导体管芯被切割。 绝缘材料可以包括有机材料。 半导体管芯的有源表面可以包括光学器件。
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46.发明申请公开(公告)号：US20100140751A1
公开(公告)日：2010-06-10
申请号：US12332318
申请日：2008-12-10
IPC分类号： H01L21/768 , H01L23/538
CPC分类号： H01L23/481 , H01L21/76898 , H01L2224/04042 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/05611 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/16225 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/00014 , H01L2924/13091 , H01L2924/15311 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A semiconductor device is made from a semiconductor wafer containing semiconductor die separated by a peripheral region. A conductive via-in-via structure is formed in the peripheral region or through an active region of the device to provide additional tensile strength. The conductive via-in-via structure includes an inner conductive via and outer conductive via separated by insulating material. A middle conductive via can be formed between the inner and outer conductive vias. The inner conductive via has a first cross-sectional area adjacent to a first surface of the semiconductor device and a second cross-sectional area adjacent to a second surface of the semiconductor device. The outer conductive via has a first cross-sectional area adjacent to the first surface of the semiconductor device and a second cross-sectional area adjacent to the second surface of the semiconductor device. The first cross-sectional area is different from the second cross-sectional area.
摘要翻译： 半导体器件由包含由周边区域分离的半导体管芯的半导体晶片制成。 在周边区域或通过器件的有源区域形成导电通孔结构，以提供额外的拉伸强度。 导电通孔结构包括由绝缘材料隔开的内部导电通孔和外部导电通孔。 中间导电通孔可以形成在内导电通孔和外导电通孔之间。 内部导电通孔具有与半导体器件的第一表面相邻的第一横截面区域和与半导体器件的第二表面相邻的第二横截面区域。 外导电通孔具有与半导体器件的第一表面相邻的第一横截面区域和与半导体器件的第二表面相邻的第二横截面区域。 第一截面积与第二横截面积不同。
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47.发明申请Semiconductor Device and Method of Providing a Thermal Dissipation Path Through RDL and Conductive Via 有权提供通过RDL和导电通孔的散热路径的半导体器件和方法公开(公告)号：US20100013102A1
公开(公告)日：2010-01-21
申请号：US12173504
申请日：2008-07-15
IPC分类号： H01L23/52 , H01L21/4763
CPC分类号： H01L23/525 , H01L23/3677 , H01L23/5226 , H01L23/552 , H01L24/48 , H01L25/0657 , H01L25/50 , H01L2224/48247 , H01L2224/73265 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06551 , H01L2924/00014 , H01L2924/01029 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/04941 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/3025 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device has a conductive via formed around a perimeter of the semiconductor die. First and second conductive layers are formed on opposite sides of the semiconductor die and thermally connected to the conductive via. An insulating layer is formed over the semiconductor die. A portion of the insulating layer is removed to expose the first conductive layer and a thermal dissipation region of semiconductor die. A thermal via is formed through the insulating layer to the first conductive layer. A thermally conductive layer is formed over the thermal dissipation region and thermal via. A thermal conduction path is formed from the thermal dissipation region through the thermally conductive layer, thermal via, first conductive layer, conductive via, and second conductive layer. The thermal conduction path terminates in an external thermal ground point. The thermally conductive layer provides shielding for electromagnetic interference.
摘要翻译： 半导体器件具有围绕半导体管芯的周边形成的导电通孔。 第一和第二导电层形成在半导体管芯的相对侧上并与导电通孔热连接。 在半导体管芯上形成绝缘层。 去除绝缘层的一部分以露出第一导电层和半导体管芯的散热区域。 通过绝缘层向第一导电层形成热通孔。 在散热区域和热通孔上形成导热层。 热传导路径通过导热层，热通孔，第一导电层，导电通孔和第二导电层由散热区域形成。 热传导路径终止于外部热接地点。 导热层为电磁干扰提供屏蔽。
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48.发明申请Semiconductor Device and Method of Forming Wafer Level Ground Plane and Power Ring 有权半导体器件和形成晶片级地平面和电源环的方法公开(公告)号：US20090146297A1
公开(公告)日：2009-06-11
申请号：US11951729
申请日：2007-12-06
CPC分类号： H01L24/02 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L23/3114 , H01L23/3157 , H01L23/3171 , H01L23/3185 , H01L23/528 , H01L23/5286 , H01L23/585 , H01L24/05 , H01L24/13 , H01L24/18 , H01L24/19 , H01L24/82 , H01L24/96 , H01L2224/02315 , H01L2224/02371 , H01L2224/02379 , H01L2224/0401 , H01L2224/04105 , H01L2224/05024 , H01L2224/12105 , H01L2224/13026 , H01L2224/18 , H01L2224/32145 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01047 , H01L2924/01061 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/30105 , H01L2924/00
摘要： A semiconductor die has active circuits formed on its active surface. Contact pads are formed on the active surface of the semiconductor die and coupled to the active circuits. A die extension region is formed around a periphery of the semiconductor die. Through hole vias (THV) are formed in the die extension region. A conductive plane or ring is formed in a center area on the active surface of the semiconductor die. The conductive plane or ring is coupled to a first contact pad for providing a first power supply potential to the active circuits. The conductive plane or ring is electrically connected to a first THV. A conductive ring is formed partially around a perimeter of the conduction plane or ring. The conductive ring is coupled to a second contact pad for providing a second power supply potential to the active circuits. The conductive ring is electrically connected to a second THV.
摘要翻译： 半导体管芯具有在其有源表面上形成的有源电路。 接触焊盘形成在半导体管芯的有源表面上并耦合到有源电路。 在半导体管芯的周围形成管芯延伸区域。 通孔（THV）形成在管芯延伸区域中。 在半导体管芯的有源表面的中心区域形成导电平面或环。 导电平面或环耦合到第一接触焊盘，以向有源电路提供第一电源电位。 导电平面或环电连接到第一THV。 导电环部分地围绕导电平面或环的周边形成。 导电环耦合到第二接触焊盘，以向有源电路提供第二电源电位。 导电环电连接到第二THV。
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公开(公告)号：US07517733B2
公开(公告)日：2009-04-14
申请号：US11689645
申请日：2007-03-22
CPC分类号： H01L23/49551 , H01L23/3121 , H01L23/49811 , H01L24/48 , H01L25/03 , H01L25/105 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2225/1029 , H01L2924/00014 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor package includes a leadframe. A first lead finger has a lower portion, a connecting portion extending vertically upward from the lower portion, and a substantially flat, top portion. The top portion forms a top terminal lead structure. A second lead finger is electrically connected to the first lead finger. A portion of the second lead finger forms a bottom terminal lead structure. A portion of the second lead finger corresponds to a bottom surface of the semiconductor package. A surface of the substantially flat, top portion corresponds to a top surface of the semiconductor package.
摘要翻译： 半导体封装包括引线框架。 第一引线指具有下部，从下部垂直向上延伸的连接部分和基本平坦的顶部。 顶部形成顶部端子引线结构。 第二引线指电连接到第一引线指。 第二引线指的一部分形成底部端子引线结构。 第二引线指的一部分对应于半导体封装的底表面。 基本平坦的顶部的表面对应于半导体封装的顶表面。
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50.发明授权Semiconductor device with optical sensor and method of forming interconnect structure on front and backside of the device 有权具有光学传感器的半导体器件和在器件的前面和后面形成互连结构的方法公开(公告)号：US09525080B2
公开(公告)日：2016-12-20
申请号：US13555353
申请日：2012-07-23
IPC分类号： H01L31/0203 , H01L21/683 , H01L27/146 , H01L21/56 , H01L23/00 , H01L31/0232
CPC分类号： H01L31/0203 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L24/05 , H01L24/14 , H01L24/17 , H01L24/19 , H01L24/82 , H01L24/96 , H01L27/14618 , H01L27/14625 , H01L31/0232 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/82039 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01061 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10329 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/00
摘要： A semiconductor device includes a carrier and semiconductor die having an optically active region. The semiconductor die is mounted to the carrier to form a separation between the carrier and the semiconductor die. The semiconductor device further includes a passivation layer disposed over a surface of the semiconductor die and a glass layer disposed over a surface of the passivation layer. The passivation layer has a clear portion for passage of light to the optically active region of the semiconductor die. The semiconductor device further includes an encapsulant disposed over the carrier within the separation to form an expansion region around a periphery of the semiconductor die, a first via penetrating the expansion region, glass layer, and passivation layer, a second via penetrating the glass layer and passivation layer to expose a contact pad on the semiconductor die, and a conductive material filling the first and second vias.
摘要翻译： 半导体器件包括具有光学活性区域的载流子和半导体管芯。 半导体管芯安装到载体上以形成载体和半导体管芯之间的间隔。 半导体器件还包括设置在半导体管芯的表面上的钝化层和设置在钝化层表面上的玻璃层。 钝化层具有用于将光通过到半导体管芯的光学活性区域的透明部分。 该半导体器件还包括一个密封剂，该密封剂设置在分离器内部的载体上，以形成围绕半导体管芯周围的扩张区域，穿过膨胀区域的第一通孔，玻璃层和钝化层，穿透玻璃层的第二通孔， 钝化层以暴露半导体管芯上的接触焊盘，以及填充第一和第二通孔的导电材料。
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