Electronic component overlapping dice of unsingulated semiconductor wafer
    52.
    发明授权
    Electronic component overlapping dice of unsingulated semiconductor wafer 失效
    电子元件重叠的半导体晶片的重叠芯片

    公开(公告)号:US06664628B2

    公开(公告)日:2003-12-16

    申请号:US09971981

    申请日:2001-10-04

    IPC分类号: H01L21301

    摘要: The present invention provides an ancillary electrical component in very close proximity to a semiconductor device, preferably mounted directly to the semiconductor device. In one preferred embodiment, the ancillary electrical component is a capacitor. In a preferred embodiment, a terminal is provided on the semiconductor device such that the capacitor can be electrically connected directly to the terminals, as by soldering or with conductive epoxy. Connecting the capacitor between terminals of a power loop provides superior noise and transient suppression. The very short path between the capacitor and the active circuit provides for extremely low inductance, allowing for the use of relatively small capacitors. The semiconductor device then is connected to an electronic device such as a PC board for further connection to other circuitry. One particularly preferred mode of connection is by incorporating resilient, free-standing contact structures on the same semiconductor device, with the structures standing farther away from the semiconductor and the capacitor. Other useful connectors include providing similar resilient, free-standing contact structures on the other device, then positioning the semiconductor over the resilient contacts and securing the two devices together. A socket with such resilient structures is particularly useful for this application. In an alternative preferred embodiment, the capacitor and resilient contacts all are incorporated in the second device, such as a socket. In one aspect of the invention, the ancillary electrical component may include a travel stop structure which defines a minimum separation between the semiconductor and a substrate such as a printed circuit board.

    摘要翻译: 本发明提供了非常接近半导体器件的辅助电气部件,优选地直接安装在半导体器件上。 在一个优选实施例中,辅助电气部件是电容器。 在优选实施例中,端子设置在半导体器件上,使得电容器可以通过焊接或与导电环氧树脂直接电连接到端子。 在电源回路端子之间连接电容器可提供卓越的噪声和瞬态抑制。 电容器和有源电路之间的非常短的路径提供极低的电感,允许使用相对较小的电容器。 然后,半导体器件连接到诸如PC板的电子设备,用于进一步连接到其它电路。 一个特别优选的连接方式是通过在相同的半导体器件上并入弹性,独立的接触结构,其结构远离半导体和电容器。 其他有用的连接器包括在另一装置上提供类似的弹性,独立的接触结构,然后将半导体定位在弹性触点上并将两个装置固定在一起。 具有这种弹性结构的插座对于该应用特别有用。 在替代的优选实施例中,电容器和弹性触点都被并入第二装置,例如插座。 在本发明的一个方面,辅助电气部件可以包括限定半导体和诸如印刷电路板的基板之间的最小间隔的行进止动结构。

    Shaped lead structure and method
    56.
    发明授权
    Shaped lead structure and method 失效
    形铅笔结构及方法

    公开(公告)号:US5398863A

    公开(公告)日:1995-03-21

    申请号:US96693

    申请日:1993-07-23

    摘要: In a semiconductor inner lead bonding process, a connection component having leads is disposed on the chip surface so that the leads lie above the contacts. A bond region of each lead is forced downwardly by a tool into engagement with a contact on the chip while a first or proximal end of the lead remains attached to a dielectric support structure. The lead is deformed into an S-shaped configuration by moving the bonding tool horizontally towards the proximal or first end of the lead, thereby forcing the bonding region towards the first end and bending or buckling the lead. Alternatively, the lead is bent downwardly by a tool and the tool may then be disengaged from the lead, shifted away from the proximal end of the lead and again advanced downwardly to secure the lead to the chip contact.

    摘要翻译: 在半导体内引线接合工艺中,具有引线的连接部件设置在芯片表面上,使得引线位于触点上方。 每个引线的接合区域被工具向下压迫与芯片上的接触件接合,而引线的第一或近端保持附接到电介质支撑结构。 通过将接合工具水平地朝向引线的近端或第一端移动,从而将引线变形为S形构造,从而迫使接合区朝向第一端并弯曲或弯曲引线。 或者,引线通过工具向下弯曲,然后工具可以从引线脱离,从引线的近端移开,并再次向前推进以将引线固定到芯片接触。