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    Power Transistor Device Vertical Integration
    55.
    发明申请
    Power Transistor Device Vertical Integration 有权
    功率晶体管器件垂直整合

    公开(公告)号：US20120256250A1

    公开(公告)日：2012-10-11

    申请号：US13082679

    申请日：2011-04-08

    申请人： Hans-Joachim Schulze ,  Anton Mauder ,  Helmut Strack ,  Franz Hirler

    发明人： Hans-Joachim Schulze ,  Anton Mauder ,  Helmut Strack ,  Franz Hirler

    IPC分类号： H01L27/06 ,  H01L21/336

    CPC分类号： H01L21/823487 ,  H01L27/0694 ,  H01L27/1207 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor component includes a sequence of layers, the sequence of layers including a first insulator layer, a first semiconductor layer disposed on the first insulator layer, a second insulator layer disposed on the first semiconductor layer, and a second semiconductor layer disposed on the second insulator layer. The semiconductor component also includes a plurality of devices at least partly formed in the first semiconductor layer. A first one of the plurality of devices is a power transistor formed in a first region of the first semiconductor layer and a first region of the second semiconductor layer. The first region of the first and second semiconductor layers are in electrical contact with one another through a first opening in the second insulator layer.

    摘要翻译： 半导体部件包括一层层，所述层序列包括第一绝缘体层，设置在第一绝缘体层上的第一半导体层，设置在第一半导体层上的第二绝缘体层，以及设置在第二绝缘体层上的第二半导体层 绝缘体层。 半导体部件还包括至少部分地形成在第一半导体层中的多个器件。 多个器件中的第一个是在第一半导体层的第一区域和第二半导体层的第一区域中形成的功率晶体管。 第一和第二半导体层的第一区域通过第二绝缘体层中的第一开口彼此电接触。

    Semiconductor with a dynamic gate-drain capacitance
    56.
    发明授权
    Semiconductor with a dynamic gate-drain capacitance 有权
    具有动态栅极 - 漏极电容的半导体

    公开(公告)号：US08273622B2

    公开(公告)日：2012-09-25

    申请号：US13161050

    申请日：2011-06-15

    申请人： Anton Mauder ,  Hans-Joachim Schulze ,  Carolin Tolksdorf ,  Winfried Kaindl ,  Armin Willmeroth

    发明人： Anton Mauder ,  Hans-Joachim Schulze ,  Carolin Tolksdorf ,  Winfried Kaindl ,  Armin Willmeroth

    IPC分类号： H01L29/94

    CPC分类号： H01L27/0808 ,  H01L21/26513 ,  H01L27/0811 ,  H01L27/088 ,  H01L29/7836

    摘要： A semiconductor device with a dynamic gate drain capacitance. One embodiment provides a semiconductor device. The device includes a semiconductor substrate, a field effect transistor structure including a source region, a first body region, a drain region, a gate electrode structure and a gate insulating layer. The gate insulating layer is arranged between the gate electrode structure and the body region. The gate electrode structure and the drain region partially form a capacitor structure including a gate-drain capacitance configured to dynamically change with varying reverse voltages applied between the source and drain regions. The gate-drain capacitance includes at least one local maximum at a given threshold or a plateau-like course at given reverse voltage.

    摘要翻译： 具有动态栅极漏极电容的半导体器件。 一个实施例提供一种半导体器件。 该器件包括半导体衬底，场效应晶体管结构，其包括源区，第一体区，漏区，栅电极结构和栅极绝缘层。 栅极绝缘层设置在栅电极结构和体区之间。 栅极电极结构和漏极区域部分地形成电容器结构，其包括栅极 - 漏极电容，该栅极 - 漏极电容被配置为随着施加在源极和漏极区域之间的变化的反向电压而动态地 栅极 - 漏极电容在给定的阈值下包括至少一个局部最大值，或者在给定的反向电压下包括平台状过程。