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    Integrated semiconductor memory with generation of data
    61.
    发明授权
    Integrated semiconductor memory with generation of data 有权
    具有生成数据的集成半导体存储器

    公开(公告)号：US07835197B2

    公开(公告)日：2010-11-16

    申请号：US11731763

    申请日：2007-03-30

    申请人： Thomas Hein

    发明人： Thomas Hein

    IPC分类号： G11C7/06

    CPC分类号： G11C7/1006 ,  G11C7/02 ,  G11C7/1051 ,  G11C7/1069

    摘要： An integrated semiconductor memory with generation of data comprises a clock connection to apply a clock signal, a memory cell array with memory cells to store data of a first data record and a data generator circuit with a first input connection to apply the data of the first data record, with a first output connection to output data of a second data record, and with a second output connection to generate a first control signal. The data generator circuit includes an evaluation unit whose input is supplied with the first data record, the second data record and a second control signal, the second control signal being delayed by one clock period of the clock signal with respect to the first control signal. The data generator circuit is adapted to generate the data values of the data of the second data record in dependence on the evaluation of the data values of the first and second data record and the second control signal.

    摘要翻译： 具有数据生成的集成半导体存储器包括用于施加时钟信号的时钟连接，具有存储单元的存储单元阵列以存储第一数据记录的数据和具有第一输入连接的数据发生器电路，以将第一 数据记录，具有第一输出连接以输出第二数据记录的数据，并具有第二输出连接以产生第一控制信号。 数据发生器电路包括评估单元，其输入被提供有第一数据记录，第二数据记录和第二控制信号，第二控制信号被延迟相对于第一控制信号的时钟信号的一个时钟周期。 数据发生器电路适于根据对第一和第二数据记录和第二控制信号的数据值的评估来产生第二数据记录的数据的数据值。

    Integrated circuit, method of reading data stored within a memory device of an integrated circuit, method of writing data into a memory device of an integrated circuit, memory module, and computer program
    63.
    发明授权
    Integrated circuit, method of reading data stored within a memory device of an integrated circuit, method of writing data into a memory device of an integrated circuit, memory module, and computer program 有权
    集成电路，读取存储在集成电路的存储器件中的数据的方法，将数据写入集成电路的存储器件，存储器模块和计算机程序

    公开(公告)号：US07830709B2

    公开(公告)日：2010-11-09

    申请号：US11709289

    申请日：2007-02-21

    申请人： Jan Keller

    发明人： Jan Keller

    IPC分类号： G11C16/04

    CPC分类号： G11C13/0011 ,  G11C5/04 ,  G11C5/063 ,  G11C8/12 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/009

    摘要： A memory device comprises a plurality of memory cells, each of which comprising a first electrode, a second electrode and an active material arranged between the first electrode and the second electrode, wherein the memory cells are grouped into memory cell groups, each memory cell group defining a memory cell group area and being configured such that corresponding first electrodes are individually addressable, and corresponding second electrodes are commonly addressable via a common select device provided within the memory cell group area of the memory cell group.

    摘要翻译： 存储器件包括多个存储单元，每个存储单元包括布置在第一电极和第二电极之间的第一电极，第二电极和活性材料，其中存储器单元分组成存储单元组，每个存储单元组 限定存储单元组区域并且被配置为使得相应的第一电极可单独寻址，并且相应的第二电极可以经由设置在存储单元组的存储单元组区域内的公共选择装置共同寻址。

    Integrated circuit comprising an organic semiconductor, and method for the production of an integrated circuit
    65.
    发明授权
    Integrated circuit comprising an organic semiconductor, and method for the production of an integrated circuit 有权
    包括有机半导体的集成电路以及用于制造集成电路的方法

    公开(公告)号：US07825404B2

    公开(公告)日：2010-11-02

    申请号：US12188966

    申请日：2008-08-08

    申请人： Marcus Halik ,  Hagen Klauk ,  Guenter Schmid ,  Andreas Walter ,  Ute Zschieschang

    发明人： Marcus Halik ,  Hagen Klauk ,  Guenter Schmid ,  Andreas Walter ,  Ute Zschieschang

    IPC分类号： H01L51/30 ,  G03F1/04 ,  C08G65/38

    CPC分类号： H01B3/442 ,  H01L51/052

    摘要： An embodiment of the invention provides an integrated circuit having an organic field effect transistor (OFET) with a dielectric layer. The dielectric layer is prepared from a polymer formulation comprising: about 100 parts of at least one crosslinkable base polymer, from about 10 to about 20 parts of at least one di- or tribenzyl alcohol compound as an electrophilic crosslinking component, from about 0.2 to about 10 parts of at least one photo acid generator, and at least one solvent. Another embodiment provides a semiconductor fabrication method. The method comprises applying the polymer formulation to a surface of a substrate, drying the polymer formulation, crosslinking the polymer formulation after drying, and baking the polymer formulation after crosslinking.

    摘要翻译： 本发明的一个实施例提供一种具有介电层的有机场效应晶体管（OFET）的集成电路。 介电层由聚合物制剂制备，包括：约100份至少一种可交联的基础聚合物，约10至约20份至少一种作为亲电交联成分的二 - 或三苄醇化合物，约0.2至约 10份至少一种光酸产生剂和至少一种溶剂。 另一实施例提供半导体制造方法。 该方法包括将聚合物制剂施用于基材表面，干燥聚合物制剂，干燥后交联聚合物制剂，以及在交联后烘烤聚合物制剂。

    Method of fabricating a semiconductor device
    66.
    发明授权
    Method of fabricating a semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US07825031B2

    公开(公告)日：2010-11-02

    申请号：US11855809

    申请日：2007-09-14

    申请人： Dirk Manger ,  Rolf Weis ,  Christoph Noelscher

    发明人： Dirk Manger ,  Rolf Weis ,  Christoph Noelscher

    IPC分类号： H01L21/302

    CPC分类号： H01L21/31144 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/32139 ,  H01L21/76816

    摘要： The invention relates to a method of fabricating an integrated circuit, including the steps of providing at least one layer; performing a first implantation step, wherein particles are implanted into the layer under a first direction of incidence; performing a second implantation step, wherein particles are implanted into the layer under a second direction of incidence which is different from the first direction of incidence; performing a removal step, wherein the layer is partially removed depending on the local implant dose generated by the first and the second implantation step.

    摘要翻译： 本发明涉及一种制造集成电路的方法，包括提供至少一层的步骤; 执行第一注入步骤，其中在第一入射方向上将颗粒注入所述层中; 执行第二注入步骤，其中在与所述第一入射方向不同的第二入射方向上将颗粒注入所述层中; 执行去除步骤，其中根据由第一和第二植入步骤产生的局部植入剂量部分去除该层。

    Integrated circuit
    69.
    发明授权
    Integrated circuit 有权
    集成电路

    公开(公告)号：US07808272B2

    公开(公告)日：2010-10-05

    申请号：US11296698

    申请日：2005-12-08

    申请人： Robert Kaiser ,  Florian Schamberger

    发明人： Robert Kaiser ,  Florian Schamberger

    IPC分类号： H03K19/173

    CPC分类号： G11C7/1078 ,  G11C7/1084 ,  G11C7/225 ,  G11C29/1201

    摘要： An integrated circuit for analyzing the waveform of an input signal includes a first storage circuit and a second storage circuit that are each supplied with the input signal. The first and second storage circuits are controlled by a clock signal. The first storage circuit is used to store a state for the input signal when the clock signal has a rising edge. The second storage circuit is used to store a state for the input signal when the clock signal has a falling edge. An evaluation circuit compares the states of the input signal that are stored in the first and second storage circuits during a selected time span. The comparison can be used to decide whether the input signal assumes periodic fluctuations or an approximately permanently static value during the time span.

    摘要翻译： 用于分析输入信号的波形的集成电路包括分别被提供有输入信号的第一存储电路和第二存储电路。 第一和第二存储电路由时钟信号控制。 当时钟信号具有上升沿时，第一存储电路用于存储输入信号的状态。 当时钟信号具有下降沿时，第二存储电路用于存储输入信号的状态。 评估电路在选定的时间跨度内比较存储在第一和第二存储电路中的输入信号的状态。 该比较可以用于确定输入信号是否在时间间隔内呈现周期性波动或大致永久静态值。

    Method of manufacturing an integrated circuit
    70.
    发明授权
    Method of manufacturing an integrated circuit 有权
    集成电路的制造方法

    公开(公告)号：US07799696B2

    公开(公告)日：2010-09-21

    申请号：US11961828

    申请日：2007-12-20

    申请人： Stéphane Cholet

    发明人： Stéphane Cholet

    IPC分类号： H01L21/302 ,  H01L21/461

    CPC分类号： H01L45/142 ,  H01L45/085 ,  H01L45/1675

    摘要： A method of manufacturing an integrated circuit including a memory device that includes the following processes: forming a mask layer structure above a composite structure including a resistivity changing layer and an electrode layer disposed above the resistivity changing layer; partially patterning the mask layer structure using a first substance; stopping patterning the mask layer structure before exposing the top surface of the electrode layer; at least partially exposing the top surface of the electrode layer using a second substance, the second substance chemically not reacting with the electrode layer material.

    摘要翻译： 一种制造包括存储器件的集成电路的方法，该存储器件包括以下处理：在包括电阻率变化层和设置在电阻率变化层上方的电极层的复合结构之上形成掩模层结构; 使用第一物质部分地图案化掩模层结构; 在暴露电极层的顶表面之前停止图案化掩模层结构; 使用第二物质至少部分地暴露所述电极层的顶表面，所述第二物质化学地不与所述电极层材料反应。