公开(公告)号：US10388799B2

公开(公告)日：2019-08-20

申请号：US15444692

申请日：2017-02-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsuo Isobe ,  Toshinari Sasaki

IPC: H01L21/02 ,  H01L23/00 ,  H01L27/12 ,  H01L29/04 ,  H01L29/24 ,  H01L29/51 ,  H01L29/66 ,  H01L27/105 ,  H01L29/423 ,  H01L29/786 ,  H01L27/1156

Abstract: Stable electric characteristics and high reliability are provided to a miniaturized and integrated semiconductor device including an oxide semiconductor. In a transistor (a semiconductor device) including an oxide semiconductor film, the oxide semiconductor film is provided along a trench (groove) formed in an insulating layer. The trench includes a lower end corner portion having a curved shape with a curvature radius of longer than or equal to 20 nm and shorter than or equal to 60 nm, and the oxide semiconductor film is provided in contact with a bottom surface, the lower end corner portion, and an inner wall surface of the trench. The oxide semiconductor film includes a crystal having a c-axis substantially perpendicular to a surface at least over the lower end corner portion.

公开(公告)号：US10079295B2

公开(公告)日：2018-09-18

申请号：US14629575

申请日：2015-02-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsuo Isobe ,  Toshinari Sasaki ,  Shinya Sasagawa ,  Akihiro Ishizuka

IPC: H01L29/66 ,  H01L27/06 ,  H01L27/12 ,  H01L29/786 ,  H01L29/423 ,  H01L21/02

Abstract: A method for manufacturing an oxide semiconductor layer, comprising forming an oxide semiconductor layer over an insulating layer so as to be along with a curved surface of a projecting structural body of the insulating layer, wherein a length of the projecting structural body in a height direction is larger than a width of the projecting structural body, is provided.

公开(公告)号：US09899419B2

公开(公告)日：2018-02-20

申请号：US14924100

申请日：2015-10-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsuo Isobe ,  Shunpei Yamazaki ,  Koji Dairiki ,  Hiroshi Shibata ,  Chiho Kokubo ,  Tatsuya Arao ,  Masahiko Hayakawa ,  Hidekazu Miyairi ,  Akihisa Shimomura ,  Koichiro Tanaka ,  Mai Akiba

IPC: H01L29/786 ,  H01L27/12 ,  H01L21/3213 ,  H01L21/02 ,  B23K26/073 ,  H01L21/20 ,  H01L21/84 ,  H01L29/66

CPC classification number: H01L27/1222 ,  B23K26/0738 ,  H01L21/02354 ,  H01L21/02356 ,  H01L21/02675 ,  H01L21/02683 ,  H01L21/02686 ,  H01L21/02691 ,  H01L21/2026 ,  H01L21/32139 ,  H01L21/84 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1274 ,  H01L27/1281 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78675 ,  H01L29/78696 ,  Y10S118/90 ,  Y10T117/10 ,  Y10T117/1004 ,  Y10T117/1008

Abstract: A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.

公开(公告)号：US09748099B2

公开(公告)日：2017-08-29

申请号：US14145235

申请日：2013-12-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Koichiro Tanaka ,  Hidekazu Miyairi ,  Aiko Shiga ,  Akihisa Shimomura ,  Atsuo Isobe

IPC: H01L21/02 ,  H01L21/268 ,  B23K26/06 ,  B23K26/073 ,  H01L27/12 ,  H01L21/283 ,  B23K26/00 ,  B23K101/40 ,  H01L27/146

CPC classification number: H01L21/02675 ,  B23K26/0604 ,  B23K26/0608 ,  B23K26/0732 ,  B23K26/0736 ,  B23K26/0738 ,  B23K26/352 ,  B23K2101/40 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/268 ,  H01L21/283 ,  H01L27/1285 ,  H01L27/1296 ,  H01L27/14625

Abstract: A method of manufacturing a semiconductor device includes modifying a first laser beam from a first laser to form a first linear-shaped laser beam and modifying a second laser beam from a second laser to form a second linear-shaped laser beam. The method further includes overlaying the first linear-shaped laser beam and the second linear-shaped laser beam to form an overlayed linear-shaped laser beam, wherein the overlayed linear-shaped laser beam has a width and a length where the length is ten times or more as large as the width. The method also includes scanning a semiconductor film formed over a substrate with the overlayed linear-shaped laser beam to increase crystallinity of the semiconductor film, and patterning the semiconductor film to form a semiconductor layer which includes a channel formation region of a transistor.

公开(公告)号：US09570594B2

公开(公告)日：2017-02-14

申请号：US15049761

申请日：2016-02-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takehisa Hatano ,  Sachiaki Tezuka ,  Atsuo Isobe

IPC: H01L29/10 ,  H01L29/12 ,  H01L29/66 ,  H01L27/12 ,  H01L29/04 ,  H01L29/24 ,  H01L29/423 ,  H01L29/786 ,  H01L27/115 ,  H01L21/033 ,  H01L21/467

CPC classification number: H01L29/66969 ,  H01L21/0334 ,  H01L21/467 ,  H01L27/1156 ,  H01L27/1207 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/24 ,  H01L29/42364 ,  H01L29/42384 ,  H01L29/78603 ,  H01L29/7869

Abstract: A semiconductor device which is miniaturized while favorable characteristics thereof are maintained is provided. In addition, the miniaturized semiconductor device is provided with a high yield. The semiconductor device has a structure including an oxide semiconductor film provided over a substrate having an insulating surface; a source electrode layer and a drain electrode layer which are provided in contact with side surfaces of the oxide semiconductor film and have a thickness larger than that of the oxide semiconductor film; a gate insulating film provided over the oxide semiconductor film, the source electrode layer, and the drain electrode layer; and a gate electrode layer provided in a depressed portion formed by a step between a top surface of the oxide semiconductor film and top surfaces of the source electrode layer and the drain electrode layer.

Abstract translation: 提供了一种小型化并且保持有利的特性的半导体器件。 此外，小型半导体器件具有高产率。 半导体器件具有包括设置在具有绝缘表面的衬底上的氧化物半导体膜的结构; 源极电极层和漏电极层，其设置成与氧化物半导体膜的侧表面接触并且具有比氧化物半导体膜的厚度大的厚度; 设置在所述氧化物半导体膜，所述源极电极层和所述漏极电极层上的栅极绝缘膜; 以及设置在由氧化物半导体膜的顶表面和源电极层和漏电极层的顶表面之间的台阶形成的凹陷部中的栅电极层。

公开(公告)号：US09536994B2

公开(公告)日：2017-01-03

申请号：US14454071

申请日：2014-08-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshihiko Saito ,  Atsuo Isobe ,  Kazuya Hanaoka ,  Sho Nagamatsu

IPC: H01L29/66 ,  H01L29/786 ,  H01L27/12 ,  H01L27/146 ,  H01L29/04 ,  H01L29/78 ,  H01L21/02 ,  H01L21/44 ,  H01L21/463 ,  H01L21/465

CPC classification number: H01L29/66969 ,  H01L21/02565 ,  H01L21/44 ,  H01L21/463 ,  H01L21/465 ,  H01L27/1225 ,  H01L27/14632 ,  H01L27/14687 ,  H01L29/04 ,  H01L29/78 ,  H01L29/7869

Abstract: A minute transistor and the method of manufacturing the minute transistor. A source electrode layer and a drain electrode layer are each formed in a corresponding opening formed in an insulating layer covering a semiconductor layer. The opening of the source electrode layer and the opening of the drain electrode layer are formed separately in two distinct steps. The source electrode layer and the drain electrode layer are formed by depositing a conductive layer over the insulating layer and in the openings, and subsequently removing the part located over the insulating layer by polishing. This manufacturing method allows for the source electrode later and the drain electrode layer to be formed close to each other and close to a channel forming region of the semiconductor layer. Such a structure leads to a transistor having high electrical characteristics and a high manufacturing yield even in the case of a minute structure.

Abstract translation: 一分钟晶体管和微晶体管的制造方法。 源极电极层和漏极电极层各自形成在形成在覆盖半导体层的绝缘层中的对应的开口中。 源电极层的开口和漏电极层的开口分开形成两个不同的步骤。 源极电极层和漏电极层通过在绝缘层上和开口中沉积导电层而形成，然后通过抛光去除绝缘层上方的部分。 该制造方法允许稍后的源极电极和漏极电极层彼此靠近并且靠近半导体层的沟道形成区域。 这种结构导致即使在微小结构的情况下也具有高电特性和高制造成品率的晶体管。

公开(公告)号：US09536592B2

公开(公告)日：2017-01-03

申请号：US15072432

申请日：2016-03-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Naoaki Tsutsui ,  Atsuo Isobe ,  Wataru Uesugi ,  Takuro Ohmaru

IPC: G11C11/24 ,  G11C11/4093 ,  G11C11/403 ,  G11C11/401

CPC classification number: G11C11/4093 ,  G11C11/24 ,  G11C11/401 ,  G11C11/403

Abstract: A memory device includes a first memory circuit including a silicon transistor, a selection circuit including a silicon transistor, and a second memory circuit including oxide semiconductor transistors and a storage capacitor, in which one terminal of the storage capacitor is connected to a portion where two oxide semiconductor transistors are connected in series, an output of the second memory circuit is connected to a second input terminal of the selection circuit, and an input of the second memory circuit is connected to a first input terminal of the selection circuit or an output terminal of the first memory circuit.

Abstract translation: 存储器件包括：第一存储器电路，包括硅晶体管，包括硅晶体管的选择电路和包括氧化物半导体晶体管和存储电容器的第二存储器电路，其中存储电容器的一个端子连接到两个 氧化物半导体晶体管串联连接，第二存储电路的输出连接到选择电路的第二输入端，第二存储电路的输入端连接到选择电路的第一输入端或输出端 的第一存储器电路。

公开(公告)号：US09252286B2

公开(公告)日：2016-02-02

申请号：US14284733

申请日：2014-05-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsuo Isobe ,  Yutaka Okazaki ,  Kazuya Hanaoka ,  Shinya Sasagawa ,  Motomu Kurata

IPC: H01L29/786 ,  H01L29/78 ,  H01L29/66 ,  H01L27/12 ,  H01L27/108 ,  H01L27/11

CPC classification number: H01L27/1225 ,  H01L27/10879 ,  H01L27/1104 ,  H01L27/11521 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/41775 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78 ,  H01L29/7869

Abstract: A first conductive film overlapping with an oxide semiconductor film is formed over a gate insulating film, a gate electrode is formed by selectively etching the first conductive film using a resist subjected to electron beam exposure, a first insulating film is formed over the gate insulating film and the gate electrode, removing a part of the first insulating film while the gate electrode is not exposed, an anti-reflective film is formed over the first insulating film, the anti-reflective film, the first insulating film and the gate insulating film are selectively etched using a resist subjected to electron beam exposure, and a source electrode in contact with one end of the oxide semiconductor film and one end of the first insulating film and a drain electrode in contact with the other end of the oxide semiconductor film and the other end of the first insulating film are formed.

Abstract translation: 在栅极绝缘膜上形成与氧化物半导体膜重叠的第一导电膜，通过使用经受电子束曝光的抗蚀剂选择性蚀刻第一导电膜形成栅电极，在栅绝缘膜上形成第一绝缘膜 和栅电极，在栅电极未被露出的同时去除第一绝缘膜的一部分，在第一绝缘膜，抗反射膜，第一绝缘膜和栅极绝缘膜上形成防反射膜 使用经受电子束曝光的抗蚀剂选择性蚀刻，以及与氧化物半导体膜的一端接触的源极和与氧化物半导体膜的另一端接触的第一绝缘膜和漏电极的一端，以及 形成第一绝缘膜的另一端。

公开(公告)号：US09250490B2

公开(公告)日：2016-02-02

申请号：US14527020

申请日：2014-10-29

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Hiroshi Shibata ,  Atsuo Isobe

IPC: H01L27/00 ,  G02F1/1362 ,  H01L27/32 ,  G02F1/1345 ,  H01L29/786 ,  H01L27/12 ,  G02F1/1333 ,  G02F1/1368

CPC classification number: H01L27/1255 ,  G02F1/133345 ,  G02F1/13454 ,  G02F1/136209 ,  G02F1/136213 ,  G02F1/136227 ,  G02F1/136277 ,  G02F1/136286 ,  G02F1/1368 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/3244 ,  H01L27/3248 ,  H01L27/3262 ,  H01L27/3265 ,  H01L27/3276 ,  H01L29/4908 ,  H01L29/786 ,  H01L29/78633

Abstract: To provide a liquid crystal display device having high quality display by obtaining a high aperture ratio while securing a sufficient storage capacitor (Cs), and at the same time, by dispersing a load (a pixel writing-in electric current) of a capacitor wiring in a timely manner to effectively reduce the load. A scanning line is formed on a different layer from a gate electrode and the capacitor wiring is arranged so as to be parallel with a signal line. Each pixel is connected to the individually independent capacitor wiring via a dielectric. Therefore, variations in the electric potential of the capacitor wiring caused by a writing-in electric current of a neighboring pixel can be avoided, whereby obtaining satisfactory display images.

Abstract translation: 为了提供一种通过在确保足够的存储电容器（Cs）的同时获得高开口率而具有高质量显示的液晶显示装置，并且同时通过分散电容器布线的负载（像素写入电流） 及时有效减轻负荷。 扫描线形成在与栅电极不同的层上，电容布线与信号线平行。 每个像素通过电介质连接到单独独立的电容器布线。 因此，可以避免由相邻像素的写入电流引起的电容器布线的电位变化，从而获得令人满意的显示图像。

公开(公告)号：US09166019B2

公开(公告)日：2015-10-20

申请号：US14151036

申请日：2014-01-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshihiko Saito ,  Atsuo Isobe ,  Kazuya Hanaoka ,  Junichi Koezuka ,  Shinya Sasagawa ,  Motomu Kurata ,  Akihiro Ishizuka

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/417

CPC classification number: H01L29/66477 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78693

Abstract: A miniaturized transistor is provided with high yield. Further, a semiconductor device which has high on-state characteristics and which is capable of high-speed response and high-speed operation is provided. In the semiconductor device, an oxide semiconductor layer, a gate insulating layer, a gate electrode layer, an insulating layer, a conductive film, and an interlayer insulating layer are stacked in this order. A source electrode layer and a drain electrode layer are formed in a self-aligned manner by cutting the conductive film so that the conductive film over the gate electrode layer and the conductive layer is removed and the conductive film is divided. An electrode layer which is in contact with the oxide semiconductor layer and overlaps with a region in contact with the source electrode layer and the drain electrode layer is provided.

Abstract translation: 提供了一种小型化的晶体管，其产率高。 此外，提供了具有高导通状态特性并且能够进行高速响应和高速操作的半导体器件。 在半导体装置中，依次层叠氧化物半导体层，栅极绝缘层，栅极电极层，绝缘层，导电膜和层间绝缘层。 通过切割导电膜以自对准的方式形成源电极层和漏电极层，从而去除栅极电极层和导电层上的导电膜，并且导电膜被分割。 设置与氧化物半导体层接触并与与源极电极层和漏极电极层接触的区域重叠的电极层。