Abstract:
The present invention relates generally to sub-microelectronic circuitry, and more particularly to nanometer-scale articles, including nanoscale wires which can be selectively doped at various locations and at various levels. In some cases, the articles may be single crystals. The nanoscale wires can be doped, for example, differentially along their length, or radially, and either in terms of identity of dopant, concentration of dopant, or both. This may be used to provide both n-type and p-type conductivity in a single item, or in different items in close proximity to each other, such as in a crossbar array. The fabrication and growth of such articles is described, and the arrangement of such articles to fabricate electronic, optoelectronic, or spintronic devices and components. For example, semiconductor materials can be doped to form n-type and p-type semiconductor regions for making a variety of devices such as field effect transistors, bipolar transistors, complementary inverters, tunnel diodes, light emitting diodes, sensors, and the like.
Abstract:
A highly heat-transferring substrate is manufactured by drilling holes on a metal material of high heat conductivity, such as aluminum; positioning the metal material between two copper foil layers; applying a highly heat-transferring gum between the metal material and the copper foil layers; and melting the gum using a high temperature produced during pressing the metal material and the copper foil layers together. The melted gum bonds the metal material to the copper foil layers and flows into the holes on the metal material to form an insulating coating, which allows the finished substrate to be drilled and plated without the risk of short circuit caused by contacted metal material and plated coating.
Abstract:
Methods, apparatus, and systems for performing fault diagnosis are disclosed herein. In one exemplary embodiment, a failure log is received comprising entries indicative of compressed test responses to chain patterns and compressed test responses to scan patterns. A faulty scan chain in the circuit-under-test is identified based at least in part on one or more of the entries indicative of the compressed test responses to chain patterns. One or more faulty scan cell candidates in the faulty scan chain are identified based at least in part on one or more of the entries indicative of the compressed test responses to scan patterns. The one or more identified scan cell candidates can be reported. Computer-readable media comprising computer-executable instructions for causing a computer to perform any of the disclosed methods are also provided. Likewise, computer-readable media storing lists of fault candidates identified by any of the disclosed methods are also provided.
Abstract:
A bulk-doped semiconductor that is at least one of the following: a single crystal, an elongated and bulk-doped semiconductor that, at any point along its longitudinal axis, has a largest cross-sectional dimension less than 500 nanometers, and a free-standing and bulk-doped semiconductor with at least one portion having a smallest width of less than 500 nanometers. Such a semiconductor may comprise an interior core comprising a first semiconductor; and an exterior shell comprising a different material than the first semiconductor. Such a semiconductor may be elongated and my have, at any point along a longitudinal section of such a semiconductor, a ratio of the length of the section to a longest width is greater than 4:1, or greater than 10:1, or greater than 100:1, or even greater than 1000:1. At least one portion of such a semiconductor may a smallest width of less than 200 nanometers, or less than 150 nanometers, or less than 100 nanometers, or less than 80 nanometers, or less than 70 nanometers, or less than 60 nanometers, or less than 40 nanometers, or less than 20 nanometers, or less than 10 nanometers, or even less than 5 nanometers. Such a semiconductor may be a single crystal and may be free-standing. Such a semiconductor may be either lightly n-doped, heavily n-doped, lightly p-doped or heavily p-doped. Such a semiconductor may be doped during growth. Such a semiconductor may be part of a device, which may include any of a variety of devices and combinations thereof, and, and a variety of assembling techniques may be used to fabricate devices from such a semiconductor. Two or more of such a semiconductors, including an array of such semiconductors, may be combined to form devices, for example, to form a crossed p-n junction of a device. Such devices at certain sizes may exhibit quantum confinement and other quantum phenomena, and the wavelength of light emitted from one or more of such semiconductors may be controlled by selecting a width of such semiconductors. Such semiconductors and device made therefrom may be used for a variety of applications.
Abstract:
A field programmable gate array (FPGA) has plural columns of run-time memory provided in each of one or more partitions. Each column of run-time memory has a plurality of configurable memory blocks (CMB's). Each CMB is programmably configurable at least into a shallow-and-widest mode where data words have a maximum bit width and into a deep-and-narrowest mode where data words have a minimum bit width. Each CMB spans plural interconnect buses and the bits of its widest data words are distributed among the spanned interconnect buses. When a deep-and-narrow mode is invoked, CMB's of alternate columns operate in complementary fashion so that bits of narrowed words from one CMB move through a first subset of the interconnect buses while bits of narrowed words from a second CMB, in an alternate column, move through a second subset of the interconnect buses, where the second subset is mutually exclusive of the first subset of the interconnect buses. On the other hand, when the shallow-and-widest mode is invoked, the bits of the wide words of CMB's in alternate columns shared interconnect buses on an overlapping basis. In one embodiment, the shared interconnect buses are tri-statable. Programmable joiners are provided for joining or disjoining the tri-statable interconnect buses of adjacent partitions.
Abstract:
Various embodiments of a deep learning (DL)-based face perception engine for constructing, providing, and applying a highly-personalized face perception model for an individual through a deep learning process are disclosed. In some embodiments, a disclosed face perception engine includes a deep neural network configured for training a personalized face perception model for a unique individual based on a standard set of training images and a corresponding set of decisions on the set of training images provided by the unique individual. When sufficiently trained using the standard set of training images and the corresponding set of decisions, the personalized face perception model for the unique individual perceives a new face photo/image as if through the eyes of that unique individual. Hence, the trained face perception model can be used an “agent” or “representative” of the associated person in making very personal decisions, such as to decide if a given face photo/image includes a desirable face in the eyes of that person.
Abstract:
The present invention provides a new crystalline form VII of agomelatine, its method of preparation, application and pharmaceutical composition. This new crystalline form offers high purity, a stable crystalline structure and good reproducibility, while its method of production lends itself well to large scale production. In terms of stability and purity, it is superior to the numerous crystalline forms which have hitherto been reported. As a result, the crystalline form VII of the present invention possesses advantages in pharmaceutical preparation.
Abstract:
Provided are a compound of formula (I), pharmaceutically acceptable salts thereof, preparation methods and applications thereof for inhibiting thrombin, and applications in the treatment and prevention of thrombin-mediated and thrombin-related diseases.