公开(公告)号：US20160268450A1

公开(公告)日：2016-09-15

申请号：US15031904

申请日：2014-08-29

Applicant: SHARP KABUSHIKI KAISHA

Inventor： Kenji KIMOTO ,  Naoki KOIDE

IPC: H01L31/0216 ,  H01L31/0288 ,  H01L31/0376

CPC classification number: H01L31/02167 ,  H01L31/02168 ,  H01L31/0288 ,  H01L31/0376 ,  H01L31/0747 ,  Y02E10/50

Abstract: A photoelectric conversion element 100 includes an n-type monocrystalline silicon substrate 1, an non-crystalline thin film 2, i-type non-crystalline thin films 11 to 1m and 21 to 2m-1, p-type non-crystalline thin films 31 to 3m, and n-type non-crystalline thin films 41 to 4m-1. The non-crystalline thin film 2 is configured of non-crystalline thin films 201 and 202 and is disposed in contact with the surface on the light incident side of the n-type monocrystalline silicon substrate 1. The non-crystalline thin film 201 is configured of a-Si, and the non-crystalline thin film 202 is configured of a-SiNx (0

Abstract translation: 光电转换元件100包括n型单晶硅衬底1，非晶体薄膜2，i型非晶体薄膜11至1m和21至2m-1，p型非晶薄膜31 至3μm，以及n型非晶质薄膜41〜4m-1。 非晶体薄膜2由非晶体薄膜201和202构成，并且与n型单晶硅衬底1的光入射侧的表面接触地设置。非晶体薄膜201被配置 的a-Si，非结晶薄膜202由a-SiNx（0

公开(公告)号：US09397238B2

公开(公告)日：2016-07-19

申请号：US13609284

申请日：2012-09-11

Applicant: Jianjun Wang ,  Oleh P. Karpenko ,  Thomas A. Sorenson

Inventor： Jianjun Wang ,  Oleh P. Karpenko ,  Thomas A. Sorenson

IPC: H01L21/06 ,  H01L31/0224 ,  H01L31/0376 ,  H01L31/0236 ,  H01L31/0296 ,  H01L31/20

CPC classification number: H01L31/02363 ,  H01L31/022425 ,  H01L31/022441 ,  H01L31/0288 ,  H01L31/0296 ,  H01L31/02963 ,  H01L31/0323 ,  H01L31/0376 ,  H01L31/03762 ,  H01L31/073 ,  H01L31/074 ,  H01L31/0749 ,  H01L31/208 ,  Y02E10/50 ,  Y02P70/521

Abstract: A method and apparatus provide for a roughened back surface of a semiconductor absorber layer of a photovoltaic device to improve adhesion. The roughened back surface may be achieved through an etching process.

Abstract translation: 一种方法和装置提供了光电器件的半导体吸收层的粗糙化后表面以改善粘附性。 粗糙的背面可以通过蚀刻工艺实现。

公开(公告)号：US20160163898A1

公开(公告)日：2016-06-09

申请号：US14956505

申请日：2015-12-02

Applicant: Sharp Kabushiki Kaisha

Inventor： Masatomi HARADA ,  Takeshi KAMIKAWA ,  Toshihiko SAKAI ,  Tokuaki KUNIYOSHI ,  Liumin ZOU

IPC: H01L31/0352 ,  H01L31/0224 ,  H01L31/0236 ,  H01L31/0376

CPC classification number: H01L31/03529 ,  H01L31/022433 ,  H01L31/022441 ,  H01L31/02363 ,  H01L31/0376 ,  H01L31/0747 ,  H01L31/20 ,  Y02E10/50

Abstract: A photovoltaic device is provided that prevents a short circuit in an p-n junction even if the distance between the electrodes on the n-type semiconductor strips and the electrodes on the p-type semiconductor strips is reduced. A photovoltaic device includes n-type amorphous semiconductor strips 102 and p-type amorphous semiconductor strips 102p provided on the back face of a semiconductor substrate 101. Separate electrodes 103 spaced apart from each other are provided on each semiconductor strip of at least one of the group of n-type amorphous semiconductor strips 102n and the group of p-type amorphous semiconductor strips 102p. A conductive part 302 is provided on the surfaces of the electrodes 103 and electrically connects the electrodes 103.

Abstract translation: 即使在n型半导体条上的电极和p型半导体条上的电极之间的距离减小的情况下，也提供防止p-n结中短路的光电器件。 光电器件包括设置在半导体衬底101的背面上的n型非晶半导体条102和p型非晶半导体条102p。彼此间隔开的分离电极103设置在至少一个 一组n型非晶半导体条带102n和一组p型非晶半导体条带102p。 导电部302设置在电极103的表面上并电连接电极103。

公开(公告)号：US20160111590A1

公开(公告)日：2016-04-21

申请号：US14978463

申请日：2015-12-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuhiro TANAKA ,  Erika KATO

IPC: H01L31/20 ,  H01L31/105

CPC classification number: H01L31/20 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02592 ,  H01L21/0262 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78648 ,  H01L29/78696 ,  H01L31/0304 ,  H01L31/03685 ,  H01L31/03687 ,  H01L31/0376 ,  H01L31/03762 ,  H01L31/03765 ,  H01L31/072 ,  H01L31/0735 ,  H01L31/105 ,  H01L31/1136 ,  H01L31/1808 ,  H01L31/1812 ,  H01L31/1816 ,  H01L31/1824 ,  H01L31/1852 ,  H01L31/202 ,  Y02E10/544 ,  Y02E10/545 ,  Y02E10/548 ,  Y02P70/521

Abstract: A method for forming an amorphous semiconductor which contains an impurity element and has low resistivity and a method for manufacturing a semiconductor device with excellent electrical characteristics with high yield are provided. In the method for forming an amorphous semiconductor containing an impurity element, which utilizes a plasma CVD method, pulse-modulated discharge inception voltage is applied to electrodes under the pressure and electrode distance with which the minimum discharge inception voltage according to Paschen's Law can be obtained, whereby the amorphous semiconductor which contains an impurity element and has low resistivity is formed.

Abstract translation: 提供了一种用于形成含有杂质元素并具有低电阻率的非晶半导体的方法，以及制造具有优异的电特性，高产率的半导体器件的方法。 在利用等离子体CVD法形成含有杂质元素的非晶半导体的方法中，在可以获得根据帕邢定律的最小放电起始电压的压力和电极距离处的电极上施加脉冲调制放电初始电压 由此形成含有杂质元素并具有低电阻率的非晶半导体。

公开(公告)号：US20160104691A1

公开(公告)日：2016-04-14

申请号：US14793690

申请日：2015-07-07

Applicant: SCHOTTKY LSI, INC.

Inventor： AUGUSTINE WEI-CHUN CHANG

IPC: H01L25/065 ,  H03K19/177

CPC classification number: H01L27/0629 ,  H01L21/8238 ,  H01L25/065 ,  H01L27/0207 ,  H01L27/0727 ,  H01L27/105 ,  H01L27/10897 ,  H01L27/112 ,  H01L27/11253 ,  H01L27/11286 ,  H01L27/11293 ,  H01L27/11526 ,  H01L27/11546 ,  H01L27/11807 ,  H01L28/20 ,  H01L29/66143 ,  H01L29/872 ,  H01L31/032 ,  H01L31/0376 ,  H01L31/03762 ,  H01L31/07 ,  H01L31/072 ,  H01L31/074 ,  H01L2924/0002 ,  H03K19/17728 ,  Y02E10/50 ,  H01L2924/00

Abstract: A low cost IC solution is disclosed in accordance with an embodiment to provide Super CMOS microelectronics macros. Hereinafter, the Super CMOS or Schottky CMOS all refer to SCMOS. The SCMOS device solutions with a niche circuit element, the complementary low threshold Schottky barrier diode pairs (SBD) made by selected metal barrier contacts (Co/Ti) to P- and N-Si beds of the CMOS transistors. A DTL like new circuit topology and designed wide contents of broad product libraries, which used the integrated SBD and transistors (BJT, CMOS, and Flash versions) as basic components. The macros are composed of diodes that are selectively attached to the diffusion bed of the transistors, configuring them to form generic logic gates, memory cores, and analog functional blocks from simple to the complicated, from discrete components to all grades of VLSI chips. Solar photon voltaic electricity conversion and bio-lab-on-a-chip are two newly extended fields of the SCMOS IC applications.

Abstract translation: 根据实施例公开了一种低成本的IC解决方案，以提供超级CMOS微电子宏。 在下文中，Super CMOS或Schottky CMOS都是指SCMOS。 具有利基电路元件的SCMOS器件解决方案，由选择的金属势垒接触（Co / Ti）到CMOS晶体管的P和N-Si层制成的互补低阈值肖特基势垒二极管对（SBD）。 一个DTL，像新的电路拓扑，并设计了广泛的产品库内容，它们使用集成的SBD和晶体管（BJT，CMOS和Flash版本）作为基本组件。 这些宏由选择性地连接到晶体管的扩散层的二极管组成，将它们构成从简单到复杂的从分立元件到所有等级的VLSI芯片的通用逻辑门，存储器核和模拟功能块。 太阳能光伏电力转换和生物实验室芯片是SCMOS IC应用的两个新扩展领域。

公开(公告)号：US20150263188A1

公开(公告)日：2015-09-17

申请号：US14720527

申请日：2015-05-22

Applicant: LG ELECTRONICS INC.

Inventor： Wonseok CHOI ,  Kwangsun JI ,  Heonmin LEE ,  Hojung SYN ,  Junghoon CHOI ,  Hyunjin YANG

IPC: H01L31/0216 ,  H01L31/0224

CPC classification number: H01L31/02167 ,  H01L31/02168 ,  H01L31/022425 ,  H01L31/022441 ,  H01L31/02366 ,  H01L31/0288 ,  H01L31/03529 ,  H01L31/0368 ,  H01L31/0376 ,  H01L31/068 ,  H01L31/0682 ,  H01L31/072 ,  H01L31/0747 ,  H01L31/1804 ,  Y02E10/547

Abstract: A solar cell is discussed, and includes a substrate; a first field region; a first electrode directly formed on an emitter region; and a second electrode directly formed on a second field region, wherein a second passivation layer comprises a first back passivation portion and a second back passivation portion. Furthermore, the first back passivation portion is merely positioned between the emitter region and the substrate and the second field region and the substrate, and the second back passivation portion is positioned between the emitter region and the second field region, and wherein the first back passivation portion positioned between the emitter region and the substrate is physically separated from first back passivation portion positioned between the second field region and the substrate.

Abstract translation: 讨论了太阳能电池，并且包括基板; 第一场地; 直接形成在发射极区域上的第一电极; 以及直接形成在第二场区上的第二电极，其中第二钝化层包括第一后​​钝化部分和第二后钝化部分。 此外，第一背面钝化部分仅位于发射极区域和衬底之间，并且第二场区域和衬底之间，并且第二背部钝化部分位于发射极区域和第二场区域之间，并且其中第一背面钝化部分 位于发射极区域和衬底之间的部分与位于第二场区域和衬底之间的第一背面钝化部分物理分离。

公开(公告)号：US20150249427A1

公开(公告)日：2015-09-03

申请号：US14713547

申请日：2015-05-15

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Keiichiro MASUKO

IPC: H02S50/10 ,  H01L31/0376

CPC classification number: H02S50/10 ,  H01L31/022441 ,  H01L31/0376 ,  H01L31/0747 ,  H02S50/00 ,  Y02E10/50

Abstract: A solar cell has a photoelectric conversion unit in which an n-type region including an n-type amorphous semiconductor layer and a p-type region including a p-type amorphous semiconductor layer are disposed in a planar manner, light such as solar light is received, and photoproduction carriers including holes and electrons are generated. Electrodes through which the photoelectrically converted electric power is taken out are also provided, and a resistance measurement unit is provided in an outer periphery of an electrode region in which the electrodes are disposed. The resistance measurement unit has two measurement electrodes extending from the n-type region and one measurement electrode extending from the p-type region, and the measurement electrodes are disposed with a predetermined inter-electrode space therebetween.

Abstract translation: 太阳能电池具有光电转换单元，其中包括n型非晶半导体层的n型区域和包括p型非晶半导体层的p型区域以平面方式设置，诸如太阳光的光是 产生包含空穴和电子的光生产载体。 还提供了通过其进行光电转换的电力的电极，并且电阻测量单元设置在其中设置电极的电极区域的外周。 电阻测量单元具有从n型区域延伸的两个测量电极和从p型区域延伸的一个测量电极，并且测量电极之间设置有预定的电极间间隔。

公开(公告)号：US20150228824A1

公开(公告)日：2015-08-13

申请号：US14691326

申请日：2015-04-20

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： AUGUSTIN J. HONG ,  WOO-SHIK JUNG ,  JEEHWAN KIM ,  JAE-WOONG NAH ,  DEVENDRA K. SADANA

IPC: H01L31/0352 ,  H01L31/0376 ,  H01L31/0236 ,  H01L31/075 ,  H01L31/0224

CPC classification number: H01L31/035227 ,  C03C15/00 ,  C03C17/06 ,  C03C2218/34 ,  H01L31/022433 ,  H01L31/02363 ,  H01L31/035281 ,  H01L31/0376 ,  H01L31/0392 ,  H01L31/03921 ,  H01L31/03923 ,  H01L31/03925 ,  H01L31/056 ,  H01L31/075 ,  Y02E10/52 ,  Y02E10/541 ,  Y02E10/548 ,  Y10S438/945 ,  Y10S977/773 ,  Y10S977/779 ,  Y10T428/12014 ,  Y10T428/12069 ,  Y10T428/12076 ,  Y10T428/24479 ,  Y10T428/24488 ,  Y10T428/2982

Abstract: Hemispheres and spheres are formed and employed for a plurality of applications. Hemispheres are employed to form a substrate having an upper surface and a lower surface. The upper surface includes peaks of pillars which have a base attached to the lower surface. The peaks have a density defined at the upper surface by an array of hemispherical metal structures that act as a mask during an etch to remove substrate material down to the lower surface during formation of the pillars. The pillars are dense and uniform and include a microscale average diameter. The spheres are formed as independent metal spheres or nanoparticles for other applications.

Abstract translation: 半球和球形成并用于多种应用。 半球用于形成具有上表面和下表面的基底。 上表面包括具有附接到下表面的基部的柱的峰。 峰在上表面具有通过半球形金属结构的阵列定义的密度，其在蚀刻期间用作掩模，以在形成支柱期间将基底材料移除到下表面。 支柱是致密和均匀的，并且包括微米级的平均直径。 球形成为独立的金属球体或纳米颗粒用于其他应用。

公开(公告)号：US09077340B2

公开(公告)日：2015-07-07

申请号：US13931315

申请日：2013-06-28

Applicant: Schottky LSI, Inc.

Inventor： Augustine Wei-Chun Chang

IPC: H01L27/07 ,  H03K19/177 ,  H01L27/02 ,  H01L27/105 ,  H01L27/108 ,  H01L27/112 ,  H01L27/115 ,  H01L27/118 ,  H01L31/032 ,  H01L31/0376 ,  H01L31/072 ,  H01L31/074 ,  H01L49/02

CPC classification number: H01L27/0629 ,  H01L21/8238 ,  H01L25/065 ,  H01L27/0207 ,  H01L27/0727 ,  H01L27/105 ,  H01L27/10897 ,  H01L27/112 ,  H01L27/11253 ,  H01L27/11286 ,  H01L27/11293 ,  H01L27/11526 ,  H01L27/11546 ,  H01L27/11807 ,  H01L28/20 ,  H01L29/66143 ,  H01L29/872 ,  H01L31/032 ,  H01L31/0376 ,  H01L31/03762 ,  H01L31/07 ,  H01L31/072 ,  H01L31/074 ,  H01L2924/0002 ,  H03K19/17728 ,  Y02E10/50 ,  H01L2924/00

Abstract: A low cost IC solution is disclosed in accordance with an embodiment to provide Super CMOS microelectronics macros. Hereinafter, the Super CMOS or Schottky CMOS all refer to SCMOS. The SCMOS device solutions with a niche circuit element, the complementary low threshold Schottky barrier diode pairs (SBD) made by selected metal barrier contacts (Co/Ti) to P— and N—Si beds of the CMOS transistors. A DTL like new circuit topology and designed wide contents of broad product libraries, which used the integrated SBD and transistors (BJT, CMOS, and Flash versions) as basic components. The macros are composed of diodes that are selectively attached to the diffusion bed of the transistors, configuring them to form generic logic gates, memory cores, and analog functional blocks from simple to the complicated, from discrete components to all grades of VLSI chips. Solar photon voltaic electricity conversion and bio-lab-on-a-chip are two newly extended fields of the SCMOS IC applications.

Abstract translation: 根据实施例公开了一种低成本的IC解决方案，以提供超级CMOS微电子宏。 在下文中，Super CMOS或Schottky CMOS都是指SCMOS。 具有利基电路元件的SCMOS器件解决方案，由选择的金属势垒接触（Co / Ti）到CMOS晶体管的P和N-Si层制成的互补低阈值肖特基势垒二极管对（SBD）。 一个DTL，像新的电路拓扑，并设计了广泛的产品库内容，它们使用集成的SBD和晶体管（BJT，CMOS和Flash版本）作为基本组件。 这些宏由选择性地连接到晶体管的扩散层的二极管组成，将它们构成从简单到复杂的从分立元件到所有等级的VLSI芯片的通用逻辑门，存储器核和模拟功能块。 太阳能光伏电力转换和生物实验室芯片是SCMOS IC应用的两个新扩展领域。

公开(公告)号：US20150084143A1

公开(公告)日：2015-03-26

申请号：US14388028

申请日：2013-03-18

Applicant: NEC Corporation

Inventor： Junichi Fujikata ,  Takahiro Nakamura

IPC: H01L31/108 ,  H01L31/0232 ,  H01L27/146 ,  H01L31/0368 ,  H01L31/0376

CPC classification number: H01L31/1085 ,  G02B6/12004 ,  H01L27/14625 ,  H01L31/02327 ,  H01L31/0368 ,  H01L31/0376

Abstract: A waveguide-coupled MSM-type photodiode of the present invention comprises a structure in which a semiconductor light-absorbing layer and an optical waveguide core layer are adjacent and optically coupled to each other, has formed metal-semiconductor-metal (MSM) junctions which are arranged at an interval on the semiconductor light-absorbing layer, and is characterized in that of the MSM electrodes arranged at the interval, a voltage is set so that a reverse bias is applied to those MSM electrodes that are arranged on a light incidence side.

Abstract translation: 本发明的波导耦合MSM型光电二极管包括其中半导体光吸收层和光波导芯层相邻并且光耦合的结构，已形成金属 - 半导体 - 金属（MSM）结，其中 在半导体光吸收层上以间隔排列，其特征在于以间隔布置的MSM电极的电压被设定为使得反向偏压施加到布置在光入射侧的那些MSM电极 。