公开(公告)号：US20150243637A1

公开(公告)日：2015-08-27

申请号：US14709840

申请日：2015-05-12

申请人： Pil-Kyu Kang ,  Taeyeong Kim ,  Byung Lyul Park ,  Jumyong Park ,  Jinho Park ,  Kyu-Ha Lee ,  Deok-Young Jung ,  Gilheyun Choi

发明人： Pil-Kyu Kang ,  Taeyeong Kim ,  Byung Lyul Park ,  Jumyong Park ,  Jinho Park ,  Kyu-Ha Lee ,  Deok-Young Jung ,  Gilheyun Choi

IPC分类号： H01L25/065 ,  G11C8/00 ,  G11C16/08 ,  H01L23/544

摘要： A conductive via of a semiconductor device is provided extending in a vertical direction through a substrate, a first end of the conductive via extending through a first surface of the substrate, so that the first end protrudes in the vertical direction relative to the first surface of the substrate. An insulating layer is provided on the first end of the conductive via and on the first surface of the substrate. An upper portion of a mask layer pattern is removed so that a capping portion of the insulating layer that is on the first end of the conductive via is exposed. A portion of the insulating layer at a side of, and spaced apart from, the conductive via, is removed, to form a recess in the insulating layer. The capping portion of the insulating layer on the first end of the conductive via is simultaneously removed.

摘要翻译： 提供半导体器件的导电通孔，其沿垂直方向穿过衬底延伸，导电通孔的第一端延伸穿过衬底的第一表面，使得第一端相对于衬底的第一表面在垂直方向上突出 底物。 绝缘层设置在导电通孔的第一端和基板的第一表面上。 除去掩模层图案的上部，使得在导电通孔的第一端上的绝缘层的封盖部分露出。 去除绝缘层的与导电通孔相隔一定距离的一部分，以在绝缘层中形成凹陷。 同时去除导电通孔第一端上的绝缘层的封盖部分。

公开(公告)号：US08319348B2

公开(公告)日：2012-11-27

申请号：US12722643

申请日：2010-03-12

申请人： Jongmyeong Lee ,  Zungsun Choi ,  Gilheyun Choi ,  Byung-Lyul Park ,  Jinho Park ,  Hye Kyung Jung

发明人： Jongmyeong Lee ,  Zungsun Choi ,  Gilheyun Choi ,  Byung-Lyul Park ,  Jinho Park ,  Hye Kyung Jung

IPC分类号： H01L23/48

CPC分类号： H01L23/528 ,  H01L23/5226 ,  H01L23/53214 ,  H01L23/53228 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided are a metal interconnect of a semiconductor device and a method of fabricating the metal interconnect. The metal interconnect includes a metal line having a first end and a second end disposed on an opposite side to the first end, a via electrically connected to the metal line, and a non-active segment extending from the first end and including a void. Tensile stress is decreased to prevent a void from occurring under the via. Accordingly, line breakage due to electromigration is substantially prevented, thus improving electrical characteristics of the device.

摘要翻译： 提供半导体器件的金属互连和制造金属互连的方法。 金属互连包括金属线，其具有设置在与第一端相对的第一端和第二端，电连接到金属线的通孔和从第一端延伸并且包括空隙的非活性段。 减小拉伸应力以防止孔下方发生空隙。 因此，基本上防止了电迁移引起的线路断线，从而提高了器件的电气特性。

公开(公告)号：US20120039564A1

公开(公告)日：2012-02-16

申请号：US13191874

申请日：2011-07-27

申请人： Pil-Kyu Kang ,  GilHeyun Choi ,  Sukchul Bang ,  Daelok Bae ,  Byung-Lyul Park ,  KwangJin Moon ,  Dong-Chan Lim ,  Deok-Young Jung

发明人： Pil-Kyu Kang ,  GilHeyun Choi ,  Sukchul Bang ,  Daelok Bae ,  Byung-Lyul Park ,  KwangJin Moon ,  Dong-Chan Lim ,  Deok-Young Jung

IPC分类号： G02B6/12

CPC分类号： G02B6/131 ,  G02B6/132 ,  G02B6/136 ,  G02B2006/12061

摘要： A photoelectric integrated circuit device may include a substrate including an electronic device region and an on die optical input/output device region, the substrate having a trench in the on die optical input/output device region; a lower clad layer provided in the trench, the lower clad layer having an upper surface lower than a surface of the substrate; a core provided on the lower clad layer; an insulating pattern provided on the core; an optical detection pattern provided on the insulating pattern, the optical detection pattern having at least a portion provided in the trench; and at least one transistor provided on the substrate of the electronic device region.

摘要翻译： 光电集成电路器件可以包括包括电子器件区域和裸片上的光输入/输出器件区域的衬底，所述衬底在管芯光输入/输出器件区域中具有沟槽; 设置在所述沟槽中的下包层，所述下包层具有比所述基板的表面低的上表面; 设置在下包层上的芯; 设置在芯上的绝缘图案; 设置在所述绝缘图案上的光学检测图案，所述光学检测图案具有设置在所述沟槽中的至少一部分; 以及设置在电子器件区域的衬底上的至少一个晶体管。

公开(公告)号：US20150343495A1

公开(公告)日：2015-12-03

申请号：US14682349

申请日：2015-04-09

申请人： Kyoungseob KIM ,  Yongsun KO ,  SeokHoon KIM ,  Kuntack LEE ,  Hyosan LEE ,  Gilheyun CHOI

发明人： Kyoungseob KIM ,  Yongsun KO ,  SeokHoon KIM ,  Kuntack LEE ,  Hyosan LEE ,  Gilheyun CHOI

IPC分类号： B08B3/02 ,  H01L21/67

CPC分类号： H01L21/67051 ,  B08B3/024

摘要： An apparatus for treating a substrate includes a spin chuck supporting a substrate, a nozzle movably disposed on the spin chuck, the nozzle providing droplets of a treatment liquid onto a surface of the substrate, and a nozzle arm moving the nozzle above the spin chuck, wherein the nozzle arm moves the nozzle horizontally along the surface of the substrate, and vertically with respect to the surface of the substrate, wherein the nozzle arm moves the nozzle between an edge of the substrate and a center of the substrate, the nozzle moving away from the surface of the substrate while approaching toward the center of the substrate, and wherein droplets provided onto the center of the substrate have a smaller vertical spacing than that of droplets provided onto the edge of the substrate.

摘要翻译： 一种用于处理基板的设备包括支撑基板的旋转卡盘，可移动地设置在旋转卡盘上的喷嘴，喷嘴将处理液体的液滴提供到基板的表面上，喷嘴臂使喷嘴移动到旋转卡盘上方， 其中所述喷嘴臂沿着所述基板的表面水平地移动所述喷嘴，并相对于所述基板的表面垂直移动，其中所述喷嘴臂使所述喷嘴在所述基板的边缘和所述基板的中心之间移动，所述喷嘴移开 从衬底的表面接近朝向衬底的中心，并且其中设置在衬底的中心上的液滴具有比设置在衬底的边缘上的液滴更小的垂直间隔。

公开(公告)号：US20130210222A1

公开(公告)日：2013-08-15

申请号：US13758239

申请日：2013-02-04

申请人： Ho-Jin LEE ,  Kyu-ha LEE ,  Gilheyun CHOI ,  YongSoon CHOI ,  Pil-Kyu KANG ,  Byung-Lyul PARK ,  Hyunsoo CHUNG

发明人： Ho-Jin LEE ,  Kyu-ha LEE ,  Gilheyun CHOI ,  YongSoon CHOI ,  Pil-Kyu KANG ,  Byung-Lyul PARK ,  Hyunsoo CHUNG

IPC分类号： H01L21/768 ,  H01L23/00

CPC分类号： H01L21/768 ,  H01L21/02271 ,  H01L21/6836 ,  H01L21/76898 ,  H01L23/3192 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L25/0657 ,  H01L2221/68372 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05027 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/06181 ,  H01L2224/13006 ,  H01L2224/13009 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13076 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552 ,  H01L2924/00

摘要： In one embodiment, the method includes forming a conductive via structure in a base layer. The base layer has a first surface and a second surface, and the second surface is opposite the first surface. The method further includes removing the second surface of the base layer to expose the conductive via structure such that the conductive via structure protrudes from the second surface, and forming a first lower insulating layer over the second surface such that an end surface of the conductive via structure remains exposed by the first lower insulating layer.

摘要翻译： 在一个实施例中，该方法包括在基层中形成导电通孔结构。 基层具有第一表面和第二表面，并且第二表面与第一表面相对。 该方法还包括去除基底层的第二表面以暴露导电通路结构，使得导电通孔结构从第二表面突出，并且在第二表面上形成第一下绝缘层，使得导电通孔的端表面 结构保持由第一下绝缘层暴露。

公开(公告)号：US20090026618A1

公开(公告)日：2009-01-29

申请号：US12220527

申请日：2008-07-25

申请人： Hyun-Su Kim ,  Daeyong Kim ,  Eun-Ok Lee ,  Byunghee Kim ,  Jang-Hee Lee ,  Eun-Ji Jung ,  Gilheyun Choi

发明人： Hyun-Su Kim ,  Daeyong Kim ,  Eun-Ok Lee ,  Byunghee Kim ,  Jang-Hee Lee ,  Eun-Ji Jung ,  Gilheyun Choi

IPC分类号： H01L21/768 ,  H01L23/48

CPC分类号： H01L21/76868 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76871 ,  H01L23/485 ,  H01L27/105 ,  H01L27/10885 ,  H01L27/10888 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/24 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a method of forming a semiconductor device, and a semiconductor device formed according to the method, an insulating layer is provided on an underlying contact region of the semiconductor device. An opening is formed in the insulating layer to expose the underlying contact region. A seed layer is provided on sidewalls and a bottom of the opening, the seed layer comprising cobalt. A barrier layer of conductive material is provided in a lower portion of the opening, the seed layer being exposed on sidewalls of an upper portion of the opening. A metal layer is provided on the barrier layer in the opening to form an interlayer contact, the metal layer contacting the seed layer at the sidewalls of the upper portion of the opening.

摘要翻译： 在形成半导体器件的方法和根据该方法形成的半导体器件中，在半导体器件的下部接触区域上设置绝缘层。 在绝缘层中形成开口以露出下面的接触区域。 种子层设置在开口的侧壁和底部上，籽晶层包含钴。 导电材料的阻挡层设置在开口的下部，籽晶层暴露在开口上部的侧壁上。 金属层设置在开口中的阻挡层上以形成层间接触，金属层在开口上部的侧壁处与种子层接触。

公开(公告)号：US20130127019A1

公开(公告)日：2013-05-23

申请号：US13610296

申请日：2012-09-11

申请人： Dosun LEE ,  Byung Lyul Park ,  Gilheyun Choi ,  Kwangjin Moon ,  Kunsang Park ,  Sukchul Bang ,  Seongmin Son

发明人： Dosun LEE ,  Byung Lyul Park ,  Gilheyun Choi ,  Kwangjin Moon ,  Kunsang Park ,  Sukchul Bang ,  Seongmin Son

IPC分类号： H01L23/52

CPC分类号： H01L25/0657 ,  H01L21/7682 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06544 ,  H01L2924/15311

摘要： A semiconductor device may include a semiconductor substrate, a through via electrode, and a buffer. The through via electrode may extend through a thickness of the semiconductor substrate with the through via electrode surrounding an inner portion of the semiconductor substrate so that the inner portion of the semiconductor substrate may thus be isolated from the outer portion of the semiconductor substrate. The buffer may be in the inner portion of the semiconductor substrate with the through via electrode surrounding and spaced apart from the buffer. Related methods are also discussed.

摘要翻译： 半导体器件可以包括半导体衬底，通孔电极和缓冲器。 通孔电极可以通过半导体衬底的厚度延伸穿过半导体衬底的内部的通孔电极，使得半导体衬底的内部部分可以与半导体衬底的外部部分隔离。 缓冲器可以在半导体衬底的内部，其中通孔电极围绕并与缓冲器间隔开。 还讨论了相关方法。

公开(公告)号：US20130020719A1

公开(公告)日：2013-01-24

申请号：US13421388

申请日：2012-03-15

申请人： Eun-Ji Jung ,  Tsukasa Matsuda ,  Jongho Yun ,  Jongjin Lee ,  Gilheyun Choi ,  Seung-Wook Choi

发明人： Eun-Ji Jung ,  Tsukasa Matsuda ,  Jongho Yun ,  Jongjin Lee ,  Gilheyun Choi ,  Seung-Wook Choi

IPC分类号： H01L23/498

CPC分类号： H01L23/481 ,  H01L21/7682 ,  H01L21/76831 ,  H01L21/76898 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/00

摘要： A microelectronic device includes a substrate including a via hole extending therethrough, a porous layer on sidewalls of the via hole, and a conductive via electrode extending through the via hole between the sidewalls thereof. The porous layer includes a plurality of pores therein that reduce a dielectric constant of the porous layer. Related fabrication methods are also discussed.

摘要翻译： 微电子器件包括：衬底，其包括贯穿其中的通孔，在通孔的侧壁上的多孔层，以及延伸通过其侧壁之间的通孔的导电通孔电极。 多孔层包括其中的多个孔，其减小多孔层的介电常数。 还讨论了相关的制造方法。

公开(公告)号：US20120292782A1

公开(公告)日：2012-11-22

申请号：US13474992

申请日：2012-05-18

申请人： Ho-Jin LEE ,  Byung Lyul Park ,  SeYoung Jeong ,  Hyunsoo Chung ,  Gilheyun Choi

发明人： Ho-Jin LEE ,  Byung Lyul Park ,  SeYoung Jeong ,  Hyunsoo Chung ,  Gilheyun Choi

IPC分类号： H01L23/498

CPC分类号： H01L21/76898 ,  H01L21/7682 ,  H01L23/481 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05548 ,  H01L2224/06181 ,  H01L2224/13 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/13025

摘要： A microelectronic device includes a substrate having a trench extending therethrough between an active surface thereof and an inactive surface thereof opposite the active surface, a conductive via electrode extending through the substrate between sidewalls of the trench, and an insulating layer extending along the inactive surface of the substrate outside the trench and extending at least partially into the trench. The insulating layer defines a gap region in the trench that separates the substrate and the via electrode. Related devices and methods of fabrication are also discussed.

摘要翻译： 微电子器件包括：衬底，其具有在其活性表面与其与有源表面相对的非活性表面之间延伸穿过的沟槽;在沟槽的侧壁之间延伸通过衬底的导电通孔电极，以及沿沟槽的非活性表面延伸的绝缘层 衬底在沟槽外部并且至少部分地延伸到沟槽中。 绝缘层限定沟槽中的间隙区域，其分离衬底和通孔电极。 还讨论了相关装置和制造方法。

公开(公告)号：US08258058B2

公开(公告)日：2012-09-04

申请号：US13411873

申请日：2012-03-05

申请人： Tsukasa Matsuda ,  Gilheyun Choi ,  Jongmyeong Lee

发明人： Tsukasa Matsuda ,  Gilheyun Choi ,  Jongmyeong Lee

IPC分类号： H01L21/44

CPC分类号： H01L21/76814 ,  H01L21/02063 ,  H01L21/3105 ,  H01L21/32051 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76864 ,  H01L21/76867 ,  H01L21/76873 ,  H01L23/53238 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a semiconductor device is disclosed. A dielectric layer having a opening therein is formed on a semiconductor substrate. An inner surface of the opening is treated by plasma. A barrier metal layer is formed on the plasma-treated inner surface of the opening. A seed layer is formed on the barrier metal layer. A metal bulk layer is formed on the seed layer. High quality semiconductor devices can be fabricated by using these methods, which may stably fill the opening formed in the dielectric layer.