公开(公告)号：US20130082365A1

公开(公告)日：2013-04-04

申请号：US13251987

申请日：2011-10-03

Applicant: WILLIAM E. BERNIER ,  BING DANG ,  MARIO J. INTERRANTE ,  JOHN U. KNICKERBOCKER ,  SON K. TRAN

Inventor： WILLIAM E. BERNIER ,  BING DANG ,  MARIO J. INTERRANTE ,  JOHN U. KNICKERBOCKER ,  SON K. TRAN

IPC: H01L23/552

CPC classification number: H01L24/81 ,  H01L23/367 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/552 ,  H01L23/60 ,  H01L24/09 ,  H01L25/0655 ,  H01L2224/08238 ,  H01L2224/16225 ,  H01L2224/81192 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15738 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/19105 ,  H01L2924/00

Abstract: A interposer sandwich structure comprises a top interposer and a bottom interposer enclosing an integrated circuit electronic device that includes means for attaching the device to the bottom interposer, and an interconnection structure connecting the top interposer to the bottom interposer. The top interposer may also be directly connected to a chip carrier in addition to the bottom interposer. The structure provides shielding and protection of the device against Electrostatic Discharge (ESD), Electromagnetic Interference (EMI), and Electromagnetic Conductivity (EMC) in miniaturized 3D packaging.

Abstract translation: 插入器夹层结构包括顶部插入器和封装集成电路电子器件的底部插入器，其包括用于将器件附接到底部插入器的装置，以及将顶部插入件连接到底部插入器的互连结构。 除了底部插入器之外，顶部插入器还可以直接连接到芯片载体。 该结构提供了在小型化3D封装中防止静电放电（ESD），电磁干扰（EMI）和电磁导电（EMC））的器件的屏蔽和保护。

公开(公告)号：US20120256313A1

公开(公告)日：2012-10-11

申请号：US13080105

申请日：2011-04-05

Applicant: Luc Guerin ,  Mario J. Interrante ,  Michael J. Shapiro ,  Thuy Tran-Quinn ,  Van T. Truong

Inventor： Luc Guerin ,  Mario J. Interrante ,  Michael J. Shapiro ,  Thuy Tran-Quinn ,  Van T. Truong

IPC: H01L23/498 ,  H01L21/28

CPC classification number: H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02166 ,  H01L2224/03462 ,  H01L2224/03618 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05572 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/0566 ,  H01L2224/05681 ,  H01L2224/10126 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13118 ,  H01L2224/1312 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01026 ,  H01L2224/05552

Abstract: A solder ball contact and a method of making a solder ball contact includes: a first insulating layer with a via formed on an integrated circuit (IC) chip and a metal pad; an under bump metallurgy (UBM) structure disposed within the via and on a portion of the first insulating layer, surrounding the via; a second insulating layer formed on an upper surface of an outer portion of the UBM structure that is centered on the via; and a solder ball that fills the via and is disposed above an upper surface of an inner portion of the UBM structure that contacts the via, in which the UBM structure that underlies the solder ball is of a greater diameter than the solder ball.

Abstract translation: 焊球接触和制造焊球接触的方法包括：在集成电路（IC）芯片和金属焊盘上形成有通孔的第一绝缘层; 设置在所述通孔内和所述第一绝缘层的围绕所述通孔的部分上的凸块下冶金（UBM）结构; 第二绝缘层，形成在所述UBM结构的位于所述通孔的中心的外部的上表面上; 以及填充通孔并且设置在UBM结构的与通孔接触的内部的上表面上方的焊球，其中在焊球下面的UBM结构具有比焊球更大的直径。

公开(公告)号：US20090184407A1

公开(公告)日：2009-07-23

申请号：US12015754

申请日：2008-01-17

Applicant: Charles L. Arvin ,  Benjamin V. Fasano ,  Mario J. Interrante ,  Glenn A. Pomerantz

Inventor： Charles L. Arvin ,  Benjamin V. Fasano ,  Mario J. Interrante ,  Glenn A. Pomerantz

IPC: H01L21/70 ,  H01L23/02

CPC classification number: H05K3/3436 ,  H01L21/56 ,  H01L21/563 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/09701 ,  H05K3/225 ,  H05K2203/0278 ,  H05K2203/0338 ,  H05K2203/176 ,  Y02P70/613 ,  H01L2924/00

Abstract: Methods and reworked intermediate and resultant electronic modules made thereby, whereby a component in need of rework is located and removed from the module to reveal encapsulated solder connections residing within an underfill matrix. Heights of both the solder connections and underfill matrix are reduced, followed by etching the solder out of the solder connections to form openings within the underfill matrix. The underfill material is then removed to expose metallurgy of the substrate. A blank having a release layer with an array of solder connections is aligned with the exposed metallurgy, and this solder array is transferred from the blank onto the metallurgy. The transferred solder connections are then flattened using heat and pressure, followed by attaching solder connections of a new component to the flattened solder connections and underfilling these reworked solder connections residing between the new chip and substrate.

Abstract translation: 由此制造的方法和返工的中间和合成的电子模块，由此将需要返工的部件放置并从模块移除，以露出位于底部填充基质内的封装的焊料连接。 焊接连接和底部填充基体的高度减小，随后将焊料从焊料连接处蚀刻出来，以在底部填充基体内形成开口。 然后除去底部填充材料以暴露基底的冶金。 具有具有焊接连接阵列的释放层的坯料与暴露的冶金学对准，并且该焊料阵列从坯料转移到冶金上。 然后，使用热和压力将转移的焊接连接件平坦化，然后将新部件的焊接连接件连接到扁平焊接连接，并对位于新芯片和基板之间的这些返工焊接点进行底部填充。

公开(公告)号：US06827505B2

公开(公告)日：2004-12-07

申请号：US10320844

申请日：2002-12-16

Applicant: Subhash L. Shinde ,  L. Wynn Herron ,  Mario J. Interrante ,  How T. Lin ,  Steven P. Ostrander ,  Sudipta K. Ray ,  William E. Sablinski ,  Hilton Toy

Inventor： Subhash L. Shinde ,  L. Wynn Herron ,  Mario J. Interrante ,  How T. Lin ,  Steven P. Ostrander ,  Sudipta K. Ray ,  William E. Sablinski ,  Hilton Toy

IPC: G02B636

CPC classification number: G02B6/4201 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014

Abstract: An optical-electronic package for an electronic device provides electrical connections to the electronic device and optical fiber connections to the electronic device. The package includes a high thermal conductivity base which has a pedestal to support and provide heat transfer connection to the electronic device. A seal band is formed on the base and a casing is bonded to the seal band. The casing has side feedthroughs for the electrical connections from the electronic device, and the casing has top feedthroughs or grooves for the optical fiber connections from the electronic device. A lid is hermetically sealed to the top of the casing. The lid has retractable means for forming a bend in the optical fibers to provide strain relief when the lid is placed on the casing. The retractable means for forming a bend in the optical fibers is retractable once the lid is sealed on the casing.

公开(公告)号：US06497357B2

公开(公告)日：2002-12-24

申请号：US09850350

申请日：2001-05-07

Applicant: Raymond A. Jackson ,  Scott A. Bradley ,  Stephen A. DeLaurentis ,  Mario J. Interrante ,  David C. Linnell

Inventor： Raymond A. Jackson ,  Scott A. Bradley ,  Stephen A. DeLaurentis ,  Mario J. Interrante ,  David C. Linnell

IPC: B23K120

CPC classification number: B08B1/008 ,  B08B7/0071 ,  H01L21/4864 ,  H05K3/3436 ,  H05K3/3457

Abstract: A method for removing at least one molten or solid structure from a surface including: placing the surface with the at least one molten or solid structure in a fixture; disposing said wiper assembly acted on by a bias proximate the at least one molten or solid structure; retaining the wiper assembly in a first position with a device having a first temperature point level equivalent to or higher than a second melting point level of the at least one molten or solid structure; and raising the temperature of the fixture to the first temperature point level; wherein the at least one molten or solid structure is wiped from the surface when the device reaches the first temperature point level. An apparatus for removing at least one molten or solid structure from a substrate for rework, the apparatus comprising: a fixture for sustaining and biasing the substrate against a wiper assembly; the wiper assembly configured and positioned to slidably engage at least a portion of the substrate; a bias for translating the wiper assembly along a surface of the substrate having the at least one molten or solid structure to be removed; and a guide block assembly capable of guiding and locking the wiper assembly.

Abstract translation: 一种用于从表面去除至少一种熔融或固体结构的方法，包括：将具有至少一种熔融或固体结构的表面放置在固定装置中; 将所述擦拭器组件布置成靠近所述至少一个熔融或固体结构的偏压; 将所述刮水器组件保持在具有等于或高于所述至少一个熔融或固体结构的第二熔点水平的第一温度点水平的装置的第一位置; 并将夹具的温度提高到第一温度点水平; 其中当所述装置达到所述第一温度点水平时，所述至少一个熔融或固体结构从所述表面擦拭。 一种用于从基板去除至少一个熔融或固体结构以进行返修的装置，所述装置包括：固定装置，用于将所述基板保持并偏置在刮水器组件上; 所述擦拭器组件被构造和定位成可滑动地接合所述衬底的至少一部分; 用于沿着具有要移除的至少一个熔融或固体结构的衬底的表面平移擦拭器组件的偏压; 以及能够引导和锁定刮水器组件的导块组件。

公开(公告)号：US06216937B1

公开(公告)日：2001-04-17

申请号：US09470455

申请日：1999-12-22

Applicant: Stephen A. DeLaurentis ,  Mario J. Interrante ,  Raymond A. Jackson ,  John U. Knickerbocker ,  Sudipta K. Ray ,  Kathleen A. Stalter

Inventor： Stephen A. DeLaurentis ,  Mario J. Interrante ,  Raymond A. Jackson ,  John U. Knickerbocker ,  Sudipta K. Ray ,  Kathleen A. Stalter

IPC: B23K100

CPC classification number: H01L21/687 ,  B23K1/018 ,  H01L24/98

Abstract: A process and apparatus for removing flip chips with C4 joints mounted on a multi-chip module by applying a tensile force to one or more removal member bonded to the back of one or more flip chips during heating of the module to a temperature sufficient to cause the C4 joints to become molten. The tensile force can either be a compressed spring, or a bimetallic member which is flat at room temperature and becomes curved when heated to such temperature, or a memory alloy whose original shape is curved and which is bent flat at room temperature but returns to its original curved shape when heated to such temperature. An adhesive is used to bond the removal member to the chip to be removed and is a low temperature, fast curing adhesive with high temperature tolerance after curing.

Abstract translation: 一种用于通过在将模块加热到足以导致的温度的温度下向一个或多个倒装芯片的背面施加张力而将一个或多个去除构件施加拉力而移除通过安装在多芯片模块上的C4接头的倒装芯片的方法和装置 C4接头变得熔化。 张力可以是压缩弹簧，也可以是在室温下平坦并在加热到这样的温度时变得弯曲的双金属构件，或者原始形状是弯曲的并且在室温下弯曲平坦但回到其中的记忆合金 原来弯曲的形状加热到这样的温度。 使用粘合剂将去除构件粘合到要去除的芯片上，并且是固化后具有耐高温性的低温快速固化粘合剂。

公开(公告)号：US5288007A

公开(公告)日：1994-02-22

申请号：US996366

申请日：1992-12-23

Applicant: Mario J. Interrante ,  Michael Berger ,  Edward F. Handford ,  Eugene Tas

Inventor： Mario J. Interrante ,  Michael Berger ,  Edward F. Handford ,  Eugene Tas

IPC: B23K20/10 ,  H01L21/607 ,  H05K3/22 ,  H05K3/32 ,  H05K3/34

CPC classification number: H01L24/78 ,  B23K20/10 ,  H01L24/80 ,  H05K3/225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/78 ,  H01L24/45 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/19041 ,  H01L2924/19107 ,  H05K2201/10287 ,  H05K2203/0285 ,  H05K2203/049 ,  H05K2203/173 ,  H05K3/328 ,  H05K3/3457

Abstract: The present invention relates generally to apparatus and methods for making simultaneous electrical connections, and more particularly to making these electrical connections simultaneously using a new bond tip configuration. Various methods and processes are being disclosed to simultaneously make electrical connections between electrical conductor lines or pads. The electrical connection is made by placing an electrically conductive wire across a pair of electrical lines or pads that have to be electrically connected and then by using a special tip, both ends of the electrically conductive wire are simultaneously secured to the two electrically conductive lines or pads.

Abstract translation: 本发明一般涉及用于同时进行电连接的装置和方法，更具体地说，涉及使用新的接合端头配置同时进行这些电连接。 正在公开各种方法和过程以同时在电导线或焊盘之间进行电连接。 电连接通过将导电线放置在必须电连接的一对电线或焊盘上，然后通过使用特殊尖端，导电线的两端同时固定到两条导电线或 垫

公开(公告)号：US5243140A

公开(公告)日：1993-09-07

申请号：US771707

申请日：1991-10-04

Applicant: Harsaran S. Bhatia ,  Mario J. Interrante ,  Suresh D. Kadakia ,  Shashi D. Malaviya ,  Mark H. McLeod ,  Sudipta K. Ray ,  Herbert I. Stoller

Inventor： Harsaran S. Bhatia ,  Mario J. Interrante ,  Suresh D. Kadakia ,  Shashi D. Malaviya ,  Mark H. McLeod ,  Sudipta K. Ray ,  Herbert I. Stoller

IPC: H01L23/12 ,  H01L21/48 ,  H01L23/538

CPC classification number: H01L23/5382 ,  H01L21/485 ,  H01L2224/16225 ,  H01L2924/19107

Abstract: A direct distribution wiring system is provided which facilitates the effecting of repair or engineering change in a Multi-chip module (MCM) while eliminating the need for redistribution and/or buried connections between IC attachment pads and engineering change pads, thus eliminating the need for patterned conductor layers corresponding to such functions. The operation of the MCM is improved by the wiring system allowing the reduction of lumped capacitances by disconnection of defective conductors, accomplished by providing severable connectors in a direct distribution structure, as well as the elimination of redistribution wiring layers and increased IC density on the MCM. Full potential fault coverage as well as full discretion in reversible engineering changes is provided by forming all elements of the wiring system on the surface of the device.

公开(公告)号：US08614512B2

公开(公告)日：2013-12-24

申请号：US13615804

申请日：2012-09-14

Applicant: Luc Guerin ,  Mario J. Interrante ,  Michael J. Shapiro ,  Thuy Tran-Quinn ,  Van T. Truong

Inventor： Luc Guerin ,  Mario J. Interrante ,  Michael J. Shapiro ,  Thuy Tran-Quinn ,  Van T. Truong

IPC: H01L29/40

CPC classification number: H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02166 ,  H01L2224/03462 ,  H01L2224/03618 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05572 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/0566 ,  H01L2224/05681 ,  H01L2224/10126 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13118 ,  H01L2224/1312 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01026 ,  H01L2224/05552

Abstract: A solder ball contact and a method of making a solder ball contact includes: a first insulating layer with a via formed on an integrated circuit (IC) chip and a metal pad; an under bump metallurgy (UBM) structure disposed within the via and on a portion of the first insulating layer, surrounding the via; a second insulating layer formed on an upper surface of an outer portion of the UBM structure that is centered on the via; and a solder ball that fills the via and is disposed above an upper surface of an inner portion of the UBM structure that contacts the via, in which the UBM structure that underlies the solder ball is of a greater diameter than the solder ball.

公开(公告)号：US07781232B2

公开(公告)日：2010-08-24

申请号：US12015754

申请日：2008-01-17

Applicant: Charles L. Arvin ,  Benjamin V. Fasano ,  Mario J. Interrante ,  Glenn A. Pomerantz

Inventor： Charles L. Arvin ,  Benjamin V. Fasano ,  Mario J. Interrante ,  Glenn A. Pomerantz

IPC: H01L21/48 ,  H01L21/00

CPC classification number: H05K3/3436 ,  H01L21/56 ,  H01L21/563 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/09701 ,  H05K3/225 ,  H05K2203/0278 ,  H05K2203/0338 ,  H05K2203/176 ,  Y02P70/613 ,  H01L2924/00

Abstract: Methods and reworked intermediate and resultant electronic modules made thereby, whereby a component in need of rework is located and removed from the module to reveal encapsulated solder connections residing within an underfill matrix. Heights of both the solder connections and underfill matrix are reduced, followed by etching the solder out of the solder connections to form openings within the underfill matrix. The underfill material is then removed to expose metallurgy of the substrate. A blank having a release layer with an array of solder connections is aligned with the exposed metallurgy, and this solder array is transferred from the blank onto the metallurgy. The transferred solder connections are then flattened using heat and pressure, followed by attaching solder connections of a new component to the flattened solder connections and underfilling these reworked solder connections residing between the new chip and substrate.

Abstract translation: 由此制造的方法和返工的中间和合成的电子模块，由此将需要返工的部件放置并从模块移除，以露出位于底部填充基质内的封装的焊料连接。 焊接连接和底部填充基体的高度减小，随后将焊料从焊料连接处蚀刻出来，以在底部填充基体内形成开口。 然后除去底部填充材料以暴露基底的冶金。 具有具有焊接连接阵列的释放层的坯料与暴露的冶金学对准，并且该焊料阵列从坯料转移到冶金上。 然后，使用热和压力将转移的焊接连接件平坦化，然后将新部件的焊接连接件连接到扁平焊接连接，并对位于新芯片和基板之间的这些返工焊接点进行底部填充。