公开(公告)号：US5437915A

公开(公告)日：1995-08-01

申请号：US261230

申请日：1994-06-16

申请人： Asao Nishimura ,  Akihiro Yaguchi ,  Mitsuaki Haneda ,  Ichiro Anjoh ,  Junichi Arita ,  Akihiko Iwaya ,  Masahiro Ichitani

发明人： Asao Nishimura ,  Akihiro Yaguchi ,  Mitsuaki Haneda ,  Ichiro Anjoh ,  Junichi Arita ,  Akihiko Iwaya ,  Masahiro Ichitani

IPC分类号： B23K26/00 ,  B23K26/20 ,  H01L23/495 ,  H01L23/50 ,  B32B9/00

CPC分类号： H01L23/4951 ,  H01L23/49537 ,  H01L23/49575 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/12042 ,  Y10S428/901 ,  Y10T428/24917

摘要： A method of producing a leadframe for use in semiconductor devices, comprises the steps of forming a space between leads 1a and 1b which are to be overlapped and welded each other, and welding the leads at a region including the space and melting and cutting off one of the leads. In one of the leads which is melted, cohesion and separation of molten metal occur in the region around the space. As a result, unnecessary portions such as an outer frame used for positioning can be cut off at the same time when the leads are connected by welding. Thus, high precision positioning of a plurality of element leadframes as well as high assembling productivity are achieved.

摘要翻译： 一种制造用于半导体器件的引线框架的方法包括以下步骤：在要重叠和焊接的引线1a和1b之间形成空间，并且在包括该空间的区域中焊接引线并熔化并切断一个 的领导。 在熔化的一个引线中，熔融金属的内聚和分离发生在空间周围的区域中。 结果，当通过焊接连接引线时，可以切断用于定位的诸如用于定位的外框之类的不必要的部分。 因此，实现了多个元件引线框架的高精度定位以及高的组装生产率。

公开(公告)号：US5571428A

公开(公告)日：1996-11-05

申请号：US423735

申请日：1995-04-18

申请人： Asao Nishimura ,  Akihiro Yaguchi ,  Mitsuaki Haneda ,  Ichiro Anjoh ,  Junichi Arita ,  Akihiko Iwaya ,  Masahiro Ichitani

发明人： Asao Nishimura ,  Akihiro Yaguchi ,  Mitsuaki Haneda ,  Ichiro Anjoh ,  Junichi Arita ,  Akihiko Iwaya ,  Masahiro Ichitani

IPC分类号： B23K26/00 ,  B23K26/20 ,  H01L23/495 ,  H01L23/50 ,  B23K28/02

CPC分类号： H01L23/4951 ,  H01L23/49537 ,  H01L23/49575 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/12042 ,  Y10S428/901 ,  Y10T428/24917

摘要： A method of producing a leadframe for use in semiconductor devices, comprises the steps of forming a space between leads 1a and 1b which are to be overlapped and welded each other, and welding the leads at a region including the space and melting and cutting off one of the leads. In one of the leads which is melted, cohesion and separation of molten metal occur in the region around the space. As a result, unnecessary portions such as an outer frame used for positioning can be cut off at the same time when the leads are connected by welding. Thus, high precision positioning of a plurality of element leadframes as well as high assembling productivity are achieved.

公开(公告)号：US5714405A

公开(公告)日：1998-02-03

申请号：US721240

申请日：1996-09-26

申请人： Kunihiro Tsubosaki ,  Michio Tanimoto ,  Kunihiko Nishi ,  Masahiro Ichitani ,  Shunji Koike ,  Kazunari Suzuki ,  Ryosuke Kimoto ,  Ichiro Anjoh ,  Taisei Jin ,  Akihiko Iwaya ,  Gen Murakami ,  Masamichi Ishihara ,  Junichi Arita

发明人： Kunihiro Tsubosaki ,  Michio Tanimoto ,  Kunihiko Nishi ,  Masahiro Ichitani ,  Shunji Koike ,  Kazunari Suzuki ,  Ryosuke Kimoto ,  Ichiro Anjoh ,  Taisei Jin ,  Akihiko Iwaya ,  Gen Murakami ,  Masamichi Ishihara ,  Junichi Arita

IPC分类号： H01L23/31 ,  H01L23/495 ,  H01L25/10 ,  H01L21/60

CPC分类号： H01L24/06 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/4951 ,  H01L24/05 ,  H01L24/49 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85424 ,  H01L2225/1029 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/1305 ,  H01L2924/181 ,  H01L2924/351 ,  Y10T29/49121

摘要： A semiconductor device having inner leads secured via insulating adhesive films to the principal surface of a semiconductor chip and electrically connected to the respective external terminals of the semiconductor chip. The semiconductor device that can be about the size of the chip is so configured that an outer lead is continuously extended from each inner lead up to the rear surface opposite to the principal surface of the semiconductor chip in order to hold the leads and an external device in conduction.

摘要翻译： 一种半导体器件，其具有通过绝缘粘合剂膜固定到半导体芯片的主表面并与半导体芯片的各个外部端子电连接的内部引线。 可以关于芯片尺寸的半导体器件被配置为使得外引线从每个内引线连续地延伸到与半导体芯片的主表面相对的后表面，以便保持引线和外部器件 导通。

公开(公告)号：US5583375A

公开(公告)日：1996-12-10

申请号：US990633

申请日：1992-12-14

申请人： Kunihiro Tsubosaki ,  Michio Tanimoto ,  Kunihiko Nishi ,  Masahiro Ichitani ,  Shunji Koike ,  Kazunari Suzuki ,  Ryosuke Kimoto ,  Ichiro Anjoh ,  Taisei Jin ,  Akihiko Iwaya ,  Gen Murakami ,  Masamichi Ishihara ,  Junichi Arita

发明人： Kunihiro Tsubosaki ,  Michio Tanimoto ,  Kunihiko Nishi ,  Masahiro Ichitani ,  Shunji Koike ,  Kazunari Suzuki ,  Ryosuke Kimoto ,  Ichiro Anjoh ,  Taisei Jin ,  Akihiko Iwaya ,  Gen Murakami ,  Masamichi Ishihara ,  Junichi Arita

IPC分类号： H01L23/31 ,  H01L23/495 ,  H01L25/10 ,  H01L23/48

CPC分类号： H01L24/06 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/4951 ,  H01L24/05 ,  H01L24/49 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85424 ,  H01L2225/1029 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/1305 ,  H01L2924/181 ,  H01L2924/351 ,  Y10T29/49121

摘要： A semiconductor device having inner leads secured via insulating adhesive films to the principal surface of a semiconductor chip and electrically connected to the respective external terminals of the semiconductor chip. The semiconductor device that can be about the size of the chip is so configured that an outer lead is continuously extended from each inner lead up to the rear surface opposite to the principal surface of the semiconductor chip in order to hold the leads and an external device in conduction.

摘要翻译： 一种半导体器件，其具有通过绝缘粘合剂膜固定到半导体芯片的主表面并与半导体芯片的各个外部端子电连接的内部引线。 可以关于芯片尺寸的半导体器件被配置为使得外引线从每个内引线连续地延伸到与半导体芯片的主表面相对的后表面，以便保持引线和外部器件 导通。

公开(公告)号：US5869888A

公开(公告)日：1999-02-09

申请号：US721339

申请日：1996-09-26

申请人： Kunihiro Tsubosaki ,  Michio Tanimoto ,  Kunihiko Nishi ,  Masahiro Ichitani ,  Shunji Koike ,  Kazunari Suzuki ,  Ryosuke Kimoto ,  Ichiro Anjoh ,  Taisei Jin ,  Akihiko Iwaya ,  Gen Murakami ,  Masamichi Ishihara ,  Junichi Arita

发明人： Kunihiro Tsubosaki ,  Michio Tanimoto ,  Kunihiko Nishi ,  Masahiro Ichitani ,  Shunji Koike ,  Kazunari Suzuki ,  Ryosuke Kimoto ,  Ichiro Anjoh ,  Taisei Jin ,  Akihiko Iwaya ,  Gen Murakami ,  Masamichi Ishihara ,  Junichi Arita

IPC分类号： H01L23/31 ,  H01L23/495 ,  H01L25/10 ,  H01L23/48

CPC分类号： H01L24/06 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/4951 ,  H01L24/05 ,  H01L24/49 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85424 ,  H01L2225/1029 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/1305 ,  H01L2924/181 ,  H01L2924/351 ,  Y10T29/49121

摘要： A semiconductor device having inner leads secured via insulating adhesive films to the principal surface of a semiconductor chip and electrically connected to the respective external terminals of the semiconductor chip. The semiconductor device that can be about the size of the chip is so configured that an outer lead is continuously extended from each inner lead up to the rear surface opposite to the principal surface of the semiconductor chip in order to hold the leads and an external device in conduction.

摘要翻译： 一种半导体器件，其具有通过绝缘粘合剂膜固定到半导体芯片的主表面并与半导体芯片的各个外部端子电连接的内部引线。 可以关于芯片尺寸的半导体器件被配置为使得外引线从每个内引线连续地延伸到与半导体芯片的主表面相对的后表面，以便保持引线和外部器件 导通。

公开(公告)号：US5252854A

公开(公告)日：1993-10-12

申请号：US717262

申请日：1991-06-18

申请人： Junichi Arita ,  Akihiko Iwaya ,  Tomoo Matsuzawa ,  Masahiro Ichitani

发明人： Junichi Arita ,  Akihiko Iwaya ,  Tomoo Matsuzawa ,  Masahiro Ichitani

IPC分类号： H01L21/60 ,  H01L23/495 ,  H01L23/50 ,  H01L23/02

CPC分类号： H01L24/06 ,  H01L23/4951 ,  H01L23/49534 ,  H01L23/49537 ,  H01L23/50 ,  H01L24/05 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48799 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/181

摘要： Disclosed is a resin-molded type semiconductor device having a thin package while avoiding short-circuit of wires with a common inner lead. In the construction thereof, a common inner lead constituted by a thin metal sheet is fixed onto a circuit-forming surface of a rectangular semiconductor chip substantially in parallel with longer sides of the chip and substantially in a central region of the chip, and a plurality of inner leads for signals, which are in the form of a frame, are stacked and fixed onto the common inner lead; then these components are molded with resin.

摘要翻译： 公开了具有薄封装的树脂模制型半导体器件，同时避免了具有公共内引线的电线短路。 在其构造中，将由薄金属片构成的公共内引线固定到矩形半导体芯片的电路形成表面上，该矩形半导体芯片与芯片的较长边基本上平行，并且基本上在芯片的中心区域中，并且多个 以框架形式的信号的内引线被堆叠并固定在公共内引线上; 那么这些组分用树脂模制。

公开(公告)号：US6064112A

公开(公告)日：2000-05-16

申请号：US47350

申请日：1998-03-25

申请人： Akihiko Iwaya ,  Tamaki Wada ,  Masachika Masuda ,  Kunihiro Tsubosaki ,  Asao Nishimura

发明人： Akihiko Iwaya ,  Tamaki Wada ,  Masachika Masuda ,  Kunihiro Tsubosaki ,  Asao Nishimura

IPC分类号： H01L23/50 ,  H01L23/48 ,  H01L23/495 ,  H01L25/10 ,  H01L25/18 ,  H01L25/11

CPC分类号： H01L24/06 ,  H01L23/4951 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/73215 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/351

摘要： A semiconductor device in which inner leads among a plurality of leads are arranged on a circuit formation face of a semiconductor chip encapsulated by a resin encapsulating body and bonding pads formed on the circuit formation face of the chip and the inner leads are electrically connected. An adhesive is selectively applied only to the inner leads on the outermost sides arranged on both ends of the chip among the plurality of inner leads. The circuit formation face of the chip and the inner leads of the selected leads are joined with the adhesive Each of the selected leads has a step on the main face of the semiconductor chip and the leads except for the selected leads have almost straight shapes without being processed to have steps.

摘要翻译： 一种半导体器件，其中多个引线中的内部引线布置在由树脂封装体封装的半导体芯片的电路形成面上，并且形成在芯片的电路形成面上的接合焊盘和内部引线电连接。 粘合剂仅选择性地仅施加在布置在多个内引线中的芯片两端的最外侧的内引线上。 芯片的电路形成面和所选引线的内引线与粘合剂接合每个所选择的引线在半导体芯片的主面上具有台阶，除了所选择的引线之外的引线具有几乎直的形状，而不是 加工成有步骤。

公开(公告)号：US06576994B2

公开(公告)日：2003-06-10

申请号：US10115986

申请日：2002-04-05

申请人： Akihiko Iwaya ,  Tamaki Wada ,  Masachika Masuda

发明人： Akihiko Iwaya ,  Tamaki Wada ,  Masachika Masuda

IPC分类号： H01L2348

CPC分类号： H01L24/06 ,  H01L21/565 ,  H01L23/4951 ,  H01L23/49551 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48599 ,  H01L2224/48647 ,  H01L2224/4866 ,  H01L2224/48699 ,  H01L2224/48747 ,  H01L2224/4876 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85447 ,  H01L2224/8546 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01055 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A LOC type semiconductor device comprises a semiconductor chip having a main surface in which semiconductor elements and a plurality of bonding pads are formed, and a back surface opposite the main surface; a plurality of leads each having an inner part and an outer part, and including a plurality of first leads having inner end portions extended on the main surface of the semiconductor chip and a plurality of second leads having inner end portions terminating near the semiconductor chip; bonding wires electrically connecting the bonding pads to bonding portions of the inner parts of the first and the second leads; and a sealing member sealing the semiconductor chip therein. A first bending portion is formed in the inner part of each second lead to prevent the sealing member from transformation by forming the sealing member in satisfactory resin balance between an upper portion and a lower portion of the sealing member.

公开(公告)号：US06388318B1

公开(公告)日：2002-05-14

申请号：US09563455

申请日：2000-05-03

申请人： Akihiko Iwaya ,  Toshio Sugano ,  Susumu Hatano ,  Yutaka Kagaya ,  Masachika Masuda

发明人： Akihiko Iwaya ,  Toshio Sugano ,  Susumu Hatano ,  Yutaka Kagaya ,  Masachika Masuda

IPC分类号： H01L2334

CPC分类号： H01L21/563 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06136 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48471 ,  H01L2224/48475 ,  H01L2224/48479 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49433 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85051 ,  H01L2224/85986 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01055 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/15151 ,  H01L2924/15162 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/85186 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/4554

摘要： A semiconductor device capable of improving the flexibility of designing electrical lead patterns for connection from chips via a substrate to external terminals by appropriately arranging the substrate structure and layout of more than one address signal as commonly shared by four separate chips is disclosed. In a surface mount type package of ball grid array (BGA), four chips 1 are mounted on a substrate 2 in such a manner such these are laid out in the form of an array of two rows and two columns. These four chips 1 are such that regarding the upper side and lower side, these are in linear symmetry with respect to a center line extending in a direction along long side edges of the substrate 2. Each chip 1 has a plurality of pads 9 which are disposed thereon into an almost linear array substantially along the center line in the direction of short side edges, which pads include addressing pads 9a that are located on the side of central part on a specified plane of the substrate 2, and control-use pads 9b of control signals that are also placed on the center side of the substrate 2. The pad array also includes input/output pads 9c that are disposed so that these are on the peripheral side on the surface of substrate 2.

摘要翻译： 公开了一种半导体器件，其能够通过适当地布置基板结构和由四个独立芯片共同共享的多个地址信号的布局，来提高设计用于从芯片连接到外部端子的引线图案的灵活性。 在球栅阵列（BGA）的表面安装型封装中，四个芯片1以这样的方式安装在基板2上，使得它们以两行和两列的阵列的形式布置。 这四个芯片1相对于上侧和下侧相对于沿着基板2的长边缘的方向延伸的中心线呈直线对称。每个芯片1具有多个焊盘9， 沿着短边缘的方向大致沿着中心线布置成几乎线性的阵列，这些焊盘包括位于基板2的指定平面上的中心部分侧的寻址焊盘9a，以及控制用焊盘9b 也设置在基板2的中心侧的控制信号。焊盘阵列还包括布置成使其位于基板2的表面的周边的输入/输出焊盘9c。

公开(公告)号：US6137159A

公开(公告)日：2000-10-24

申请号：US258300

申请日：1999-02-26

申请人： Kunihiro Tsubosaki ,  Masachika Masuda ,  Akihiko Iwaya ,  Atsushi Nakamura ,  Chikako Imura ,  Toshihiro Shiotsuki

发明人： Kunihiro Tsubosaki ,  Masachika Masuda ,  Akihiko Iwaya ,  Atsushi Nakamura ,  Chikako Imura ,  Toshihiro Shiotsuki

IPC分类号： H01L23/495 ,  H01L23/50

CPC分类号： H01L24/06 ,  H01L23/4951 ,  H01L23/49551 ,  H01L23/50 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06136 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/92147 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181

摘要： The present invention provides a thin, inexpensive, high-performance semiconductor device provided with busbar leads, power leads and signal leads. A portion of the power lead connected to the busbar lead is depressed toward a major surface of a semiconductor chip to form a depressed portion, and the depressed portion is bonded to the major surface of the semiconductor chip by an adhesive layer. The signal lead and the busbar lead are spaced apart from the major surface of the semiconductor chip.

摘要翻译： 本发明提供一种薄型，廉价的高性能半导体器件，其具有母线引线，电源引线和信号引线。 连接到汇流条引线的电源引线的一部分朝向半导体芯片的主表面压下以形成凹陷部分，并且凹陷部分通过粘合剂层结合到半导体芯片的主表面。 信号引线和母线引线与半导体芯片的主表面间隔开。