公开(公告)号：US09142508B2

公开(公告)日：2015-09-22

申请号：US13170095

申请日：2011-06-27

申请人： Cyprian Uzoh ,  Vage Oganesian ,  Ilyas Mohammed ,  Craig Mitchell ,  Belgacem Haba

发明人： Cyprian Uzoh ,  Vage Oganesian ,  Ilyas Mohammed ,  Craig Mitchell ,  Belgacem Haba

IPC分类号： H01L23/52 ,  H01L23/528 ,  H01L23/532 ,  H01L21/768

CPC分类号： H01L21/76831 ,  H01L21/76807 ,  H01L21/76834 ,  H01L21/76852 ,  H01L21/76885 ,  H01L21/76897 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53209 ,  H01L23/53238 ,  H01L23/53252 ,  H01L2221/1036 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods of fabricating a multi-layer semiconductor device such as a multi-layer damascene or inverted multi-layer damascene structure using only a single or reduced number of exposure steps. The method may include etching a precursor structure formed of materials with differential removal rates for a given removal condition. The method may include removing material from a multi-layer structure under different removal conditions. Further disclosed are multi-layer damascene structures having multiple cavities of different sizes. The cavities may have smooth inner wall surfaces. The layers of the structure may be in direct contact. The cavities may be filled with a conducting metal or an insulator. Multi-layer semiconductor devices using the methods and structures are further disclosed.

摘要翻译： 仅使用单个或减少数量的曝光步骤来制造多层半导体器件的方法，例如多层镶嵌或倒置的多层镶嵌结构。 该方法可以包括用于对于给定的去除条件蚀刻由具有差异去除速率的材料形成的前体结构。 该方法可以包括在不同的去除条件下从多层结构去除材料。 还公开了具有不同尺寸的多个空腔的多层镶嵌结构。 空腔可以具有平滑的内壁表面。 结构的层可以直接接触。 空腔可以用导电金属或绝缘体填充。 进一步公开了使用这些方法和结构的多层半导体器件。

公开(公告)号：US20120326313A1

公开(公告)日：2012-12-27

申请号：US13170095

申请日：2011-06-27

申请人： Cyprian Uzoh ,  Vage Oganesian ,  Ilyas Mohammed ,  Craig Mitchell ,  Belgacem Haba

发明人： Cyprian Uzoh ,  Vage Oganesian ,  Ilyas Mohammed ,  Craig Mitchell ,  Belgacem Haba

IPC分类号： H01L23/52 ,  H01L21/768

CPC分类号： H01L21/76831 ,  H01L21/76807 ,  H01L21/76834 ,  H01L21/76852 ,  H01L21/76885 ,  H01L21/76897 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53209 ,  H01L23/53238 ,  H01L23/53252 ,  H01L2221/1036 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods of fabricating a multi-layer semiconductor device such as a multi-layer damascene or inverted multi-layer damascene structure using only a single or reduced number of exposure steps. The method may include etching a precursor structure formed of materials with differential removal rates for a given removal condition. The method may include removing material from a multi-layer structure under different removal conditions. Further disclosed are multi-layer damascene structures having multiple cavities of different sizes. The cavities may have smooth inner wall surfaces. The layers of the structure may be in direct contact. The cavities may be filled with a conducting metal or an insulator. Multi-layer semiconductor devices using the methods and structures are further disclosed.

摘要翻译： 仅使用单个或减少数量的曝光步骤来制造多层半导体器件的方法，例如多层镶嵌或倒置的多层镶嵌结构。 该方法可以包括用于对于给定的去除条件蚀刻由具有差异去除速率的材料形成的前体结构。 该方法可以包括在不同的去除条件下从多层结构去除材料。 还公开了具有不同尺寸的多个空腔的多层镶嵌结构。 空腔可以具有平滑的内壁表面。 结构的层可以直接接触。 空腔可以用导电金属或绝缘体填充。 进一步公开了使用这些方法和结构的多层半导体器件。

公开(公告)号：US09125333B2

公开(公告)日：2015-09-01

申请号：US13183870

申请日：2011-07-15

申请人： Cyprian Uzoh ,  Vage Oganesian ,  Ilyas Mohammed ,  Belgacem Haba ,  Piyush Savalia ,  Craig Mitchell

发明人： Cyprian Uzoh ,  Vage Oganesian ,  Ilyas Mohammed ,  Belgacem Haba ,  Piyush Savalia ,  Craig Mitchell

IPC分类号： H05K1/03 ,  H05K1/09 ,  H05K3/40

CPC分类号： H01L24/05 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05169 ,  H01L2224/056 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01074 ,  H01L2924/013 ,  H05K1/09 ,  H05K3/4007 ,  H05K2201/032 ,  H05K2201/0326 ,  H05K2201/0338

摘要： Barrier layers for use in electrical applications. In some embodiments the barrier layer is a laminated barrier layer. In some embodiments the barrier layer includes a graded barrier layer.

摘要翻译： 用于电气应用的阻隔层。 在一些实施例中，阻挡层是层压阻挡层。 在一些实施例中，阻挡层包括梯度阻挡层。

公开(公告)号：US20130122747A1

公开(公告)日：2013-05-16

申请号：US13296785

申请日：2011-11-15

申请人： Cyprian Uzoh ,  Craig Mitchell ,  Belgacem Haba ,  Ilyas Mohammed

发明人： Cyprian Uzoh ,  Craig Mitchell ,  Belgacem Haba ,  Ilyas Mohammed

IPC分类号： H01R24/28

CPC分类号： H05K1/0271 ,  H01L23/49827 ,  H01L2924/0002 ,  H01R12/714 ,  H05K1/114 ,  H05K1/115 ,  H05K3/42 ,  H05K2201/09645 ,  H05K2201/10378 ,  H05K2203/0242 ,  H05K2203/025 ,  Y10T29/49165 ,  H01L2924/00

摘要： An interconnection component includes an element with an opening, a plurality of conductors electrically insulted from one another extending through the opening, and a plurality of second contacts electrically insulated from one another. The element is comprised of a material having a coefficient of thermal expansion of less than 10 parts per million per degree Celsius. At least some of the conductors extend along at least one inner surface of the opening. The conductors define a plurality of wettable first contacts at the first surface. The first contacts are at least partially aligned with the opening in a direction of the thickness and electrically insulated from one another.

摘要翻译： 互连部件包括具有开口的元件，延伸穿过开口彼此电绝缘的多个导体以及彼此电绝缘的多个第二触点。 该元件由热膨胀系数小于10ppm /℃的材料构成。 至少一些导体沿开口的至少一个内表面延伸。 导体在第一表面限定多个可润湿的第一接触。 第一触点在厚度方向上与开口至少部分地对齐，并且彼此电绝缘。

公开(公告)号：US20130014978A1

公开(公告)日：2013-01-17

申请号：US13183870

申请日：2011-07-15

申请人： Cyprian Uzoh ,  Vage Oganesian ,  Ilyas Mohammed ,  Belgacem Haba ,  Piyush Savalia ,  Craig Mitchell

发明人： Cyprian Uzoh ,  Vage Oganesian ,  Ilyas Mohammed ,  Belgacem Haba ,  Piyush Savalia ,  Craig Mitchell

IPC分类号： H05K1/09 ,  B05D1/36 ,  B05D5/12

CPC分类号： H01L24/05 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05169 ,  H01L2224/056 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01074 ,  H01L2924/013 ,  H05K1/09 ,  H05K3/4007 ,  H05K2201/032 ,  H05K2201/0326 ,  H05K2201/0338

摘要： Barrier layers for use in electrical applications. In some embodiments the barrier layer is a laminated barrier layer. In some embodiments the barrier layer includes a graded barrier layer.

摘要翻译： 用于电气应用的阻隔层。 在一些实施例中，阻挡层是层压阻挡层。 在一些实施例中，阻挡层包括梯度阻挡层。

公开(公告)号：US08609540B2

公开(公告)日：2013-12-17

申请号：US13164448

申请日：2011-06-20

申请人： Cyprian Uzoh ,  Belgacem Haba ,  Craig Mitchell

发明人： Cyprian Uzoh ,  Belgacem Haba ,  Craig Mitchell

IPC分类号： H01L21/32

CPC分类号： H01L23/528 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/76802 ,  H01L21/76804 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76852 ,  H01L21/76868 ,  H01L21/76873 ,  H01L21/76879 ,  H01L21/76883 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/53209 ,  H01L23/53238 ,  H01L24/13 ,  H01L24/14 ,  H01L2221/1094 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/14181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/05552

摘要： Methods and apparatus for forming a semiconductor device are provided which may include any number of features. One feature is a method of forming an interconnect structure that results in the interconnect structure having a top surface and portions of the side walls of the interconnect structure covered in a dissimilar material. In some embodiments, the dissimilar material can be a conductive material or a nano-alloy. The interconnect structure can be formed by removing a portion of the interconnect structure, and covering the interconnect structure with the dissimilar material. The interconnect structure can comprise a damascene structure, such as a single or dual damascene structure, or alternatively, can comprise a silicon-through via (TSV) structure.

摘要翻译： 提供了用于形成半导体器件的方法和装置，其可以包括任何数量的特征。 一个特征是形成互连结构的方法，其导致互连结构具有覆盖在不同材料中的互连结构的顶表面和侧壁的部分。 在一些实施例中，异种材料可以是导电材料或纳米合金。 互连结构可以通过去除互连结构的一部分并且用不同材料覆盖互连结构来形成。 互连结构可以包括镶嵌结构，例如单镶嵌结构或双镶嵌结构，或者可以包括硅通孔（TSV）结构。

公开(公告)号：US20120319282A1

公开(公告)日：2012-12-20

申请号：US13164448

申请日：2011-06-20

申请人： Cyprian Uzoh ,  Belgacem Haba ,  Craig Mitchell

发明人： Cyprian Uzoh ,  Belgacem Haba ,  Craig Mitchell

IPC分类号： H01L23/522 ,  H01L21/768

CPC分类号： H01L23/528 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/76802 ,  H01L21/76804 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76852 ,  H01L21/76868 ,  H01L21/76873 ,  H01L21/76879 ,  H01L21/76883 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/53209 ,  H01L23/53238 ,  H01L24/13 ,  H01L24/14 ,  H01L2221/1094 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/14181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/05552

摘要： Methods and apparatus for forming a semiconductor device are provided which may include any number of features. One feature is a method of forming an interconnect structure that results in the interconnect structure having a top surface and portions of the side walls of the interconnect structure covered in a dissimilar material. In some embodiments, the dissimilar material can be a conductive material or a nano-alloy. The interconnect structure can be formed by removing a portion of the interconnect structure, and covering the interconnect structure with the dissimilar material. The interconnect structure can comprise a damascene structure, such as a single or dual damascene structure, or alternatively, can comprise a silicon-through via (TSV) structure.

摘要翻译： 提供了用于形成半导体器件的方法和装置，其可以包括任何数量的特征。 一个特征是形成互连结构的方法，其导致互连结构具有覆盖在不同材料中的互连结构的顶表面和侧壁的部分。 在一些实施例中，异种材料可以是导电材料或纳米合金。 互连结构可以通过去除互连结构的一部分并且用不同材料覆盖互连结构来形成。 互连结构可以包括镶嵌结构，例如单镶嵌结构或双镶嵌结构，或者可以包括硅通孔（TSV）结构。

公开(公告)号：US08937361B2

公开(公告)日：2015-01-20

申请号：US13114243

申请日：2011-05-24

申请人： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

发明人： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

IPC分类号： H01L31/0232 ,  H01L27/146

CPC分类号： H01L27/14625 ,  H01L27/1461 ,  H01L27/14629 ,  H01L27/14632 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14687

摘要： A microelectronic image sensor assembly for backside illumination and method of making same are provided. The assembly includes a microelectronic element having contacts exposed at a front face and light sensing elements arranged to receive light of different wavelengths through a rear face. A semiconductor region has a first thickness between the first light sensing element and the rear face and a second thickness between the second light sensing element and the rear face such that the first and second light sensing elements receive light of substantially the same intensity. A dielectric region is provided at least substantially filling a space of the semiconductor region adjacent at least one of the light sensing elements. The dielectric region may include at least one light guide.

摘要翻译： 提供了一种用于背面照明的微电子图像传感器组件及其制造方法。 该组件包括具有在正面暴露的触点的微电子元件和被布置成通过后表面接收不同波长的光的光感测元件。 半导体区域在第一光感测元件和后表面之间具有第一厚度，并且在第二光感测元件和后表面之间具有第二厚度，使得第一和第二光感测元件接收基本上相同强度的光。 提供至少基本上填充与至少一个光感测元件相邻的半导体区域的空间的电介质区域。 电介质区域可以包括至少一个光导。

公开(公告)号：US08916781B2

公开(公告)日：2014-12-23

申请号：US13296785

申请日：2011-11-15

申请人： Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Cyprian Emeka Uzoh

发明人： Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Cyprian Emeka Uzoh

IPC分类号： H05K1/11 ,  H05K1/03 ,  H05K1/09 ,  H05K1/00 ,  H01L23/498 ,  H01R12/71 ,  H05K3/42

CPC分类号： H05K1/0271 ,  H01L23/49827 ,  H01L2924/0002 ,  H01R12/714 ,  H05K1/114 ,  H05K1/115 ,  H05K3/42 ,  H05K2201/09645 ,  H05K2201/10378 ,  H05K2203/0242 ,  H05K2203/025 ,  Y10T29/49165 ,  H01L2924/00

摘要： An interconnection component includes an element with an opening, a plurality of conductors electrically insulted from one another extending through the opening, and a plurality of second contacts electrically insulated from one another. The element is comprised of a material having a coefficient of thermal expansion of less than 10 parts per million per degree Celsius. At least some of the conductors extend along at least one inner surface of the opening. The conductors define a plurality of wettable first contacts at the first surface. The first contacts are at least partially aligned with the opening in a direction of the thickness and electrically insulated from one another.

摘要翻译： 互连部件包括具有开口的元件，延伸穿过开口彼此电绝缘的多个导体以及彼此电绝缘的多个第二触点。 该元件由热膨胀系数小于10ppm /℃的材料构成。 至少一些导体沿开口的至少一个内表面延伸。 导体在第一表面限定多个可润湿的第一接触。 第一触点在厚度方向上与开口至少部分地对齐，并且彼此电绝缘。

公开(公告)号：US08652935B2

公开(公告)日：2014-02-18

申请号：US12970529

申请日：2010-12-16

申请人： Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell ,  Vage Oganesian ,  Belgacem Haba

发明人： Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell ,  Vage Oganesian ,  Belgacem Haba

IPC分类号： H01L21/30

CPC分类号： H01L23/562 ,  B81C1/00269 ,  B81C1/00357 ,  H01L21/2007 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L23/13 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L29/0657 ,  H01L2224/29186 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/83051 ,  H01L2224/83191 ,  H01L2224/83345 ,  H01L2224/83385 ,  H01L2224/83855 ,  H01L2224/83856 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/1027 ,  H01L2924/1032 ,  H01L2924/1037 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/3511 ,  H01L2224/83 ,  H01L2924/00

摘要： A method of bonding first and second microelectronic elements includes pressing together a first substrate containing active circuit elements therein with a second substrate, with a flowable dielectric material between confronting surfaces of the respective substrates, each of the first and second substrates having a coefficient of thermal expansion less than 10 parts per million/° C., at least one of the confronting surfaces having a plurality of channels extending from an edge of such surface, such that the dielectric material between planes defined by the confronting surfaces is at least substantially free of voids and has a thickness over one micron, and at least some of the dielectric material flows into at least some of the channels.

摘要翻译： 接合第一和第二微电子元件的方法包括将含有有源电路元件的第一衬底与第二衬底压在一起，在相应衬底的相对表面之间具有可流动介电材料，第一和第二衬底中的每一个具有热系数 膨胀小于10ppm /℃，至少一个相对表面具有从该表面的边缘延伸的多个通道，使得由相对表面限定的平面之间的电介质材料至少基本上不含 空隙并且具有超过一微米的厚度，并且至少一些介电材料流入至少一些通道。