公开(公告)号：US20080054476A1

公开(公告)日：2008-03-06

申请号：US11976629

申请日：2007-10-26

申请人： Frank Egitto ,  Stephen Krasniak ,  John Lauffer ,  Voya Markovich ,  Luis Matienzo

发明人： Frank Egitto ,  Stephen Krasniak ,  John Lauffer ,  Voya Markovich ,  Luis Matienzo

IPC分类号： H01L23/52

CPC分类号： H05K3/384 ,  H05K1/056 ,  H05K3/386 ,  H05K2201/0355 ,  H05K2201/0358 ,  H05K2203/0353 ,  H05K2203/0723

摘要： A circuitized substrate with a conductive layer which assures enhanced adhesion of the layer to selected dielectric layers used to form the circuitized substrate. The conductive layer includes at least one surface with the appropriate roughness to enable such adhesion and also good signal passage if the layer is used as a signal layer.

摘要翻译： 具有导电层的电路化衬底，其确保该层对用于形成电路化衬底的所选介电层的附着力增强。 导电层包括具有适当粗糙度的至少一个表面以实现这种粘附，并且如果该层用作信号层，则还具有良好的信号通过。

公开(公告)号：US20060121738A1

公开(公告)日：2006-06-08

申请号：US11327493

申请日：2006-01-09

申请人： Frank Egitto ,  Stephen Krasniak ,  John Lauffer ,  Voya Markovich ,  Luis Matienzo

发明人： Frank Egitto ,  Stephen Krasniak ,  John Lauffer ,  Voya Markovich ,  Luis Matienzo

IPC分类号： H01L21/311 ,  C25D5/10

CPC分类号： H05K3/384 ,  H05K1/056 ,  H05K3/386 ,  H05K2201/0355 ,  H05K2201/0358 ,  H05K2203/0353 ,  H05K2203/0723

摘要： A method of treating a conductive layer to assure enhanced adhesion of the layer to selected dielectric layers used to form a circuitized substrate. The conductive layer includes at least one surface with the appropriate roughness to enable such adhesion and also good signal passage if the layer is used as a signal layer. The method is extendible to the formation of such substrates, including to the formation of multilayered substrates having many conductive and dielectric layers. Such substrates may include one or more electrical components (e.g., semiconductor chips) mounted thereon and may also be mounted themselves onto other substrates.

摘要翻译： 一种处理导电层以确保该层对用于形成电路化基底的所选介电层的附着力的方法。 导电层包括具有适当粗糙度的至少一个表面以实现这种粘附，并且如果该层用作信号层，则还具有良好的信号通过。 该方法可扩展到形成这种衬底，包括形成具有许多导电和电介质层的多层衬底。 这样的基板可以包括安装在其上的一个或多个电气部件（例如，半导体芯片），并且也可以将它们本身安装到其它基板上。

公开(公告)号：US20070006452A1

公开(公告)日：2007-01-11

申请号：US11177413

申请日：2005-07-11

申请人： Frank Egitto ,  Voya Markovich ,  Luis Matienzo

发明人： Frank Egitto ,  Voya Markovich ,  Luis Matienzo

IPC分类号： B32B37/00 ,  H05K3/30

CPC分类号： H05K3/462 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/445 ,  H05K2201/015 ,  H05K2201/0245 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/1152 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T156/1056 ,  Y10T156/1062

摘要： A method of making a circuitized substrate which includes a high temperature dielectric material in combination with a low temperature conductive paste, the paste including an organic binder component and at least one metallic component. The flakes of the metallic component are sintered to form a conductive path through the dielectric when the dielectric is used as a layer in the substrate.

摘要翻译： 一种制造电路化基板的方法，该基板包括与低温导电浆料组合的高温电介质材料，所述糊料包括有机粘合剂成分和至少一种金属成分。 当电介质用作衬底中的层时，金属部件的薄片被烧结以形成通过电介质的导电路径。

公开(公告)号：US20070007032A1

公开(公告)日：2007-01-11

申请号：US11177442

申请日：2005-07-11

申请人： Frank Egitto ,  Voya Markovich ,  Luis Matienzo

发明人： Frank Egitto ,  Voya Markovich ,  Luis Matienzo

IPC分类号： H05K1/03 ,  H05K1/09 ,  H05K1/11

CPC分类号： H05K3/462 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/445 ,  H05K2201/015 ,  H05K2201/0245 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/1152 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A circuitized substrate which includes a high temperature dielectric material in combination with a low temperature conductive paste, the paste including an organic binder component and at least one metallic component. The flakes of the metallic component are sintered to form a conductive path through the dielectric when the dielectric is used as a layer in the substrate.

摘要翻译： 一种电路化基板，包括与低温导电浆料组合的高温电介质材料，所述糊料包括有机粘合剂成分和至少一种金属成分。 当电介质用作衬底中的层时，金属部件的薄片被烧结以形成通过电介质的导电路径。

公开(公告)号：US20080022520A1

公开(公告)日：2008-01-31

申请号：US11905188

申请日：2007-09-28

申请人： Frank Egitto ,  Voya Markovich ,  Luis Matienzo

发明人： Frank Egitto ,  Voya Markovich ,  Luis Matienzo

IPC分类号： H05K3/36 ,  H05K3/20

CPC分类号： H05K3/462 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/445 ,  H05K2201/015 ,  H05K2201/0245 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/1152 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A method of making a multilayered circuitized substrate assembly which includes bonding at least two circuitized substrates each including at least one layer of high temperature dielectric material, one of these layers in turn including at least one thru-hole therein having therein a quantity of a a low temperature conductive paste, the paste including an organic binder component and at least one metallic component. The flakes of the metallic component are sintered during the bonding to form a conductive path through the dielectric of one of the substrates.

摘要翻译： 一种制造多层电路化基板组件的方法，该方法包括粘合至少两个电路化基板，每个电路基板包括至少一层高温介电材料，这些层中的一个依次包括至少一个其中具有一定数量的低电介质材料的通孔 所述膏体包含有机粘合剂成分和至少一种金属成分。 金属部件的薄片在接合期间被烧结以形成通过其中一个基板的电介质的导电路径。

公开(公告)号：US20080105457A1

公开(公告)日：2008-05-08

申请号：US12007178

申请日：2008-01-08

申请人： Frank Egitto ,  Voya Markovich ,  Luis Matienzo

发明人： Frank Egitto ,  Voya Markovich ,  Luis Matienzo

IPC分类号： H05K1/03

CPC分类号： H05K3/462 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/445 ,  H05K2201/015 ,  H05K2201/0245 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/1152 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T156/1056 ,  Y10T156/1062

摘要： A circuitized substrate which includes a high temperature dielectric material in combination with a low temperature conductive paste, the paste including an organic binder component and at least one metallic component. The flakes of the metallic component are sintered to form a conductive path through the dielectric when the dielectric is used as a layer in the substrate.

摘要翻译： 一种电路化基板，包括与低温导电浆料组合的高温电介质材料，所述糊料包括有机粘合剂成分和至少一种金属成分。 当电介质用作衬底中的层时，金属部件的薄片被烧结以形成通过电介质的导电路径。

公开(公告)号：US20060022310A1

公开(公告)日：2006-02-02

申请号：US10900386

申请日：2004-07-28

申请人： Frank Egitto ,  John Lauffer ,  How Lin ,  Voya Markovich ,  David Thomas

发明人： Frank Egitto ,  John Lauffer ,  How Lin ,  Voya Markovich ,  David Thomas

IPC分类号： H01L23/58

CPC分类号： G11C5/06 ,  B82Y10/00 ,  G02B6/43 ,  H01L23/48 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/16 ,  H05K1/181 ,  H05K3/429 ,  H05K3/4611 ,  H05K2201/0166 ,  H05K2201/0179 ,  H05K2201/09763 ,  H05K2201/10159 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： An electrical assembly which includes a circuitized substrate comprised of an organic dielectric material having a first electrically conductive pattern thereon. At least part of the dielectric layer and pattern form the first, base portion of an organic memory device, the remaining portion being a second, polymer layer formed over the part of the pattern and a second conductive circuit formed on the polymer layer. A second dielectric layer if formed over the second conductive circuit and first circuit pattern to enclose the organic memory device. The device is electrically coupled to a first electrical component through the second dielectric layer and this first electrical component is electrically coupled to a second electrical component. A method of making the electrical assembly is also provided, as is an information handling system adapted for using one or more such electrical assemblies as part thereof.

摘要翻译： 一种电气组件，其包括由其上具有第一导电图案的有机电介质材料构成的电路化衬底。 电介质层和图案的至少一部分形成有机存储器件的第一基底部分，其余部分是形成在图案部分上的第二聚合物层和形成在聚合物层上的第二导电电路。 如果形成在第二导电电路上的第二电介质层和第一电路图案以包围有机存储器件。 该器件通过第二介电层电耦合到第一电气部件，并且该第一电气部件电耦合到第二电气部件。 还提供了制造电气组件的方法，以及适于使用一个或多个这样的电气组件作为其一部分的信息处理系统。

公开(公告)号：US08198739B2

公开(公告)日：2012-06-12

申请号：US12836612

申请日：2010-08-13

申请人： How Lin ,  Frank Egitto ,  Voya Markovich

发明人： How Lin ,  Frank Egitto ,  Voya Markovich

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L23/3157 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/72 ,  H01L2224/0226 ,  H01L2224/02335 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73251 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/81901 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/16 ,  H01L2224/72

摘要： A method of forming a compressible contact structure on a semi-conductor chip which comprises bonding a compressible polymer layer to the chip's surface, forming a plurality of openings within the layer, depositing electrically conductive material within the openings to form electrical connections with the chip's contacts, forming a plurality of electrically conductive line elements on the polymer layer extending from a respective opening and each including an end portion, and forming a plurality of contact members each on a respective one of the line segment end portions. The compressible polymer layer allows the contact members to deflect toward (compress) the chip when the contact members are engaged by an external force or forces. A semi-conductor chip including such a compressible contact structure is also provided.

摘要翻译： 一种在半导体芯片上形成可压缩接触结构的方法，包括将可压缩的聚合物层粘合到芯片的表面，在该层内形成多个开口，在开口内沉积导电材料以形成与芯片的触点的电连接 在聚合物层上形成多个导电线元件，所述多个导电线元件从相应的开口延伸并且各自包括端部，并且在所述线段端部中的相应一个上形成多个接触元件。 当可接触构件通过外力或力接合时，可压缩聚合物层允许接触构件偏转（压缩）芯片。 还提供了包括这种可压缩接触结构的半导体芯片。

公开(公告)号：US20060214010A1

公开(公告)日：2006-09-28

申请号：US11401401

申请日：2006-04-11

申请人： Benson Chan ,  Frank Egitto ,  Roy Magnuson ,  Voya Markovich ,  David Thomas

发明人： Benson Chan ,  Frank Egitto ,  Roy Magnuson ,  Voya Markovich ,  David Thomas

IPC分类号： G06K19/06

CPC分类号： G06K7/084 ,  G06K17/00 ,  G06K19/005 ,  G06K19/07354 ,  G06K2017/0064 ,  H05K1/0221 ,  H05K1/0222 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/09809 ,  H05K2203/0733 ,  Y10T29/49165

摘要： A circuitized substrate in which selected ones of the signal conductors are substantially surrounded by shielding members which shield the conductors during passage of high frequency signals, e.g., to reduce noise. The shielding members may form solid members which lie parallel and/or perpendicular to the signal conductors, and may also be substantially cylindrical in shape to surround a conductive thru-hole which also forms part of the substrate. An electrical assembly and an information handling system are also defined.

摘要翻译： 电路化基板，其中所选择的信号导体基本上由在高频信号通过期间屏蔽导体的屏蔽构件包围，例如降低噪声。 屏蔽构件可以形成平行和/或垂直于信号导体的固体构件，并且也可以基本上为圆柱形，以包围也形成衬底的一部分的导电通孔。 还定义了电组件和信息处理系统。

公开(公告)号：US20120038046A1

公开(公告)日：2012-02-16

申请号：US12836612

申请日：2010-08-13

申请人： How Lin ,  Frank Egitto ,  Voya Markovich

发明人： How Lin ,  Frank Egitto ,  Voya Markovich

IPC分类号： H01L23/48 ,  H01L21/447

CPC分类号： H01L23/3157 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/72 ,  H01L2224/0226 ,  H01L2224/02335 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73251 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/81901 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/16 ,  H01L2224/72

摘要： A method of forming a compressible contact structure on a semi-conductor chip which comprises bonding a compressible polymer layer to the chip's surface, forming a plurality of openings within the layer, depositing electrically conductive material within the openings to form electrical connections with the chip's contacts, forming a plurality of electrically conductive line elements on the polymer layer extending from a respective opening and each including an end portion, and forming a plurality of contact members each on a respective one of the line segment end portions. The compressible polymer layer allows the contact members to deflect toward (compress) the chip when the contact members are engaged by an external force or forces. A semi-conductor chip including such a compressible contact structure is also provided.

摘要翻译： 一种在半导体芯片上形成可压缩接触结构的方法，包括将可压缩的聚合物层粘合到芯片的表面，在该层内形成多个开口，在开口内沉积导电材料以形成与芯片的触点的电连接 在聚合物层上形成多个导电线元件，所述多个导电线元件从相应的开口延伸并且各自包括端部，并且在所述线段端部中的相应一个上形成多个接触元件。 当可接触构件通过外力或力接合时，可压缩聚合物层允许接触构件偏转（压缩）芯片。 还提供了包括这种可压缩接触结构的半导体芯片。