公开(公告)号：US20180222933A1

公开(公告)日：2018-08-09

申请号：US15570989

申请日：2015-06-18

申请人： Intel Corporation

发明人： Patricio E. ROMERO

IPC分类号： C07F15/00 ,  C07F1/02 ,  C07F11/00 ,  C23C16/18 ,  C23C16/04 ,  H01L21/768 ,  H01L21/285

CPC分类号： C07F15/0053 ,  C07F1/005 ,  C07F1/02 ,  C07F11/005 ,  C23C16/04 ,  C23C16/18 ,  H01L21/28562 ,  H01L21/28568 ,  H01L21/76801 ,  H01L21/76816 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76876 ,  H01L21/76879 ,  H01L21/76897

摘要： Inherently selective precursors for deposition of second or third row transition metal (e.g., tungsten or ruthenium) thin films are described. In an example, a ligand framework for second or third row transition metal complex formation includes a lithium complex.

公开(公告)号：US20160190060A1

公开(公告)日：2016-06-30

申请号：US14909736

申请日：2013-09-27

申请人： Rami HOURANI ,  INTEL CORPORATION

发明人： Robert L. Bristol ,  James M. BLACKWELL ,  Scott B. CLENDENNING ,  Florian GSTREIN ,  Eungnak HAN ,  Grant M. KLOSTER ,  Jeanette M. ROBERTS ,  Patricio E. ROMERO ,  Rami HOURANI

IPC分类号： H01L23/528 ,  H01L23/532 ,  H01L21/311 ,  H01L21/768 ,  H01L21/3205 ,  H01L23/522 ,  H01L21/3105

CPC分类号： H01L23/528 ,  H01L21/28562 ,  H01L21/288 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/311 ,  H01L21/32 ,  H01L21/32051 ,  H01L21/321 ,  H01L21/76801 ,  H01L21/76816 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76877 ,  H01L21/76897 ,  H01L23/5226 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of an aspect includes forming a first thicker layer of a first material over a first region having a first surface material by separately forming each of a first plurality of thinner layers by selective chemical reaction. The method also includes limiting encroachment of each of the first plurality of thinner layers over a second region that is adjacent to the first region. A second thicker layer of a second material is formed over the second region having a second surface material that is different than the first surface material.

摘要翻译： 一个方面的方法包括通过通过选择性化学反应分别形成第一多个较薄层中的每一个，在具有第一表面材料的第一区域上形成第一材料的第一较厚层。 该方法还包括限制在与第一区域相邻的第二区域上的第一多个较薄层中的每一个的侵入。 在第二区域上形成第二较厚的第二材料层，其具有不同于第一表面材料的第二表面材料。

公开(公告)号：US20230058025A1

公开(公告)日：2023-02-23

申请号：US17962043

申请日：2022-10-07

申请人： Intel Corporation

发明人： Patricio E. ROMERO

IPC分类号： C07F5/00 ,  C23C16/30 ,  C23C16/40 ,  C23C16/455 ,  H01L21/02 ,  H01L29/51

摘要： Described are precursor compounds and methods for atomic layer deposition of films containing scandium(III) oxide or scandium(III) sulfide. Such films may be utilized as dielectric layers in semiconductor manufacturing processes, particular for depositing dielectric films and the use of such films in various electronic devices.

公开(公告)号：US20200168462A1

公开(公告)日：2020-05-28

申请号：US16637177

申请日：2017-09-27

申请人： Intel Corporation

发明人： Patricio E. ROMERO ,  Scott B. CLENDENNING ,  Florian GSTREIN ,  Cen TAN

IPC分类号： H01L21/28 ,  H01L21/02 ,  H01L29/51 ,  H01L21/306

摘要： Embodiments herein describe techniques for a semiconductor device including a Ge substrate. A passivation layer may be formed above the Ge substrate, where the passivation layer may include one or more molecular monolayers with atoms of one or more group 15 elements or group 16 elements. In addition, a low-k interlayer may be above the passivation layer, and a high-k interlayer may be above the low-k interlayer. Furthermore, a metal contact may be above the high-k interlayer. Other embodiments may be described and/or claimed.

公开(公告)号：US20180219080A1

公开(公告)日：2018-08-02

申请号：US15506101

申请日：2014-09-26

申请人： INTEL CORPORATION

发明人： Scott B. CLENDENNING ,  Szuya S. LIAO ,  Florian GSTREIN ,  Rami HOURANI ,  Patricio E. ROMERO ,  Grant M. KLOSTER ,  Martin M. MITAN

IPC分类号： H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L21/28

CPC分类号： H01L29/66545 ,  H01L21/265 ,  H01L21/266 ,  H01L21/28247 ,  H01L29/0673 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/4983 ,  H01L29/51 ,  H01L29/66439 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785

摘要： Techniques related to forming selective gate spacers for semiconductor devices and transistor structures and devices formed using such techniques are discussed. Such techniques include forming a blocking material on a semiconductor fin, disposing a gate having a different surface chemistry than the blocking material on a portion of the blocking material, forming a selective conformal layer on the gate but not on a portion of the blocking material, and removing exposed portions of the blocking material.

公开(公告)号：US20240092804A1

公开(公告)日：2024-03-21

申请号：US18522056

申请日：2023-11-28

申请人： Intel Corporation

发明人： Patricio E. ROMERO

IPC分类号： C07F5/00 ,  C23C16/30 ,  C23C16/40 ,  C23C16/455 ,  H01L21/02 ,  H01L29/51

CPC分类号： C07F5/003 ,  C23C16/305 ,  C23C16/40 ,  C23C16/45553 ,  H01L21/02205 ,  H01L21/0228 ,  H01L29/517

摘要： Described are precursor compounds and methods for atomic layer deposition of films containing scandium(III) oxide or scandium(III) sulfide. Such films may be utilized as dielectric layers in semiconductor manufacturing processes, particular for depositing dielectric films and the use of such films in various electronic devices.

公开(公告)号：US20190189803A1

公开(公告)日：2019-06-20

申请号：US16271226

申请日：2019-02-08

申请人： Intel Corporation

发明人： Grant KLOSTER ,  Scott B. CLENDENNING ,  Rami HOURANI ,  Szuya S. LIAO ,  Patricio E. ROMERO ,  Florian GSTREIN

IPC分类号： H01L29/78 ,  H01L21/32 ,  H01L21/3105 ,  H01L21/28 ,  H01L29/51 ,  H01L29/66 ,  H01L29/423 ,  H01L29/06 ,  H01L29/786 ,  H01L21/311 ,  H01L21/02

CPC分类号： H01L29/7851 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/0228 ,  H01L21/28194 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/31133 ,  H01L21/32 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L29/0649 ,  H01L29/0673 ,  H01L29/42368 ,  H01L29/42392 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/786 ,  H01L29/78696

摘要： Methods of selectively depositing high-K gate dielectric on a semiconductor structure are disclosed. The method includes providing a semiconductor structure disposed above a semiconductor substrate. The semiconductor structure is disposed beside an isolation sidewall. A sacrificial blocking layer is then selectively deposited on the isolation sidewall and not on the semiconductor structure. Thereafter, a high-K gate dielectric is deposited on the semiconductor structure, but not on the sacrificial blocking layer. Properties of the sacrificial blocking layer prevent deposition of oxide material on its surface. A thermal treatment is then performed to remove the sacrificial blocking layer, thereby forming a high-K gate dielectric only on the semiconductor structure.

公开(公告)号：US20180138054A1

公开(公告)日：2018-05-17

申请号：US15570968

申请日：2015-06-17

申请人： Intel Corporation

发明人： Patricio E. ROMERO ,  John J. PLOMBON

IPC分类号： H01L21/3213 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L21/28 ,  H01L23/532 ,  H01L43/12

CPC分类号： H01L21/32135 ,  H01L21/28079 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76883 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53209 ,  H01L27/222 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

摘要： Transition metal dry etch by atomic layer removal of oxide layers for device fabrication, and the resulting devices, are described. In an example, a method of etching a film includes reacting a surface layer of a transition metal species of a transition metal-containing film with a molecular oxidant species. The method also includes removing volatile fragments of the reacted molecular oxidant species to provide an oxidized surface layer of the transition metal species. The method also includes reacting the oxidized surface layer of the transition metal species with a molecular etchant. The method also includes removing the reacted oxidized surface layer of the transition metal species and the reacted molecular etchant by volatlilization.

公开(公告)号：US20170058401A1

公开(公告)日：2017-03-02

申请号：US15119699

申请日：2014-03-27

申请人： Intel Corporation

发明人： James M. BLACKWELL ,  Patricio E. ROMERO ,  Scott B. CLENDENNING ,  Grant M. KLOSTER ,  Florian GSTREIN ,  Harsono S. SIMKA ,  Paul A. ZIMMERMAN ,  Robert L. BRISTOL

IPC分类号： C23C16/455 ,  H01L21/768 ,  H01L29/66 ,  H01L21/285 ,  C23C16/18 ,  C23C16/48

CPC分类号： C23C16/45553 ,  C23C16/18 ,  C23C16/482 ,  H01L21/0337 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/76816 ,  H01L21/76879 ,  H01L21/76897 ,  H01L29/66795

摘要： Precursor and process design for photo-assisted metal atomic layer deposition (ALD) and chemical vapor deposition (CVD) is described. In an example, a method of fabricating a thin metal film involves introducing precursor molecules proximate to a surface on or above a substrate, each of the precursor molecules having one or more metal centers surrounded by ligands. The method also involves depositing a metal layer on the surface by dissociating the ligands from the precursor molecules using a photo-assisted process.

摘要翻译： 描述了光辅助金属原子层沉积（ALD）和化学气相沉积（CVD）的前体和工艺设计。 在一个实例中，制造薄金属膜的方法包括将前体分子引入靠近基底上或表面的表面，每个前体分子具有被配体包围的一个或多个金属中心。 该方法还涉及通过使用光辅助方法从前体分子解离配体而在表面上沉积金属层。