摘要:
Silicon is selectively oxidized relative to a metal-containing material in a partially-fabricated integrated circuit. In some embodiments, the silicon and metal-containing materials are exposed portions of a partially-fabricated integrated circuit and may form part of, e.g., a transistor. The silicon and metal-containing material are oxidized in an atmosphere containing an oxidant and a reducing agent. In some embodiments, the reducing agent is present at a concentration of about 10 vol % or less.
摘要:
Oxygen is selectively removed from metal-containing materials in a partially-fabricated integrated circuit. In some embodiments, the partially-fabricated integrated circuit has exposed silicon and metal-containing materials, e.g., as part of a transistor. The silicon and metal-containing material are oxidized. Oxygen is subsequently removed from the metal-containing material by an anneal in an atmosphere containing a reducing agent. Advantageously, the silicon oxide formed by the silicon oxidation is maintained while oxygen is removed from the metal-containing material, thereby leaving a high quality metal-containing material along with silicon oxide.
摘要:
A reactor for heat treatment of a substrate having a process chamber within a substrate enclosing structure, and a support structure configured to position a substrate at a predetermined spacing between the upper part and the bottom part within the process chamber during processing. Streams of gas may lift the substrate from the support structure so that the substrate floats. A plurality of heating elements is associated with at least one of the upper part and the bottom part and are arranged to define heating zones. A controller controls the heating elements individually so that each heating zone is configured to have a predetermined temperature determined by the controller. The heating zones provide for a non-uniform heating laterally across the substrate.
摘要:
Method and structures are provided for conformal lining of dual damascene structures in integrated circuits. Trenches and contact vias are formed in insulating layers. The trenches and vias are exposed to alternating chemistries to form monolayers of a desired lining material. Exemplary process flows include alternately pulsed metal halide and ammonia gases injected into a constant carrier flow. Self-terminated metal layers are thus reacted with nitrogen. Near perfect step coverage allows minimal thickness for a diffusion barrier function, thereby maximizing the volume of a subsequent filling metal for any given trench and via dimensions.
摘要:
Highly thermally stable metal silicides and methods utilizing the metal silicides in semiconductor processing are provided. The metal silicides are preferably nickel silicides formed by the reaction of nickel with substitutionally carbon-doped single crystalline silicon which has about 2 atomic % or more substitutional carbon. Unexpectedly, the metal silicides are stable to temperatures of about 900° C. and higher and their sheet resistances are substantially unaffected by exposure to high temperatures. The metal silicides are compatible with subsequent high temperature processing steps, including reflow anneals of BPSG.
摘要:
Method and structures are provided for conformal lining of dual damascene structures in integrated circuits. Trenches and contact vias are formed in insulating layers. The trenches and vias are exposed to alternating chemistries to form monolayers of a desired lining material. Exemplary process flows include alternately pulsed metal halide and ammonia gases injected into a constant carrier flow. Self-terminated metal layers are thus reacted with nitrogen. Near perfect step coverage allows minimal thickness for a diffusion barrier function, thereby maximizing the volume of a subsequent filling metal for any given trench and via dimensions.
摘要:
Atomic layer deposition apparatus for depositing a film in a continuous fashion. The apparatus includes a process tunnel, extending in a transport direction and bounded by at least a first and a second wall. The walls are mutually parallel and allow a flat substrate to be accommodated there between. The apparatus further includes a transport system for moving a train of substrates or a continuous substrate in tape form, through the tunnel. At least the first wall of the process tunnel is provided with a plurality of gas injection channels that, viewed in the transport direction, are connected successively to a first precursor gas source, a purge gas source, a second precursor gas source and a purge gas source respectively, so as to create a tunnel segment that—in use—comprises successive zones containing a first precursor gas, a purge gas, a second precursor gas and a purge gas, respectively.
摘要:
Inserts are used to line openings in parts that form a semiconductor processing reactor. In some embodiments, the reactor parts delimit a reaction chamber. The reactor parts may be formed of graphite. A layer of silicon carbide is deposited on surfaces of the openings in the reactor parts and the inserts are placed in the openings. The inserts are provided with a hole, which can accept another reactor part such as a thermocouple. The insert protects the walls of the opening from abrasion caused by insertion of the other reactor part into the opening.
摘要:
Atomic layer deposition apparatus for depositing a film in a continuous fashion. The apparatus includes a process tunnel, extending in a transport direction and bounded by at least a first and a second wall. The walls are mutually parallel and allow a flat substrate to be accommodated there between. The apparatus further includes a transport system for moving a train of substrates or a continuous substrate in tape form, through the tunnel. At least the first wall of the process tunnel is provided with a plurality of gas injection channels that, viewed in the transport direction, are connected successively to a first precursor gas source, a purgegas source, a second precursor gas source and a purge gas source respectively, so as to create a tunnel segment that—in use—comprises successive zones containing a first precursor gas, a purge gas, a second precursor gas and a purge gas, respectively.
摘要:
Method and structures are provided for conformal capacitor dielectrics over textured silicon electrodes for integrated memory cells. Capacitor structures and first electrodes or plates are formed above or within semiconductor substrates. The first electrodes include hemispherical grain (HSG) silicon for increasing the capacitor plate surface area. The HSG topography is then exposed to alternating chemistries to form monolayers of a desired dielectric material. Exemplary process flows include alternately pulsed metal organic and oxygen source gases injected into a constant carrier flow. Self-terminated metal layers are thus reacted with oxygen. Near perfect step coverage allows minimal thickness for a capacitor dielectric, given leakage concerns for particular materials, thereby maximizing the capacitance for the memory cell and increasing cell reliability for a given memory cell design. Alternately pulsed chemistries are also provided for depositing top electrode materials with continuous coverage of capacitor dielectric, realizing the full capacitance benefits of the underlying textured morphology.