公开(公告)号：US20070163120A1

公开(公告)日：2007-07-19

申请号：US11693431

申请日：2007-03-29

申请人： Kazutaka OKAMOTO ,  Masayuki DOI ,  Hisanori OKAMURA ,  Yasuhisa AONO ,  Manabu KAGAWA ,  Satoshi HIRANO ,  Kinya AOTA

发明人： Kazutaka OKAMOTO ,  Masayuki DOI ,  Hisanori OKAMURA ,  Yasuhisa AONO ,  Manabu KAGAWA ,  Satoshi HIRANO ,  Kinya AOTA

IPC分类号： B23P15/26

CPC分类号： B23K20/1235 ,  B23K20/122 ,  B23P15/26 ,  C23C14/3407 ,  F28F3/12 ,  H01J37/34 ,  H01J37/3497 ,  Y10T29/4935 ,  Y10T29/49353 ,  Y10T29/49391 ,  Y10T29/49393

摘要： The present invention is a cooling plate including a groove, which becomes a passage of a coolant, inside a body, wherein one or more fins are provided inside the groove, wherein the groove is covered with a lid having width larger than the groove, wherein the lid is joined to the body by friction stir welding, and wherein a weld bead formed by: the joining is outside the passage, and the weld bead formed by the joining is formed within the body and further, is characterized by a manufacturing method of a cooling plate that has a first groove, which becomes a passage of a coolant, and a second groove, which has width larger than the first groove and receives a lid on the first groove, inside a body, receives the lid on the second groove, and is joined to the body, the manufacturing method of a cooling plate wherein, while the lid and the body are joined together by the friction stir welding owing to insertion of a-rotation tool having a shoulder and a pin, the joining is performed so that a weld bead formed by the joining may become out of the passage, and furthermore, is characterized in that a target for sputtering is joined to the cooling plate.

摘要翻译： 本发明是一种冷却板，其包括在主体内形成冷却剂通道的槽，其中在槽内设置一个或多个散热片，其中，所述槽被宽度大于所述槽的盖覆盖，其中 通过摩擦搅拌焊接将盖接合到主体，并且其中通过以下方式形成的焊道：通过接合在通道外部，并且通过接合形成的焊道在主体内形成，并且其特征还在于， 具有成为冷却剂通道的第一槽的冷却板和在第一槽内具有宽度大于第一槽并且在第一槽上容纳盖的第二槽，在第二槽中容纳盖 并且连接到主体，冷却板的制造方法，其中，通过由于具有肩部和销的旋转工具的插入而通过摩擦搅拌焊接将盖和主体接合在一起时，进行接合 所以t 通过接合形成的焊道可能会脱离通道，此外，其特征在于，溅射靶与冷却板接合。

公开(公告)号：US20090152328A1

公开(公告)日：2009-06-18

申请号：US12389602

申请日：2009-02-20

申请人： Kazutaka OKAMOTO ,  Seung Hwan PARK ,  Satoshi HIRANO

发明人： Kazutaka OKAMOTO ,  Seung Hwan PARK ,  Satoshi HIRANO

IPC分类号： B23K20/12

CPC分类号： B23K20/126 ,  B23K20/128 ,  B23K20/14 ,  B23K2101/003 ,  B23K2103/10

摘要： An apparatus for a friction stir and a friction stir processing of the present invention suppress an occurrence of a surface defect in an area processed by the friction stir. The apparatus for the friction stir includes a tool having a columnar tip-side part, a rotating unit for rotating the tool on a central axis, a first pressing unit for pressing a tip of the tool rotated by the rotating unit against a work, a jig having a tool insertion hole into which the tip-side part of the tool is inserted so that the tip-side part of the tool is encircled around the jig, a second pressing unit for slidably pressing the jig against the work, and a press control unit for controlling the first pressing unit so that the tip-side part of the tool is gradually pulled out of the work by the first pressing unit while moving the tool and the jig relative to the work, in a state that the tool is rotated by the rotating unit and the tip of the tool has been sunk into the work to a predetermined depth by the first pressing unit.

摘要翻译： 本发明的摩擦搅拌装置和摩擦搅拌处理抑制了摩擦搅拌加工区域的表面缺陷的发生。 用于摩擦搅拌的装置包括具有柱状末端侧部分的工具，用于在中心轴线上旋转工具的旋转单元，用于将由旋转单元旋转的工具的尖端压靠在工件上的第一按压单元， 夹具具有工具插入孔，工具的前端部分插入该工具插入孔中，使得工具的末端侧部分围绕夹具环绕;第二按压单元，用于可滑动地将夹具压靠在工件上;压力机 控制单元，用于控制第一按压单元，使得在工具旋转的状态下，通过第一按压单元在工具和夹具相对于工件移动的同时使工具的尖端侧部分逐渐拉出工件 通过旋转单元，工具的尖端已经通过第一按压单元沉入工作到预定深度。

公开(公告)号：US20130253810A1

公开(公告)日：2013-09-26

申请号：US13789044

申请日：2013-03-07

申请人： Takayuki MIYAJIMA ,  Satoshi HIRANO ,  Kiyokazu OKADA

发明人： Takayuki MIYAJIMA ,  Satoshi HIRANO ,  Kiyokazu OKADA

IPC分类号： G08G1/00

CPC分类号： G08G1/00 ,  G08G1/0112 ,  G08G1/0133

摘要： Devices, methods, and programs determine whether a vehicle has exited a link based on map information. If so, the devices, methods, and programs acquire a travel traffic congestion level of the exited link based on travel information within the exited link, and determine whether the travel traffic congestion level of the exited link coincides with a distributed traffic congestion level at a time when the vehicle exited. If not, the devices, methods, and programs determine whether the traffic information has been updated and the distributed traffic congestion level has been changed within the exited link, and if so, acquire a distribution time rate of each distributed traffic congestion level within the exited link. The devices, methods, and programs determine a traffic congestion level of the exited link based on the distribution time rate of each acquired distributed traffic congestion level and the travel traffic congestion level of the exited link.

摘要翻译： 设备，方法和程序确定车辆是否已经基于地图信息退出链接。 如果是这样，设备，方法和程序基于退出的链路中的旅行信息获取退出的链路的旅行交通拥堵级别，并且确定退出链路的旅行业务拥塞级别是否与 车辆退出时间。 如果不是，设备，方法和程序确定流量信息是否已经被更新，并且分配的流量拥塞水平已经在退出的链路内被改变，并且如果是，则获取退出的每个分布的流量拥塞级别的分配时间速率 链接。 设备，方法和程序基于每个获取的分布式业务拥塞级别的分布时间速率和退出链路的旅行业务拥塞级别来确定退出链路的业务拥塞级别。

公开(公告)号：US20110232951A1

公开(公告)日：2011-09-29

申请号：US13070094

申请日：2011-03-23

申请人： Shinnosuke MAEDA ,  Tatsuya ITO ,  Satoshi HIRANO

发明人： Shinnosuke MAEDA ,  Tatsuya ITO ,  Satoshi HIRANO

IPC分类号： H05K1/09

CPC分类号： H05K3/244 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49866 ,  H01L2924/0002 ,  H05K1/113 ,  H05K3/205 ,  H05K3/4682 ,  H05K2201/099 ,  H05K2203/0361 ,  H01L2924/00

摘要： In a wiring laminate portion of a multilayer wiring substrate, a solder resist layer having a plurality of openings is disposed on a main surface side of the laminate structure, and connection terminals are embedded in an outermost resin insulation layer in contact with the solder resist layer. Each of the connection terminals comprises a copper layer and a metallic layer formed of at least one type of metal other than copper. A main-surface-side circumferential portion of the copper layer is covered by the solder resist layer. At least a portion of the metallic layer is located in a recess in a main-surface-side central portion of the copper layer. At least a portion of the metallic layer is exposed via a corresponding opening.

摘要翻译： 在多层布线基板的布线层叠部分中，具有多个开口的阻焊层设置在层叠结构的主表面侧，并且连接端子嵌入在与阻焊层接触的最外层树脂绝缘层中 。 每个连接端子包括铜层和由铜以外的至少一种类型的金属形成的金属层。 铜层的主表面侧圆周部分被阻焊层覆盖。 金属层的至少一部分位于铜层的主表面侧中央部的凹部中。 金属层的至少一部分经由相应的开口露出。

公开(公告)号：US20110209910A1

公开(公告)日：2011-09-01

申请号：US13034792

申请日：2011-02-25

申请人： Shinnosuke MAEDA ,  Satoshi HIRANO

发明人： Shinnosuke MAEDA ,  Satoshi HIRANO

IPC分类号： H05K1/11 ,  H01R9/00

CPC分类号： H05K3/4682 ,  H05K1/112 ,  H05K3/205 ,  H05K2201/094 ,  H05K2201/09472 ,  H05K2201/099 ,  Y10T29/49147

摘要： A multilayered wiring board having a stack structure multilayered by alternately stacking a plurality of conductor layers and a plurality of resin insulation layers, wherein a solder resist is provided on at least one of a first main surface side and a second main surface side of the stack structure, a plurality of openings are formed in an outermost resin insulation layer that contacts with the solder resist, a plurality of the first main surface side connecting terminals or a plurality of the second main surface side connecting terminals being made of a copper layer as a main component and positioned in a plurality of the openings, terminal outer surfaces being positioned inwardly from an outer surface of the outermost resin insulation layer, and the solder resist extends into the plurality of openings and makes contact with an outer circumference portion of each of the terminal outer surfaces.

摘要翻译： 一种多层布线基板，其具有通过交替堆叠多个导体层和多个树脂绝缘层而叠层的叠层结构，其中在所述堆叠的第一主表面侧和第二主表面侧中的至少一个上设置阻焊剂 结构中，在与阻焊剂接触的最外层树脂绝缘层中形成多个开口，多个第一主表面侧连接端子或多个第二主表面侧连接端子由铜层制成， 主要部件并且定位在多个开口中，端子外表面从最外层树脂绝缘层的外表面向内定位，并且阻焊剂延伸到多个开口中并与每个的外周部分接触 端子外表面。

公开(公告)号：US20110200788A1

公开(公告)日：2011-08-18

申请号：US13028588

申请日：2011-02-16

申请人： Shinnosuke MAEDA ,  Tetsuo SUZUKI ,  Satoshi HIRANO

发明人： Shinnosuke MAEDA ,  Tetsuo SUZUKI ,  Satoshi HIRANO

IPC分类号： B32B3/24 ,  H05K3/06

CPC分类号： H05K3/4682 ,  H05K1/112 ,  H05K3/205 ,  H05K2201/094 ,  H05K2201/09472 ,  H05K2201/099 ,  Y10T428/24331 ,  Y10T428/24339

摘要： A plurality of openings are formed in a resin insulation layer on a bottom surface side of a wiring laminate portion which constitutes a multilayer wiring substrate. A plurality of motherboard connection terminals are disposed to correspond to the openings. The motherboard connection terminals are primarily comprised of a copper layer, and peripheral portions of terminal outer surfaces thereof are covered by the outermost resin insulation layer. A dissimilar metal layer made of at least one metal which is lower in etching rate than copper is formed between an inner main surface of the outermost resin insulation layer and peripheral portions of the terminal outer surfaces.

摘要翻译： 在构成多层布线基板的布线层叠体的底面侧的树脂绝缘层上形成有多个开口部。 多个主板连接端子被设置成对应于这些开口。 母板连接端子主要由铜层构成，其端子外表面的周边部分被最外层树脂绝缘层覆盖。 在最外层树脂绝缘层的内主表面和端子外表面的周边部分之间形成由蚀刻速率低于铜的至少一种金属制成的异种金属层。

公开(公告)号：US20110156272A1

公开(公告)日：2011-06-30

申请号：US12976427

申请日：2010-12-22

申请人： Shinnosuke MAEDA ,  Tetsuo SUZUKI ,  Atsuhiko SUGIMOTO ,  Tatsuya ITO ,  Takuya HANDO ,  Satoshi HIRANO

发明人： Shinnosuke MAEDA ,  Tetsuo SUZUKI ,  Atsuhiko SUGIMOTO ,  Tatsuya ITO ,  Takuya HANDO ,  Satoshi HIRANO

IPC分类号： H01L23/48

CPC分类号： H05K3/3452 ,  H01L23/49811 ,  H01L23/49822 ,  H01L2924/0002 ,  H05K1/113 ,  H05K3/205 ,  H05K3/383 ,  H05K3/4682 ,  H05K2201/068 ,  H05K2201/094 ,  H05K2201/09527 ,  H05K2201/099 ,  H05K2203/0346 ,  H05K2203/0369 ,  H01L2924/00

摘要： A multilayered wiring substrate, comprising: a plurality of first main surface side connecting terminals arranged in a first main surface of a stack structure; and a plurality of second main surface side connecting terminals being arranged in a second main surface of the stack structure; wherein a plurality of conductor layers are alternately formed in a plurality of stacked resin insulation layers and are operably connected to each other through via conductors tapered such that diameters thereof are widened toward the first or the second main surface, wherein a plurality of openings are formed in an exposed outermost resin insulation layer in the second main surface, and terminal outer surfaces of the second main surface side connecting terminals arranged to match with the plurality of the openings are positioned inwardly from an outer main surface of the exposed outermost resin insulation layer, and edges of terminal inner surfaces are rounded.

摘要翻译： 一种多层布线基板，包括：布置在堆叠结构的第一主表面中的多个第一主表面侧连接端子; 并且多个第二主表面侧连接端子布置在所述堆叠结构的第二主表面中; 其中多个导体层交替地形成在多个堆叠的树脂绝缘层中，并且通过锥形的通孔导体可操作地连接，使得其直径朝向第一或第二主表面加宽，其中形成多个开口 在第二主表面中暴露的最外层树脂绝缘层中，并且布置成与多个开口相匹配的第二主表面侧连接端子的端子外表面从暴露的最外层树脂绝缘层的外主表面位于内侧， 并且端子内表面的边缘是圆形的。

公开(公告)号：US20120312590A1

公开(公告)日：2012-12-13

申请号：US13490850

申请日：2012-06-07

申请人： Shinnosuke MAEDA ,  Hajime SAIKI ,  Satoshi HIRANO

发明人： Shinnosuke MAEDA ,  Hajime SAIKI ,  Satoshi HIRANO

IPC分类号： H05K1/11 ,  H05K3/10

CPC分类号： H05K3/4007 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/544 ,  H01L2221/68331 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2223/54406 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/16225 ,  H01L2924/19105 ,  H05K1/0269 ,  H05K1/113 ,  H05K3/4602 ,  H05K3/4682 ,  H05K2201/09781 ,  H05K2203/072 ,  H05K2203/1105 ,  Y10T29/49155

摘要： Disclosed is a method of manufacturing a multilayer wiring substrate having a principal plane of the substrate and a rear plane thereof, having a structure such that a plurality of resin insulating layers and a plurality of conductor layers are laminated, and a plurality of chip component connecting terminals to which chip components are connectable are disposed on the principal plane of the substrate. This method has a feature including a plating layer forming process in which product plating layers which provide the plurality of chip component connecting terminals and a dummy plating layer on the surrounding of the product plating layers are formed on the surface of an exposed outermost resin insulating layer at the principal plane of the substrate. This method permits a thickness dispersion of the chip component connecting terminals to be suppressed and permits a connection reliability thereof to the chip components to be increased.

摘要翻译： 公开了一种多层布线基板的制造方法，该多层布线基板具有基板的主面及其背面，具有层叠多个树脂绝缘层和多个导体层的结构，并且多个芯片部件连接 芯片部件可连接的端子设置在基板的主平面上。 该方法具有包括镀层形成工艺的特征，其中在露出的最外层树脂绝缘层的表面上形成了在产品镀层周围形成有多个芯片部件连接端子和虚拟镀层的产品镀层 在基板的主平面上。 该方法能够抑制芯片部件连接端子的厚度分散，并且能够提高芯片部件的连接可靠性。

公开(公告)号：US20120018194A1

公开(公告)日：2012-01-26

申请号：US13184661

申请日：2011-07-18

申请人： Shinnosuke MAEDA ,  Satoshi HIRANO ,  Yuuki SHIIBA

发明人： Shinnosuke MAEDA ,  Satoshi HIRANO ,  Yuuki SHIIBA

IPC分类号： H05K1/02 ,  H05K3/10

CPC分类号： H05K3/0035 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/1461 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/0373 ,  H05K3/4644 ,  H05K2201/0209 ,  H05K2201/09827 ,  Y10T29/49165 ,  H01L2924/00

摘要： Disclosed is a manufacturing method of a multilayer wiring board. The multilayer wiring board includes an outer resin insulation layer made of an insulating resin material, containing a filler of inorganic filler and having an outer surface defining a chip mounting area to which an electronic chip is mounted with an underfill material filled in between the outer resin insulation layer and the electronic chip and holes through which conductor parts are exposed. The manufacturing method includes a hole forming step of forming the holes in the outer resin insulation layer by laser processing, a desmear treatment step of, after the hole forming step, removing smears from inside the holes of the outer resin insulation layer, and a filler reducing step of, after the desmear treatment step, reducing the amount of the filler exposed at the outer surface of the outer resin insulation layer.

摘要翻译： 公开了一种多层布线板的制造方法。 多层布线基板包括由绝缘树脂材料制成的外部树脂绝缘层，其包含无机填料的填料并且具有限定芯片安装区域的外表面，电子芯片安装在该芯片安装区域，底部填充材料填充在外部树脂 绝缘层以及导体部件露出的电子芯片和孔。 该制造方法包括：通过激光加工在外树脂绝缘层中形成孔的孔形成步骤，在孔形成步骤之后的去污处理步骤，从外树脂绝缘层的孔内部除去污迹，以及填料 在去污处理步骤之后，减少在外树脂绝缘层的外表面暴露的填料的量。

公开(公告)号：US20110155443A1

公开(公告)日：2011-06-30

申请号：US12979474

申请日：2010-12-28

申请人： Shinnosuke MAEDA ,  Tetsuo SUZUKI ,  Takuya HANDO ,  Tatsuya ITO ,  Satoshi HIRANO ,  Atsuhiko SUGIMOTO

发明人： Shinnosuke MAEDA ,  Tetsuo SUZUKI ,  Takuya HANDO ,  Tatsuya ITO ,  Satoshi HIRANO ,  Atsuhiko SUGIMOTO

IPC分类号： H05K1/11 ,  H05K3/10

CPC分类号： H05K1/0298 ,  H01L21/4846 ,  H01L23/49822 ,  H01L2224/16225 ,  H05K1/09 ,  H05K1/111 ,  H05K1/113 ,  H05K3/0055 ,  H05K3/3452 ,  H05K3/4682 ,  H05K2201/068 ,  H05K2201/094 ,  H05K2201/0989 ,  H05K2201/099

摘要： In a build-up step, a plurality of resin insulation layers and a plurality of conductive layers are alternately laminated in multilayer arrangement on a metal foil separably laminated on a side of a base material, thereby forming a wiring laminate portion. In a drilling step, a plurality of openings are formed in an outermost resin insulation layer through laser drilling so as to expose connection terminals. Subsequently, in a desmear step, smears from inside the openings are removed. In a base-material removing step performed after the build-up step, the base material is removed and the metal foil is exposed.

摘要翻译： 在堆积步骤中，将多个树脂绝缘层和多个导电层以多层布置交替层叠在可分离地层叠在基材侧上的金属箔上，从而形成布线层压体部分。 在钻井工序中，通过激光钻孔在最外层的树脂绝缘层上形成多个开口，露出连接端子。 随后，在去污步骤中，去除开口内部的污迹。 在堆积步骤之后执行的基材除去步骤中，除去基材并暴露金属箔。