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公开(公告)号：US08294279B2
公开(公告)日：2012-10-23
申请号：US11307127
申请日：2006-01-24
申请人： Ke-Hung Chen , Shih-Hsiung Lin , Mou-Shiung Lin
发明人： Ke-Hung Chen , Shih-Hsiung Lin , Mou-Shiung Lin
CPC分类号： H01L25/0657 , H01L21/563 , H01L21/568 , H01L23/3128 , H01L23/49575 , H01L24/16 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/05026 , H01L2224/05027 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05184 , H01L2224/05568 , H01L2224/0557 , H01L2224/05571 , H01L2224/05572 , H01L2224/05573 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05684 , H01L2224/13099 , H01L2224/16145 , H01L2224/16225 , H01L2224/26145 , H01L2224/26175 , H01L2224/27013 , H01L2224/29109 , H01L2224/29111 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/81193 , H01L2224/83051 , H01L2224/83365 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06555 , H01L2225/06582 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/0134 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/09701 , H01L2924/15151 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/01007 , H01L2924/01083 , H01L2924/00012 , H01L2224/29099
摘要： A method of assembling chips. A first chip and a second chip are provided. At least one conductive pillar is formed on the first chip, and a conductive connecting material is formed on the conductive pillar. The second chip also comprises at least one conductive pillar. The first chip is connected to the second chip via the conductive pillars and the conductive connecting material.
摘要翻译： 一种组装芯片的方法。 提供第一芯片和第二芯片。 在第一芯片上形成至少一个导电柱，并且在导电柱上形成导电连接材料。 第二芯片还包括至少一个导电柱。 第一芯片经由导电柱和导电连接材料连接到第二芯片。
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公开(公告)号：US20060220259A1
公开(公告)日：2006-10-05
申请号：US11307127
申请日：2006-01-24
申请人： Ke-Hung Chen , Shih-Hsiung Lin , Mou-Shiung Lin
发明人： Ke-Hung Chen , Shih-Hsiung Lin , Mou-Shiung Lin
IPC分类号： H01L23/48
CPC分类号： H01L25/0657 , H01L21/563 , H01L21/568 , H01L23/3128 , H01L23/49575 , H01L24/16 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/05026 , H01L2224/05027 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05184 , H01L2224/05568 , H01L2224/0557 , H01L2224/05571 , H01L2224/05572 , H01L2224/05573 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05684 , H01L2224/13099 , H01L2224/16145 , H01L2224/16225 , H01L2224/26145 , H01L2224/26175 , H01L2224/27013 , H01L2224/29109 , H01L2224/29111 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/81193 , H01L2224/83051 , H01L2224/83365 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06555 , H01L2225/06582 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/0134 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/09701 , H01L2924/15151 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/01007 , H01L2924/01083 , H01L2924/00012 , H01L2224/29099
摘要： A method of assembling chips. A first chip and a second chip are provided. At least one conductive pillar is formed on the first chip, and a conductive connecting material is formed on the conductive pillar. The second chip also comprises at least one conductive pillar. The first chip is connected to the second chip via the conductive pillars and the conductive connecting material.
摘要翻译： 一种组装芯片的方法。 提供第一芯片和第二芯片。 在第一芯片上形成至少一个导电柱，并且在导电柱上形成导电连接材料。 第二芯片还包括至少一个导电柱。 第一芯片经由导电柱和导电连接材料连接到第二芯片。
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公开(公告)号：US20080241992A1
公开(公告)日：2008-10-02
申请号：US12109367
申请日：2008-04-25
申请人： Mou-Shiung Lin , Shih-Hsiung Lin
发明人： Mou-Shiung Lin , Shih-Hsiung Lin
CPC分类号： H01L24/12 , H01L24/11 , H01L24/16 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05572 , H01L2224/05599 , H01L2224/11462 , H01L2224/1147 , H01L2224/11822 , H01L2224/1308 , H01L2224/13082 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13118 , H01L2224/1312 , H01L2224/13123 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/1357 , H01L2224/13609 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48463 , H01L2224/73204 , H01L2224/73265 , H01L2224/81011 , H01L2224/92247 , H01L2225/06513 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/09701 , H01L2924/15151 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2224/29099 , H01L2224/05552 , H01L2224/45099
摘要： A method of assembling chips. A first chip and a second chip are provided. At least one conductive pillar is formed on the first chip, and a conductive connecting material is formed on the conductive pillar. The second chip also comprises at least one conductive pillar. The first chip is connected to the second chip via the conductive pillars and the conductive connecting material.
摘要翻译： 一种组装芯片的方法。 提供第一芯片和第二芯片。 在第一芯片上形成至少一个导电柱，并且在导电柱上形成导电连接材料。 第二芯片还包括至少一个导电柱。 第一芯片经由导电柱和导电连接材料连接到第二芯片。
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公开(公告)号：US20080211105A1
公开(公告)日：2008-09-04
申请号：US12121778
申请日：2008-05-15
申请人： Shih-Hsiung Lin , Mou-Shiung Lin
发明人： Shih-Hsiung Lin , Mou-Shiung Lin
IPC分类号： H01L23/52
CPC分类号： H01L24/12 , H01L24/11 , H01L24/16 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05572 , H01L2224/05599 , H01L2224/11462 , H01L2224/1147 , H01L2224/11822 , H01L2224/1308 , H01L2224/13082 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13118 , H01L2224/1312 , H01L2224/13123 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/1357 , H01L2224/13609 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48463 , H01L2224/73204 , H01L2224/73265 , H01L2224/81011 , H01L2224/92247 , H01L2225/06513 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/09701 , H01L2924/15151 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2224/29099 , H01L2224/05552 , H01L2224/45099
摘要： A method of assembling chips. A first chip and a second chip are provided. At least one conductive pillar is formed on the first chip, and a conductive connecting material is formed on the conductive pillar. The second chip also comprises at least one conductive pillar. The first chip is connected to the second chip via the conductive pillars and the conductive connecting material.
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公开(公告)号：US08368193B2
公开(公告)日：2013-02-05
申请号：US13236507
申请日：2011-09-19
申请人： Mou-Shiung Lin , Shih-Hsiung Lin , Hsin-Jung Lo
发明人： Mou-Shiung Lin , Shih-Hsiung Lin , Hsin-Jung Lo
IPC分类号： H01L23/02
CPC分类号： H01L31/0203 , H01L27/14618 , H01L27/14683 , H01L27/14687 , H01L31/18 , H01L2224/48091 , H01L2924/00014
摘要： A chip package includes a bump connecting said semiconductor chip and said circuitry component, wherein the semiconductor chip has a photosensitive area used to sense light. The chip package may include a ring-shaped protrusion connecting a transparent substrate and the semiconductor chip.
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公开(公告)号：US08021921B2
公开(公告)日：2011-09-20
申请号：US12128644
申请日：2008-05-29
申请人： Shih-Hsiung Lin , Mou-Shiung Lin
发明人： Shih-Hsiung Lin , Mou-Shiung Lin
CPC分类号： H01L24/12 , H01L24/11 , H01L24/16 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05572 , H01L2224/05599 , H01L2224/11462 , H01L2224/1147 , H01L2224/11822 , H01L2224/1308 , H01L2224/13082 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13118 , H01L2224/1312 , H01L2224/13123 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/1357 , H01L2224/13609 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48463 , H01L2224/73204 , H01L2224/73265 , H01L2224/81011 , H01L2224/92247 , H01L2225/06513 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/09701 , H01L2924/15151 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2224/29099 , H01L2224/05552 , H01L2224/45099
摘要： A copper pillar may be provided on a chip and a first tin-containing layer may be provided over the copper pillar. A second tin-containing layer may be provided on a substrate. The first tin-containing layer may be joined with the second tin-containing layer during a packaging process.
摘要翻译： 可以在芯片上设置铜柱，并且可以在铜柱上方设置第一含锡层。 可以在基板上设置第二含锡层。 第一含锡层可以在包装过程中与第二含锡层接合。
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公开(公告)号：US07508059B2
公开(公告)日：2009-03-24
申请号：US11416134
申请日：2006-05-03
CPC分类号： H01L25/0657 , H01L23/3128 , H01L23/525 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/06135 , H01L2224/06136 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48227 , H01L2224/4824 , H01L2224/49 , H01L2224/73215 , H01L2224/73265 , H01L2224/92147 , H01L2224/92247 , H01L2225/0651 , H01L2225/06558 , H01L2924/01079 , H01L2924/09701 , H01L2924/12044 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： A chip package comprises a first chip having a first side and a second side, wherein said first chip comprises a first pad, a first trace, a second pad and a first passivation layer at said first side thereof, an opening in said first passivation layer exposing said first pad, said first trace being over said first passivation layer, said first trace connecting said first pad to said second pad; a second chip having a first side and a second side, wherein said second chip comprises a first pad at said first side thereof, wherein said second side of said second chip is joined with said second side of side first chip; a substrate joined with said first side of said first chip or with said first side of said second chip; a first wirebonding wire connecting said second pad of said first chip and said substrate; and a second wirebonding wire connecting said first pad of said second chip and said substrate.
摘要翻译： 芯片封装包括具有第一侧和第二侧的第一芯片，其中所述第一芯片包括第一焊盘，第一焊盘，第二焊盘和在其第一侧的第一钝化层，所述第一钝化层中的开口 暴露所述第一焊盘，所述第一迹线在所述第一钝化层之上，所述第一迹线将所述第一焊盘连接到所述第二焊盘; 具有第一侧和第二侧的第二芯片，其中所述第二芯片包括在其第一侧的第一焊盘，其中所述第二芯片的所述第二侧与所述第二芯片的所述第二侧接合; 与所述第一芯片的所述第一侧或所述第二芯片的所述第一侧连接的衬底; 连接所述第一芯片的所述第二焊盘和所述衬底的第一引线接合线; 以及连接所述第二芯片的所述第一焊盘和所述衬底的第二引线键合线。
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公开(公告)号：US20050194695A1
公开(公告)日：2005-09-08
申请号：US11123328
申请日：2005-05-06
申请人： Shih-Hsiung Lin , Mou-Shiung Lin
发明人： Shih-Hsiung Lin , Mou-Shiung Lin
IPC分类号： H01L21/60 , H01L21/98 , H01L23/485 , H01L25/065 , H01L23/48 , H01L21/48
CPC分类号： H01L24/12 , H01L24/11 , H01L24/16 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05572 , H01L2224/05599 , H01L2224/11462 , H01L2224/1147 , H01L2224/11822 , H01L2224/1308 , H01L2224/13082 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13118 , H01L2224/1312 , H01L2224/13123 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/1357 , H01L2224/13609 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48463 , H01L2224/73204 , H01L2224/73265 , H01L2224/81011 , H01L2224/92247 , H01L2225/06513 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/09701 , H01L2924/15151 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2224/29099 , H01L2224/05552 , H01L2224/45099
摘要： A method of assembling chips. A first chip and a second chip are provided. At least one conductive pillar is formed on the first chip, and a conductive connecting material is formed on the conductive pillar. The second chip also comprises at least one conductive pillar. The first chip is connected to the second chip via the conductive pillars and the conductive connecting material.
摘要翻译： 一种组装芯片的方法。 提供第一芯片和第二芯片。 在第一芯片上形成至少一个导电柱，并且在导电柱上形成导电连接材料。 第二芯片还包括至少一个导电柱。 第一芯片经由导电柱和导电连接材料连接到第二芯片。
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公开(公告)号：US08044475B2
公开(公告)日：2011-10-25
申请号：US12353250
申请日：2009-01-13
申请人： Mou-Shiung Lin , Shih-Hsiung Lin , Hsin-Jung Lo
发明人： Mou-Shiung Lin , Shih-Hsiung Lin , Hsin-Jung Lo
IPC分类号： H01L29/78
CPC分类号： H01L31/0203 , H01L27/14618 , H01L27/14683 , H01L27/14687 , H01L31/18 , H01L2224/48091 , H01L2924/00014
摘要： A chip package includes a bump connecting said semiconductor chip and said circuitry component, wherein the semiconductor chip has a photosensitive area used to sense light. The chip package may include a ring-shaped protrusion connecting a transparent substrate and the semiconductor chip.
摘要翻译： 芯片封装包括连接所述半导体芯片和所述电路部件的凸块，其中所述半导体芯片具有用于感测光的感光区域。 芯片封装可以包括连接透明基板和半导体芯片的环形突起。
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公开(公告)号：US07973401B2
公开(公告)日：2011-07-05
申请号：US12269045
申请日：2008-11-12
CPC分类号： H01L25/0657 , H01L23/3128 , H01L23/525 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/06135 , H01L2224/06136 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48227 , H01L2224/4824 , H01L2224/49 , H01L2224/73215 , H01L2224/73265 , H01L2224/92147 , H01L2224/92247 , H01L2225/0651 , H01L2225/06558 , H01L2924/01079 , H01L2924/09701 , H01L2924/12044 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： A chip package comprises a first chip having a first side and a second side, wherein said first chip comprises a first pad, a first trace, a second pad and a first passivation layer at said first side thereof, an opening in said first passivation layer exposing said first pad, said first trace being over said first passivation layer, said first trace connecting said first pad to said second pad; a second chip having a first side and a second side, wherein said second chip comprises a first pad at said first side thereof, wherein said second side of said second chip is joined with said second side of side first chip; a substrate joined with said first side of said first chip or with said first side of said second chip; a first wirebonding wire connecting said second pad of said first chip and said substrate; and a second wirebonding wire connecting said first pad of said second chip and said substrate.
摘要翻译： 芯片封装包括具有第一侧和第二侧的第一芯片，其中所述第一芯片包括第一焊盘，第一焊盘，第二焊盘和在其第一侧的第一钝化层，所述第一钝化层中的开口 暴露所述第一焊盘，所述第一迹线在所述第一钝化层之上，所述第一迹线将所述第一焊盘连接到所述第二焊盘; 具有第一侧和第二侧的第二芯片，其中所述第二芯片包括在其第一侧的第一焊盘，其中所述第二芯片的所述第二侧与所述第二芯片的所述第二侧接合; 与所述第一芯片的所述第一侧或所述第二芯片的所述第一侧连接的衬底; 连接所述第一芯片的所述第二焊盘和所述衬底的第一引线接合线; 以及连接所述第二芯片的所述第一焊盘和所述衬底的第二引线键合线。
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