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    COPPER METALLIZATION UTILIZING REFLOW ON NOBLE METAL LINERS
    2.
    发明申请
    COPPER METALLIZATION UTILIZING REFLOW ON NOBLE METAL LINERS 审中-公开
    铜金属化使用金属内衬使用反射

    公开(公告)号：US20090169760A1

    公开(公告)日：2009-07-02

    申请号：US11968136

    申请日：2007-12-31

    申请人： Rohan Akolkar ,  Florian Gstrein ,  Boyan Boyanov ,  Sridhar Balakrishnan

    发明人： Rohan Akolkar ,  Florian Gstrein ,  Boyan Boyanov ,  Sridhar Balakrishnan

    IPC分类号： C23C4/06 ,  B05D5/12

    CPC分类号： C23C14/046 ,  C23C14/025 ,  C23C14/16 ,  C23C14/5806 ,  C23C14/588 ,  H01L21/76846 ,  H01L21/76882 ,  H01L23/53238

    摘要： Methods for making copper (Cu) interconnects in semiconductor devices for interconnect dimensions less than 50 nm are described. The processes form Cu interconnects using a sequence of barrier layer, liner layer, and Cu deposition layer depositions, followed by a thermally assisted Cu reflow of the Cu deposition layer, and then a chemical mechanical polish (CMP) to removed excess portions of the reflowed Cu. The liner layer comprises noble metals such as Ru, Ir, Os, Rh, Re, Pd, Pt, and Au. Such processes avoids the formation of voids in copper interconnects with dimensions less than 50 nm.

    摘要翻译： 描述了半导体器件中铜（Cu）互连的互连尺寸小于50nm的方法。 这些过程使用阻挡层，衬层和Cu沉积层沉积序列形成Cu互连，随后是Cu沉积层的热辅助铜回流，然后用化学机械抛光（CMP）去除被回流的多余部分 铜。 衬里层包括贵金属如Ru，Ir，Os，Rh，Re，Pd，Pt和Au。 这种方法避免了在尺寸小于50nm的铜互连件中形成空隙。

    Conformal electroless deposition of barrier layer materials
    3.
    发明申请
    Conformal electroless deposition of barrier layer materials 有权
    阻挡层材料的保形无电沉积

    公开(公告)号：US20070148952A1

    公开(公告)日：2007-06-28

    申请号：US11318137

    申请日：2005-12-23

    申请人： Kevin O'Brien ,  Chin-Chang Cheng ,  Ramanan Chebiam ,  Valery Dubin ,  Sridhar Balakrishnan

    发明人： Kevin O'Brien ,  Chin-Chang Cheng ,  Ramanan Chebiam ,  Valery Dubin ,  Sridhar Balakrishnan

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76843 ,  B82Y30/00 ,  H01L21/288 ,  H01L21/76874

    摘要： Methods of fabricating interconnect structures utilizing barrier material layers formed with an electroless deposition technique utilizing a coupling agent complexed with a catalytic metal and structures formed thereby. The fabrication fundamentally comprises providing a dielectric material layer having an opening extending into the dielectric material from a first surface thereof, bonding the coupling agent to the dielectric material within the opening, and electrolessly depositing the barrier material layer, wherein the electrolessly deposited barrier material layer material adheres to the catalytic metal of the coupling agent.

    摘要翻译： 使用利用与催化金属复合的偶联剂和由此形成的结构的化学沉积技术形成的阻挡材料层来制造互连结构的方法。 该制造基本上包括提供介电材料层，其具有从其第一表面延伸到电介质材料中的开口，将该耦合剂粘合到该开口内的电介质材料，以及无电沉积阻挡材料层，其中该无电沉积阻挡材料层 材料粘附到偶联剂的催化金属上。

    Etchback process for tungsten utilizing a NF3/AR chemistry
    8.
    发明授权
    Etchback process for tungsten utilizing a NF3/AR chemistry 失效
    使用NF3 / AR化学的钨的Etchback工艺

    公开(公告)号：US5164330A

    公开(公告)日：1992-11-17

    申请号：US686683

    申请日：1991-04-17

    申请人： Rickie L. Davis ,  Sohail U. Ahmed ,  Sridhar Balakrishnan

    发明人： Rickie L. Davis ,  Sohail U. Ahmed ,  Sridhar Balakrishnan

    IPC分类号： H01L21/28 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/3213 ,  H01L21/768

    CPC分类号： H01L21/32115 ,  H01L21/32136 ,  H01L21/76879

    摘要： A process for etching a tungsten layer formed on a semiconductor substrate is described. The etch is carried out in a parallel plate plasma reactor. The etchant gases include nitrogen trifluoride (NF.sub.3) and argon (Ar). The use of NF.sub.3 in a tungsten etching process reduces the build-up of polymers or sulfur residues on the electrode as occurs with processes utilizing sulfur or carbon fluorides as etchant gases. The process has a sufficiently high etch rate for volume production. The NF.sub.3 -Ar etch process can be used to etchback a blanket layer of deposited tungsten to form tungsten via plugs in contact areas of the device. In the via plug process, reduced micro-loading effect, that is, the tendency of some plugs to be etched away before the complete etching of the blanket layer, has been achieved. The etching of tunsten with NF.sub.3 -Ar process can be preformed in one or more steps in process utilizing several etching steps. Additionally, a tungsten etch incorporating one or more NF.sub.3 -Ar steps and one or more steps utilizing etchants such as SF.sub.6, Cl.sub.2, O.sub.2, CF.sub.4, CBrF.sub.3, CF.sub.3 Cl, CF.sub.2 Cl.sub.2 or similar etchants can be used to optimize etch rate and uniformity while obtaining the benefit of reduced residue build-up.

    摘要翻译： 描述了用于蚀刻形成在半导体衬底上的钨层的工艺。 蚀刻在平行平板等离子体反应器中进行。 蚀刻剂气体包括三氟化氮（NF 3）和氩（Ar）。 在钨蚀刻工艺中使用NF3可以减少聚合物或硫残余物在电极上的积聚，这与使用硫或碳氟化物作为蚀刻剂气体的方法一样。 该方法具有足够高的蚀刻速率用于批量生产。 NF3-Ar蚀刻工艺可用于回蚀沉积的钨的覆盖层，以通过在器件的接触区域中的插塞形成钨。 在通孔插入过程中，已经实现了减小的微负载效应，即，在完全蚀刻覆盖层之前一些插塞被蚀刻掉的趋势。 用NF3-Ar工艺蚀刻tunsten可以在一个或多个步骤中利用几个蚀刻步骤进行。 另外，掺入一个或多个NF 3 -Ar步骤的钨蚀刻和利用诸如SF 6，Cl 2，O 2，CF 4，CBrF 3，CF 3 Cl，CF 2 Cl 2或类似蚀刻剂之类的蚀刻剂的一个或多个步骤可用于优化蚀刻速率和均匀性，同时获得 减少残留物积聚的好处。