Circuit devices and methods having adjustable transistor body bias
    3.
    发明授权
    Circuit devices and methods having adjustable transistor body bias 有权
    具有可调节晶体管体偏置的电路器件和方法

    公开(公告)号:US08995204B2

    公开(公告)日:2015-03-31

    申请号:US13167625

    申请日:2011-06-23

    IPC分类号: G11C7/00 G11C11/412

    CPC分类号: G11C11/412

    摘要: Circuits, integrated circuits devices, and methods are disclosed that may include biasable transistors with screening regions positioned below a gate and separated from the gate by a semiconductor layer. Bias voltages can be applied to such screening regions to optimize multiple performance features, such as speed and current leakage. Particular embodiments can include biased sections coupled between a high power supply voltage and a low power supply voltage, each having biasable transistors. One or more generation circuits can generate multiple bias voltages. A bias control section can couple one of the different bias voltages to screening regions of biasable transistors to provide a minimum speed and lowest current leakage for such a minimum speed.

    摘要翻译: 公开了电路,集成电路器件和方法,其可以包括具有位于栅极下方的屏蔽区域并通过半导体层与栅极分离的可偏置晶体管。 偏置电压可以应用于这样的屏蔽区域以优化多个性能特征,例如速度和电流泄漏。 特定实施例可以包括耦合在高电源电压和低电源电压之间的偏置部分,每个具有可偏置晶体管。 一个或多个发电电路可以产生多个偏置电压。 偏置控制部分可以将不同偏置电压之一耦合到可偏置晶体管的屏蔽区域,以提供用于这种最小速度的最小速度和最小电流泄漏。

    CIRCUIT DEVICES AND METHODS HAVING ADJUSTABLE TRANSISTOR BODY BIAS
    8.
    发明申请
    CIRCUIT DEVICES AND METHODS HAVING ADJUSTABLE TRANSISTOR BODY BIAS 有权
    具有可调节晶体管体偏置的电路装置和方法

    公开(公告)号:US20120327725A1

    公开(公告)日:2012-12-27

    申请号:US13167625

    申请日:2011-06-23

    IPC分类号: G11C7/00 G05F1/10

    CPC分类号: G11C11/412

    摘要: Circuits, integrated circuits devices, and methods are disclosed that may include biasable transistors with screening regions positioned below a gate and separated from the gate by a semiconductor layer. Bias voltages can be applied to such screening regions to optimize multiple performance features, such as speed and current leakage. Particular embodiments can include biased sections coupled between a high power supply voltage and a low power supply voltage, each having biasable transistors. One or more generation circuits can generate multiple bias voltages. A bias control section can couple one of the different bias voltages to screening regions of biasable transistors to provide a minimum speed and lowest current leakage for such a minimum speed.

    摘要翻译: 公开了电路,集成电路器件和方法,其可以包括具有位于栅极下方的屏蔽区域并通过半导体层与栅极分离的可偏置晶体管。 偏置电压可以应用于这样的屏蔽区域以优化多个性能特征,例如速度和电流泄漏。 特定实施例可以包括耦合在高电源电压和低电源电压之间的偏置部分,每个具有可偏置晶体管。 一个或多个发电电路可以产生多个偏置电压。 偏置控制部分可以将不同偏置电压之一耦合到可偏置晶体管的屏蔽区域,以提供用于这种最小速度的最小速度和最小电流泄漏。