公开(公告)号：US09671141B2

公开(公告)日：2017-06-06

申请号：US14961167

申请日：2015-12-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Choon Kim ,  Jichul Kim ,  Jin-Kwon Bae ,  Eunseok Cho

IPC: F25B21/00 ,  F25B21/02 ,  H01L35/32

CPC classification number: F25B21/02 ,  F25B2321/0212 ,  F25B2700/2107 ,  H01L35/32 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/12044 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A device includes a first board having a first area and a second area not overlapping the first area; and a thermoelectric semiconductor disposed between the first board and the second board at the first area of the first board configured to supply a voltage to the thermoelectric semiconductor; a package disposed at the second area of the first board.

公开(公告)号：US11798862B2

公开(公告)日：2023-10-24

申请号：US17354291

申请日：2021-06-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eunseok Cho ,  Minjeong Gu ,  Joonsung Kim ,  Jaehoon Choi

IPC: H01L23/367 ,  H01L23/498 ,  H01L23/552 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L25/18 ,  H01L25/065 ,  H01L23/31

CPC classification number: H01L23/3675 ,  H01L21/486 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/4871 ,  H01L21/563 ,  H01L23/3185 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/552 ,  H01L24/16 ,  H01L25/0655 ,  H01L25/18 ,  H01L2224/16227 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1616 ,  H01L2924/18161 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/30111

Abstract: A semiconductor package includes a base substrate including a wiring pattern, an interposer substrate including lower and upper redistribution patterns, a semiconductor structure, a heat dissipation structure, a plurality of external connection bumps disposed on a lower surface of the base substrate, a plurality of lower connection bumps disposed between the base substrate and the interposer substrate, and a plurality of upper connection bumps disposed between the interposer substrate and the semiconductor structure.

公开(公告)号：US09252031B2

公开(公告)日：2016-02-02

申请号：US14493379

申请日：2014-09-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hohyeuk Im ,  Jongkook Kim ,  Gowoon Seong ,  SeokWon Lee ,  Byoungwook Jang ,  Eunseok Cho

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/367 ,  H01L23/498 ,  H01L23/538 ,  H01L25/10 ,  H01L25/00 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L21/563 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/46 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/11312 ,  H01L2224/1132 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/83191 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1438 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/05599

Abstract: Provided is a semiconductor package including a lower package, an interposer on the lower package, and an upper package on the interposer. The lower package may include a lower package substrate, a lower semiconductor chip on the lower package substrate, and a lower heat-transfer layer on the lower semiconductor chip. The interposer may include an interposer substrate, first and second heat-transfer openings defined by recessed bottom and top surfaces, respectively, of the interposer substrate, an upper interposer heat-transfer pad disposed in the second heat-transfer opening, and an upper heat-transfer layer disposed on the upper interposer heat-transfer pad. The upper package may include an upper package substrate, an upper package heat-transfer pad, which may be disposed in a third heat-transfer opening defined by a recessed bottom surface of the upper package substrate, and an upper semiconductor chip disposed on the upper package substrate.

Abstract translation: 提供了一种半导体封装，其包括下封装，下封装上的插入件和插入件上的上封装。 下封装可以包括下封装衬底，下封装衬底上的下半导体芯片和下半导体芯片上的下传热层。 插入器可以包括插入器基板，分别由插入器基板的凹入的底部和顶部表面限定的第一和第二传热开口，设置在第二传热开口中的上插入件传热垫，以及上部热 - 转移层，设置在上部插入件传热垫上。 上封装可以包括上封装衬底，上封装传热垫，其可以设置在由上封装衬底的凹陷底表面限定的第三传热开口中，以及设置在上封装衬底上的上半导体芯片 封装衬底。

公开(公告)号：US20240030089A1

公开(公告)日：2024-01-25

申请号：US18475926

申请日：2023-09-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eunseok Cho ,  Minjeong Gu ,  Joonsung Kim ,  Jaehoon Choi

IPC: H01L23/367 ,  H01L23/498 ,  H01L23/552 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L25/18 ,  H01L25/065 ,  H01L23/31

CPC classification number: H01L23/3675 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/552 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/4871 ,  H01L21/563 ,  H01L24/16 ,  H01L25/18 ,  H01L25/0655 ,  H01L23/3185 ,  H01L2924/3025 ,  H01L2224/16227 ,  H01L2924/1616 ,  H01L2924/18161 ,  H01L2924/19105 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/30111

Abstract: A method of manufacturing a semiconductor package is provided and includes: forming a lower redistribution structure, the lower redistribution structure including lower redistribution patterns having lower connection pads; forming an upper redistribution structure on a boundary surface of the lower redistribution structure, the upper redistribution structure including upper redistribution patterns having upper connection pads electrically connected to the lower connection pads; forming openings exposing at least a portion of each of the lower connection pads; disposing an interposer substrate, including the lower redistribution structure and the upper redistribution structure, on a base substrate, the lower connection pads of the interposer substrate electrically connected to wiring patterns of the base substrate through lower connection bumps disposed on the openings; and disposing at least one of semiconductor chips, including connection pads, on the interposer substrate, the connection pads electrically connected to the upper connection pads through upper connection bumps.

公开(公告)号：US20130321041A1

公开(公告)日：2013-12-05

申请号：US13830651

申请日：2013-03-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaechoon Kim ,  SangWook Ju ,  Eunseok Cho

IPC: H03K3/011

CPC classification number: H03K3/011 ,  G06F1/203 ,  G06F1/206 ,  G06F1/324 ,  G06F11/3058 ,  Y02D10/126

Abstract: A method for controlling a temperature of an electronic device which includes a semiconductor chip is provided. The temperature control method includes measuring a temperature of a measurement point using the electronic device, comparing the temperature of the measurement point with a target temperature varying according to a period of time when the semiconductor chip operates using the electronic device, and decreasing a clock frequency of the semiconductor chip using the electronic device when the temperature of the measurement point is higher than the target temperature.

Abstract translation: 提供了一种用于控制包括半导体芯片的电子设备的温度的方法。 温度控制方法包括使用电子装置测量测量点的温度，将测量点的温度与根据半导体芯片使用电子设备操作的时间段变化的目标温度进行比较，并且降低时钟频率 当测量点的温度高于目标温度时，使用电子器件的半导体芯片。

公开(公告)号：US10658266B2

公开(公告)日：2020-05-19

申请号：US15495324

申请日：2017-04-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Choon Kim ,  Jichul Kim ,  Jin-Kwon Bae ,  Eunseok Cho

IPC: H01L23/38 ,  F25B21/02 ,  H01L35/32 ,  H01L25/10 ,  H01L25/18 ,  H01L23/00

Abstract: A method for managing a temperature of a device includes determining a temperature of a circuit or a package including the circuit, and selectively operating a thermoelectric semiconductor based on the determined temperature to adjust the temperature of the circuit or the package.

公开(公告)号：US10198049B2

公开(公告)日：2019-02-05

申请号：US15459403

申请日：2017-03-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heungkyu Kwon ,  Jae Choon Kim ,  Eunseok Cho ,  Jichul Kim

IPC: G06F1/20 ,  G06F9/52 ,  G01K1/08 ,  G01K1/16 ,  G01J5/10 ,  G05B15/02

Abstract: A surface temperature management method of mobile device is provided. The method includes sensing a temperature of an application processor in an operation mode of the mobile device; and controlling the application processor using the sensed temperature and a surface temperature management table to manage a surface temperature of a target part of the mobile device. The surface temperature management table includes information related to the temperature of the application processor corresponding to the surface temperature of the target part in the operation mode.

公开(公告)号：US12176262B2

公开(公告)日：2024-12-24

申请号：US18475926

申请日：2023-09-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eunseok Cho ,  Minjeong Gu ,  Joonsung Kim ,  Jaehoon Choi

IPC: H01L23/367 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/552 ,  H01L25/065 ,  H01L25/18

Abstract: A method of manufacturing a semiconductor package is provided and includes: forming a lower redistribution structure, the lower redistribution structure including lower redistribution patterns having lower connection pads; forming an upper redistribution structure on a boundary surface of the lower redistribution structure, the upper redistribution structure including upper redistribution patterns having upper connection pads electrically connected to the lower connection pads; forming openings exposing at least a portion of each of the lower connection pads; disposing an interposer substrate, including the lower redistribution structure and the upper redistribution structure, on a base substrate, the lower connection pads of the interposer substrate electrically connected to wiring patterns of the base substrate through lower connection bumps disposed on the openings; and disposing at least one of semiconductor chips, including connection pads, on the interposer substrate, the connection pads electrically connected to the upper connection pads through upper connection bumps.

公开(公告)号：US08988115B2

公开(公告)日：2015-03-24

申请号：US13830651

申请日：2013-03-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaechoon Kim ,  SangWook Ju ,  Eunseok Cho

IPC: H01L35/00 ,  H03K3/011 ,  G06F1/20 ,  G06F1/32 ,  G06F11/30

CPC classification number: H03K3/011 ,  G06F1/203 ,  G06F1/206 ,  G06F1/324 ,  G06F11/3058 ,  Y02D10/126

Abstract: A method for controlling a temperature of an electronic device which includes a semiconductor chip is provided. The temperature control method includes measuring a temperature of a measurement point using the electronic device, comparing the temperature of the measurement point with a target temperature varying according to a period of time when the semiconductor chip operates using the electronic device, and decreasing a clock frequency of the semiconductor chip using the electronic device when the temperature of the measurement point is higher than the target temperature.

Abstract translation: 提供了一种用于控制包括半导体芯片的电子设备的温度的方法。 温度控制方法包括使用电子装置测量测量点的温度，将测量点的温度与根据半导体芯片使用电子设备操作的时间段变化的目标温度进行比较，并且降低时钟频率 当测量点的温度高于目标温度时，使用电子器件的半导体芯片。