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公开(公告)号:US12113055B2
公开(公告)日:2024-10-08
申请号:US16907597
申请日:2020-06-22
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yao-Chun Chuang , Yu-Chen Hsu , Hao Chun Liu , Chita Chuang , Chen-Cheng Kuo , Chen-Shien Chen
IPC: H01L23/00 , H01L21/56 , H01L23/31 , H01L25/00 , H01L25/065
CPC classification number: H01L25/50 , H01L21/563 , H01L23/3192 , H01L23/562 , H01L24/11 , H01L24/13 , H01L25/0657 , H01L24/16 , H01L2224/0401 , H01L2224/05022 , H01L2224/05572 , H01L2224/10125 , H01L2224/13022 , H01L2224/13111 , H01L2224/13147 , H01L2224/14133 , H01L2224/14135 , H01L2224/16145 , H01L2224/73204 , H01L2225/06513 , H01L2225/06527 , H01L2225/06582 , H01L2924/00014 , H01L2224/13111 , H01L2924/01047 , H01L2924/01029 , H01L2924/00012 , H01L2224/13147 , H01L2924/00014 , H01L2224/10125 , H01L2924/00012 , H01L2924/00014 , H01L2224/05552
Abstract: A method comprises depositing a protection layer over a first substrate, wherein the first substrate is part of a first semiconductor die, forming an under bump metallization structure over the protection layer, forming a connector over the under bump metallization structure, forming a first dummy plane along a first edge of a top surface of the first semiconductor die and forming a second dummy plane along a second edge of the top surface of the first semiconductor die, wherein the first dummy plane and the second dummy plane form an L-shaped region.
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公开(公告)号:US11824026B2
公开(公告)日:2023-11-21
申请号:US17113480
申请日:2020-12-07
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Shien Chen , Sheng-Yu Wu , Mirng-Ji Lii , Chita Chuang
IPC: H01L23/00
CPC classification number: H01L24/11 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/81 , H01L24/94 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03464 , H01L2224/03614 , H01L2224/03912 , H01L2224/03916 , H01L2224/0401 , H01L2224/05082 , H01L2224/05166 , H01L2224/05187 , H01L2224/05553 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05684 , H01L2224/1132 , H01L2224/1144 , H01L2224/1145 , H01L2224/1147 , H01L2224/11334 , H01L2224/11462 , H01L2224/11464 , H01L2224/11906 , H01L2224/131 , H01L2224/13007 , H01L2224/13013 , H01L2224/13021 , H01L2224/13082 , H01L2224/13109 , H01L2224/13111 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/14131 , H01L2224/16 , H01L2224/16145 , H01L2224/16227 , H01L2224/16245 , H01L2224/8183 , H01L2224/81191 , H01L2224/81805 , H01L2224/81815 , H01L2224/81825 , H01L2224/94 , H01L2224/05187 , H01L2924/04953 , H01L2224/05166 , H01L2924/00014 , H01L2224/0345 , H01L2924/00014 , H01L2224/03452 , H01L2924/00014 , H01L2224/131 , H01L2924/014 , H01L2224/13147 , H01L2924/00014 , H01L2224/13124 , H01L2924/00014 , H01L2224/13144 , H01L2924/00014 , H01L2224/13155 , H01L2924/00014 , H01L2224/13139 , H01L2924/00014 , H01L2224/13164 , H01L2924/00014 , H01L2224/13111 , H01L2924/00014 , H01L2224/13109 , H01L2924/00014 , H01L2224/1145 , H01L2924/00014 , H01L2224/11462 , H01L2924/00014 , H01L2224/1132 , H01L2924/00014 , H01L2224/11334 , H01L2924/00014 , H01L2224/1144 , H01L2924/00014 , H01L2224/11464 , H01L2924/00014 , H01L2224/03462 , H01L2924/00014 , H01L2224/1147 , H01L2924/00012 , H01L2224/94 , H01L2224/03 , H01L2224/94 , H01L2224/11 , H01L2224/05624 , H01L2924/00014 , H01L2224/05647 , H01L2924/00014 , H01L2224/05684 , H01L2924/00014 , H01L2224/05639 , H01L2924/00014 , H01L2224/05644 , H01L2924/00014 , H01L2224/03464 , H01L2924/00014 , H01L2224/81815 , H01L2924/00014 , H01L2224/81805 , H01L2924/00014 , H01L2224/81825 , H01L2924/00014 , H01L2224/8183 , H01L2924/00014 , H01L2224/05655 , H01L2924/00014
Abstract: Connector structures and methods of forming the same are provided. A method includes forming a first patterned passivation layer on a workpiece, the first patterned passivation layer having a first opening exposing a conductive feature of the workpiece. A seed layer is formed over the first patterned passivation layer and in the first opening. A patterned mask layer is formed over the seed layer, the patterned mask layer having a second opening exposing the seed layer, the second opening overlapping with the first opening. A connector is formed in the second opening. The patterned mask layer is partially removed, an unremoved portion of the patterned mask layer remaining in the first opening. The seed layer is patterned using the unremoved portion of the patterned mask layer as a mask.
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3.
公开(公告)号:US20200350782A1
公开(公告)日:2020-11-05
申请号:US16933415
申请日:2020-07-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Hua Yu , Chita Chuang , Chen-Shien Chen , Ming Hung Tseng , Sen-Kuei Hsu , Yu-Feng Chen , Yen-Liang Lin
Abstract: Wireless charging devices, methods of manufacture thereof, and methods of charging electronic devices are disclosed. In some embodiments, a wireless charging device includes a controller, a molding material disposed around the controller, and an interconnect structure disposed over the molding material and coupled to the controller. The wireless charging device includes a wireless charging coil coupled to the controller. The wireless charging coil comprises a first portion disposed in the interconnect structure and a second portion disposed in the molding material. The wireless charging coil is adapted to provide an inductance to charge an electronic device.
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公开(公告)号:US09053990B2
公开(公告)日:2015-06-09
申请号:US13660441
申请日:2012-10-25
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chita Chuang , Yao-Chun Chuang , Yu-Chen Hsu , Ming Hung Tseng , Chen-Shien Chen
CPC classification number: H01L24/13 , H01L24/05 , H01L24/16 , H01L24/81 , H01L2224/0401 , H01L2224/05567 , H01L2224/05624 , H01L2224/05647 , H01L2224/13022 , H01L2224/13082 , H01L2224/13111 , H01L2224/13147 , H01L2224/16225 , H01L2224/16238 , H01L2224/81024 , H01L2224/81447 , H01L2224/81815 , H01L2224/81911 , H01L2924/00014 , H01L2924/1305 , H01L2924/13091 , H01L2924/00 , H01L2924/01047 , H01L2924/0103 , H01L2924/01083 , H01L2924/01049 , H01L2924/01079 , H01L2924/01082 , H01L2924/01029 , H01L2924/01051 , H01L2224/05552
Abstract: The disclosure is directed to a device and method for manufacture thereof. The device includes a first workpiece bonded to a second workpiece by a bump interconnection structure. The bump interconnection structure allows for optimized packaging assembly yield and bond integrity.
Abstract translation: 本公开涉及一种用于制造其的装置及其方法。 该装置包括通过凸块互连结构接合到第二工件的第一工件。 凸块互连结构允许优化的包装组装产量和粘合完整性。
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公开(公告)号:US20140117532A1
公开(公告)日:2014-05-01
申请号:US13660441
申请日:2012-10-25
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chita Chuang , Yao-Chun Chuang , Yu-Chen Hsu , Ming Hung Tseng , Chen-Shien Chen
IPC: H01L23/485 , H01L21/60
CPC classification number: H01L24/13 , H01L24/05 , H01L24/16 , H01L24/81 , H01L2224/0401 , H01L2224/05567 , H01L2224/05624 , H01L2224/05647 , H01L2224/13022 , H01L2224/13082 , H01L2224/13111 , H01L2224/13147 , H01L2224/16225 , H01L2224/16238 , H01L2224/81024 , H01L2224/81447 , H01L2224/81815 , H01L2224/81911 , H01L2924/00014 , H01L2924/1305 , H01L2924/13091 , H01L2924/00 , H01L2924/01047 , H01L2924/0103 , H01L2924/01083 , H01L2924/01049 , H01L2924/01079 , H01L2924/01082 , H01L2924/01029 , H01L2924/01051 , H01L2224/05552
Abstract: The disclosure is directed to a device and method for manufacture thereof. The device includes a first workpiece bonded to a second workpiece by a bump interconnection structure. The bump interconnection structure allows for optimized packaging assembly yield and bond integrity.
Abstract translation: 本公开涉及一种用于制造其的装置及其方法。 该装置包括通过凸块互连结构接合到第二工件的第一工件。 凸块互连结构允许优化的包装组装产量和粘合完整性。
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6.
公开(公告)号:US11631993B2
公开(公告)日:2023-04-18
申请号:US16933415
申请日:2020-07-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Hua Yu , Chita Chuang , Chen-Shien Chen , Ming Hung Tseng , Sen-Kuei Hsu , Yu-Feng Chen , Yen-Liang Lin
IPC: H02J50/10 , H02J50/00 , H01F27/28 , H01F41/04 , H01F38/14 , H02J50/40 , H02J7/00 , H02J7/04 , H01L21/768
Abstract: Wireless charging devices, methods of manufacture thereof, and methods of charging electronic devices are disclosed. In some embodiments, a wireless charging device includes a controller, a molding material disposed around the controller, and an interconnect structure disposed over the molding material and coupled to the controller. The wireless charging device includes a wireless charging coil coupled to the controller. The wireless charging coil comprises a first portion disposed in the interconnect structure and a second portion disposed in the molding material. The wireless charging coil is adapted to provide an inductance to charge an electronic device.
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公开(公告)号:US20210118833A1
公开(公告)日:2021-04-22
申请号:US17113480
申请日:2020-12-07
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Shien Chen , Sheng-Yu Wu , Mirng-Ji Lii , Chita Chuang
IPC: H01L23/00
Abstract: Connector structures and methods of forming the same are provided. A method includes forming a first patterned passivation layer on a workpiece, the first patterned passivation layer having a first opening exposing a conductive feature of the workpiece. A seed layer is formed over the first patterned passivation layer and in the first opening. A patterned mask layer is formed over the seed layer, the patterned mask layer having a second opening exposing the seed layer, the second opening overlapping with the first opening. A connector is formed in the second opening. The patterned mask layer is partially removed, an unremoved portion of the patterned mask layer remaining in the first opening. The seed layer is patterned using the unremoved portion of the patterned mask layer as a mask.
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公开(公告)号:US20200321326A1
公开(公告)日:2020-10-08
申请号:US16907597
申请日:2020-06-22
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yao-Chun Chuang , Yu-Chen Hsu , Hao Chun Liu , Chita Chuang , Chen-Cheng Kuo , Chen-Shien Chen
IPC: H01L25/00 , H01L21/56 , H01L23/31 , H01L23/00 , H01L25/065
Abstract: A method comprises depositing a protection layer over a first substrate, wherein the first substrate is part of a first semiconductor die, forming an under bump metallization structure over the protection layer, forming a connector over the under bump metallization structure, forming a first dummy plane along a first edge of a top surface of the first semiconductor die and forming a second dummy plane along a second edge of the top surface of the first semiconductor die, wherein the first dummy plane and the second dummy plane form an L-shaped region.
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