公开(公告)号：US11152273B2

公开(公告)日：2021-10-19

申请号：US16852569

申请日：2020-04-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shang-Yun Tu ,  Ching-Wen Hsiao ,  Sheng-Yu Wu ,  Ching-Hui Chen

IPC: H01L21/66 ,  H01L23/31 ,  H01L23/00 ,  H01L25/00 ,  H01L21/56 ,  H01L21/768 ,  H01L21/78 ,  H01L23/498 ,  H01L21/683 ,  H01L25/10 ,  H01L25/065

Abstract: Conductive structures and the redistribution circuit structures are disclosed. One of the conductive structures includes a first conductive layer and a second conductive layer. The first conductive layer is disposed in a lower portion of a dielectric layer, and the first conductive layer includes an upper surface with a protrusion at an edge. The second conductive layer is disposed in an upper portion of the dielectric layer and electrically connected to the first conductive layer. An upper surface of the second conductive layer is conformal with the upper surface of the first conductive layer.

公开(公告)号：US09559069B2

公开(公告)日：2017-01-31

申请号：US14609023

申请日：2015-01-29

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yu-Feng Chen ,  Chen-Shien Chen ,  Sheng-Yu Wu ,  Tin-Hao Kuo ,  Yen-Liang Lin

IPC: H01L23/48 ,  H01L23/00

CPC classification number: H01L24/05 ,  H01L23/562 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/48 ,  H01L2224/0346 ,  H01L2224/0361 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05011 ,  H01L2224/05015 ,  H01L2224/05017 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05558 ,  H01L2224/05565 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2924/35121 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01073 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/0103 ,  H01L2924/01025 ,  H01L2924/01024 ,  H01L2924/01022 ,  H01L2924/01032 ,  H01L2924/01038 ,  H01L2924/01078 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/0104 ,  H01L2924/014 ,  H01L2924/01047 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: A semiconductor device includes a substrate, a semiconductor structure, a metal pad, and a stress releasing material. The semiconductor structure is disposed on the substrate. The metal pad is disposed on the semiconductor structure. The metal pad includes a through hole therein. The stress releasing material is disposed in the through hole.

Abstract translation: 半导体器件包括衬底，半导体结构，金属焊盘和应力释放材料。 半导体结构设置在基板上。 金属焊盘设置在半导体结构上。 金属垫在其中包括一个通孔。 应力释放材料设置在通孔中。

公开(公告)号：US11824026B2

公开(公告)日：2023-11-21

申请号：US17113480

申请日：2020-12-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Shien Chen ,  Sheng-Yu Wu ,  Mirng-Ji Lii ,  Chita Chuang

IPC: H01L23/00

CPC classification number: H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/81 ,  H01L24/94 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03614 ,  H01L2224/03912 ,  H01L2224/03916 ,  H01L2224/0401 ,  H01L2224/05082 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05684 ,  H01L2224/1132 ,  H01L2224/1144 ,  H01L2224/1145 ,  H01L2224/1147 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11906 ,  H01L2224/131 ,  H01L2224/13007 ,  H01L2224/13013 ,  H01L2224/13021 ,  H01L2224/13082 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/14131 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/8183 ,  H01L2224/81191 ,  H01L2224/81805 ,  H01L2224/81815 ,  H01L2224/81825 ,  H01L2224/94 ,  H01L2224/05187 ,  H01L2924/04953 ,  H01L2224/05166 ,  H01L2924/00014 ,  H01L2224/0345 ,  H01L2924/00014 ,  H01L2224/03452 ,  H01L2924/00014 ,  H01L2224/131 ,  H01L2924/014 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2224/13124 ,  H01L2924/00014 ,  H01L2224/13144 ,  H01L2924/00014 ,  H01L2224/13155 ,  H01L2924/00014 ,  H01L2224/13139 ,  H01L2924/00014 ,  H01L2224/13164 ,  H01L2924/00014 ,  H01L2224/13111 ,  H01L2924/00014 ,  H01L2224/13109 ,  H01L2924/00014 ,  H01L2224/1145 ,  H01L2924/00014 ,  H01L2224/11462 ,  H01L2924/00014 ,  H01L2224/1132 ,  H01L2924/00014 ,  H01L2224/11334 ,  H01L2924/00014 ,  H01L2224/1144 ,  H01L2924/00014 ,  H01L2224/11464 ,  H01L2924/00014 ,  H01L2224/03462 ,  H01L2924/00014 ,  H01L2224/1147 ,  H01L2924/00012 ,  H01L2224/94 ,  H01L2224/03 ,  H01L2224/94 ,  H01L2224/11 ,  H01L2224/05624 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05684 ,  H01L2924/00014 ,  H01L2224/05639 ,  H01L2924/00014 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/03464 ,  H01L2924/00014 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2224/81805 ,  H01L2924/00014 ,  H01L2224/81825 ,  H01L2924/00014 ,  H01L2224/8183 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2924/00014

Abstract: Connector structures and methods of forming the same are provided. A method includes forming a first patterned passivation layer on a workpiece, the first patterned passivation layer having a first opening exposing a conductive feature of the workpiece. A seed layer is formed over the first patterned passivation layer and in the first opening. A patterned mask layer is formed over the seed layer, the patterned mask layer having a second opening exposing the seed layer, the second opening overlapping with the first opening. A connector is formed in the second opening. The patterned mask layer is partially removed, an unremoved portion of the patterned mask layer remaining in the first opening. The seed layer is patterned using the unremoved portion of the patterned mask layer as a mask.

公开(公告)号：US10319695B2

公开(公告)日：2019-06-11

申请号：US15715659

申请日：2017-09-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Sheng-Yu Wu ,  Ching-Hui Chen ,  Mirng-Ji Lii ,  Kai-Di Wu ,  Chien-Hung Kuo ,  Chao-Yi Wang ,  Hon-Lin Huang ,  Zi-Zhong Wang ,  Chun-Mao Chiu

IPC: H01L23/00

Abstract: A semiconductor device includes a semiconductor substrate. A pad region is disposed on the semiconductor substrate. A micro bump is disposed on the pad region. The micro bump has a first portion on the pad region and a second portion on the first portion. The first portion and the second portion have different widths. The first portion has a first width and the second portion has a second width. The first width is larger or smaller than the second width. The micro bump includes nickel and gold. The semiconductor device also includes a passivation layer overlying a portion of the pad region.

公开(公告)号：US20180301430A1

公开(公告)日：2018-10-18

申请号：US15489954

申请日：2017-04-18

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chien-Hung Kuo ,  Chin-Yu Ku ,  Yuh-Sen Chang ,  Hon-Lin Huang ,  Sheng-Yu Wu ,  Ching-Hui Chen ,  Mirng-Ji LII

IPC: H01L23/00

CPC classification number: H01L24/14 ,  H01L24/03 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/13082 ,  H01L2224/1403

Abstract: A semiconductor structure includes an interconnect structure, at least one first metal pad, at least one second metal pad, at least one first bump, at least one second bump, at least one photosensitive material, and a bonding layer. The first metal pad and the second metal pad are disposed on and electrically connected to the interconnect structure. The first bump is disposed on the first metal pad. The second bump is disposed on the second metal pad. The photosensitive material is disposed on the first bump. The bonding layer is in contact with the photosensitive material and the second bump. The photosensitive material is disposed between the first bump and the bonding layer.

公开(公告)号：US11961810B2

公开(公告)日：2024-04-16

申请号：US17352844

申请日：2021-06-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Wei Lin ,  Sheng-Yu Wu ,  Yu-Jen Tseng ,  Tin-Hao Kuo ,  Chen-Shien Chen

IPC: H01L21/48 ,  H01L21/768 ,  H01L23/00 ,  H01L23/498 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L24/02 ,  H01L21/4853 ,  H01L21/76885 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/14 ,  H01L2224/02125 ,  H01L2224/02141 ,  H01L2224/02145 ,  H01L2224/0215 ,  H01L2224/0401 ,  H01L2224/05114 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05647 ,  H01L2224/10125 ,  H01L2224/11013 ,  H01L2224/11019 ,  H01L2224/1112 ,  H01L2224/11462 ,  H01L2224/11472 ,  H01L2224/13005 ,  H01L2224/13012 ,  H01L2224/13015 ,  H01L2224/13017 ,  H01L2224/13023 ,  H01L2224/13026 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13551 ,  H01L2224/13564 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13582 ,  H01L2224/136 ,  H01L2224/13686 ,  H01L2224/1369 ,  H01L2224/14051 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/16503 ,  H01L2224/81007 ,  H01L2224/81143 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/8181 ,  H01L2224/81895 ,  H01L2224/8192 ,  H01L2224/81948 ,  H01L2225/06513 ,  H01L2924/04941 ,  H01L2924/07025 ,  H01L2924/181 ,  H01L2924/301 ,  H01L2924/35 ,  Y10T29/49144 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2224/13144 ,  H01L2924/00014 ,  H01L2224/13155 ,  H01L2924/00014 ,  H01L2224/13166 ,  H01L2924/00014 ,  H01L2224/13164 ,  H01L2924/00014 ,  H01L2224/81447 ,  H01L2924/00014 ,  H01L2224/81444 ,  H01L2924/00014 ,  H01L2224/81439 ,  H01L2924/00014 ,  H01L2224/81424 ,  H01L2924/00014 ,  H01L2224/13111 ,  H01L2924/014 ,  H01L2224/13116 ,  H01L2924/014 ,  H01L2224/13686 ,  H01L2924/05432 ,  H01L2224/13686 ,  H01L2924/053 ,  H01L2224/11462 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/13012 ,  H01L2924/00012 ,  H01L2224/13005 ,  H01L2924/206 ,  H01L2224/13005 ,  H01L2924/207

Abstract: An embodiment bump on trace (BOT) structure includes a contact element supported by an integrated circuit, an under bump metallurgy (UBM) feature electrically coupled to the contact element, a metal ladder bump mounted on the under bump metallurgy feature, the metal ladder bump having a first tapering profile, and a substrate trace mounted on a substrate, the substrate trace having a second tapering profile and coupled to the metal ladder bump through direct metal-to-metal bonding. An embodiment chip-to-chip structure may be fabricated in a similar fashion.

公开(公告)号：US11177228B2

公开(公告)日：2021-11-16

申请号：US16436795

申请日：2019-06-10

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Sheng-Yu Wu ,  Ching-Hui Chen ,  Mirng-Ji Lii ,  Kai-Di Wu ,  Chien-Hung Kuo ,  Chao-Yi Wang ,  Hon-Lin Huang ,  Zi-Zhong Wang ,  Chun-Mao Chiu

IPC: H01L23/00

Abstract: A semiconductor device comprises a semiconductor substrate, a conductive pad over the semiconductor substrate, a conductive bump over the conductive pad, a conductive cap over the conductive bump, and a passivation layer over the semiconductor substrate and surrounding the conductive bump. A combination of the conductive bump and the conductive cap has a stepped sidewall profile. The passivation layer has an inner sidewall at least partially facing and spaced apart from an outer sidewall of the conductive bump.

公开(公告)号：US20210028266A1

公开(公告)日：2021-01-28

申请号：US16866519

申请日：2020-05-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sheng-Yu Wu ,  Mirng-Ji Lii ,  Shang-Yun Tu ,  Ching-Hui Chen

IPC: H01L27/32 ,  H01L51/56

Abstract: A display device includes a semiconductor substrate, an isolation layer, a light-emitting layer and a second electrode. The semiconductor substrate has a pixel region and a peripheral region located around the pixel region. The semiconductor substrate includes first electrodes and a driving element layer. The first electrodes are disposed in the pixel region and the first electrodes are electrically connected to the driving element layer. The isolation layer is disposed on the semiconductor substrate. The isolation layer includes a first isolation pattern disposed in the peripheral region, and the first isolation pattern has a first side surface and a second side surface opposite to the first side surface. The light-emitting layer is disposed on the isolation layer and the first electrodes, and covers the first side surface and the second side surface of the first isolation pattern. The second electrode is disposed on the light-emitting layer.

公开(公告)号：US10163842B2

公开(公告)日：2018-12-25

申请号：US15489954

申请日：2017-04-18

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chien-Hung Kuo ,  Chin-Yu Ku ,  Yuh-Sen Chang ,  Hon-Lin Huang ,  Sheng-Yu Wu ,  Ching-Hui Chen ,  Mirng-Ji Lii

IPC: H01L33/50 ,  H01L23/00

Abstract: A semiconductor structure includes an interconnect structure, at least one first metal pad, at least one second metal pad, at least one first bump, at least one second bump, at least one photosensitive material, and a bonding layer. The first metal pad and the second metal pad are disposed on and electrically connected to the interconnect structure. The first bump is disposed on the first metal pad. The second bump is disposed on the second metal pad. The photosensitive material is disposed on the first bump. The bonding layer is in contact with the photosensitive material and the second bump. The photosensitive material is disposed between the first bump and the bonding layer.

公开(公告)号：US20230253358A1

公开(公告)日：2023-08-10

申请号：US18302935

申请日：2023-04-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sheng-Yu Wu ,  Tin-Hao Kuo ,  Chen-Shien Chen

IPC: H01L23/00 ,  H01L23/498 ,  H05K1/11 ,  H01L25/10 ,  H01L29/66 ,  H01L25/065 ,  H01L23/528

CPC classification number: H01L24/17 ,  H01L23/528 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/02 ,  H01L24/09 ,  H01L24/14 ,  H01L24/16 ,  H01L24/33 ,  H01L24/81 ,  H01L25/105 ,  H01L25/0657 ,  H01L29/66 ,  H05K1/111 ,  H01L23/3192 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0235 ,  H01L2224/0401 ,  H01L2224/1308 ,  H01L2224/02375 ,  H01L2224/3003 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/14133 ,  H01L2224/16013 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2225/1047 ,  H01L2924/3512 ,  H01L2924/3841 ,  H01L2924/35121 ,  H05K2201/09727 ,  H05K2201/10674

Abstract: A package includes a first and a second package component. The first package component includes a first metal trace and a second metal trace at the surface of the first package component. The second metal trace is parallel to the first metal trace. The second metal trace includes a narrow metal trace portion having a first width, and a wide metal trace portion having a second width greater than the first width connected to the narrow metal trace portion. The second package component is over the first package component. The second package component includes a metal bump overlapping a portion of the first metal trace, and a conductive connection bonding the metal bump to the first metal trace. The conductive connection contacts a top surface and sidewalls of the first metal trace. The metal bump is neighboring the narrow metal trace portion.