Abstract:
An optical receiver assembly that is configured to avoid the introduction of feedback in an electrical signal converted by the assembly is disclosed. In one embodiment, an optical receiver assembly is disclosed, comprising a capacitor, an optical detector provided with a power supply being mounted on a top electrode of the capacitor, and an amplifier mounted on the reference surface. The assembly further includes an isolator interposed between the reference surface and the capacitor, wherein the isolator includes a bottom layer of dielectric material that is affixed to a portion of the reference surface, and a metallic top plate that is electrically coupled both to a ground of the amplifier and to the capacitor. This configuration bootstraps the amplifier ground to the amplifier input via the photodiode top electrode of the capacitor to cancel out feedback signals present at the amplifier ground.
Abstract:
The invention concerns sensors of physical quantities such as pressure or acceleration sensors, and more precisely the mounting of the sensor active part on a base (30) bearing connection pins (32). The invention is characterised in that it consists in preparing an active part of the sensor, consisting for example of micromachined silicon wafers (10, 12) bearing electronic elements, electrical conductors, and bond pads (22); likewise preparing a base (30) provided with pins (32) and electrically connecting the bond pads (22) to the pin ends with conductive elements (wires 40); then in immersing the wafer and the pin ends in an electrolytic solution, so as to perform an electrolytic plating of conductive metal (42) on the pin ends, the pads and the conductor elements connecting them; finally oxidizing and nitriding said metal to form an insulating coat (44) on the ends of the connection pins, the pads and the conductive elements connecting them. The invention is applicable to pressure, force, acceleration sensors and the like, designed to operate in harsh environment.
Abstract:
A clock plane (80) is embedded in the housing of a semiconductor chip package (14) where the plane (80) is connected to two or more clock pads (54, 56) on the semiconductor die (52) through vias, bonding fingers (62, 64) and bonding wires (72, 74). The two or more clock pads (54, 56) are connected by one or more clock lines (58). The clock plane (80) is connected by means of a via (112) to a clock input pin (116). In this manner, a clock signal fed to the clock input pin (116) is driven through the one or more clock line (58) with its tributaries from two separate locations by two or more input clock pads (54, 56). This reduces clock skew and permits a smaller area of the die surface (52) to be taken up by the clock lines.
Abstract:
Electrical connections between different materials. An electrical connection system includes electrical components and an electrical connection between the electrical components. The electrical connection includes a functionally graded material. A method of making an electrical connection between different materials includes the steps of: providing an electrical component which includes a material; providing another electrical component which includes another material; and electrically connecting a functionally graded material between the electrical components. An electrical connection system includes an electrical component and a functionally graded material electrically connected to the electrical component. The functionally graded material provides a gradual transition between at least two dissimilar materials.
Abstract:
Optical receiver modules are used for receiving high-speed optical data signals. Unfortunately, these optical receiver modules are often tested for the first time after they are packaged in a housing. Thus significant costs are associated with those packaged devices that fail to meet predetermined criteria. An integrated optical receiver module is proposed that has an optical detector direct attached, or flip-chipped or bumped, onto an integrated circuit having an amplifier circuit. The direct attach process is performed when the integrated circuits still reside on a semiconductor wafer prior to dicing thereof. Thus, high speed optical testing of the optical receiver module is possible on a wafer level to determine actual performance characteristics thereof prior to dicing.
Abstract:
An electrical connection between a transmission line and an integrated circuit package comprises, a circuit board (12) on which are mounted a transmission line (28, 402, 202, 503, 505) and an integrated circuit package (10), a projecting portion of a pin (14, 14A, 14B) projecting from an integrated circuit package (10), a transmission line feed (32, 404) that further comprises a waveguide cavity (204, 504, 506) connected to the pin (14, 14A, 14B) and a dielectric material (106) surrounding the pin (14, 14A, 14B), the dielectric material being between the pin and a ground feed (92, 412, 414, 208, 508, 510) of the transmission line (28, 402, 202, 503, 505).
Abstract:
There is provided a ball grid array package (40) for housing semiconductor devices (16). The package (40) has a metallic base (42) with conductive vias (44) extending through holes formed in the base (42). The conductive vias (44) terminate adjacent an exterior surface (48) of the base (42). A dielectric coating on at least part of the base (42) and through hole walls electrically isolates the metallic base (42) from the package circuitry (52).