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    DIRECTIONAL SELECTIVE FILL USING HIGH DENSITY PLASMA
    2.
    发明公开
    DIRECTIONAL SELECTIVE FILL USING HIGH DENSITY PLASMA 审中-公开

    公开(公告)号：US20240234131A1

    公开(公告)日：2024-07-11

    申请号：US18584540

    申请日：2024-02-22

    Applicant: Applied Materials, Inc.

    Inventor： Purvam Dineshbhai Modi ,  Bhargav S. Citla ,  Srinivas D. Nemani ,  Ellie Y. Yieh

    IPC: H01L21/02 ,  H01J37/32 ,  H01L21/3065 ,  H01L21/311

    CPC classification number: H01L21/02274 ,  H01J37/32146 ,  H01L21/3065 ,  H01L21/31116 ,  H01J2237/332 ,  H01J2237/334

    Abstract: Exemplary processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. The substrate may define a feature. The methods may include forming plasma effluents of the silicon-containing precursor. The methods may include depositing a silicon-containing material on the substrate. The methods may include providing an oxygen-containing precursor to the processing region, forming plasma effluents of the oxygen-containing precursor, and contacting the silicon-containing material with the plasma effluents of the oxygen-containing precursor to form a silicon-and-oxygen-containing material. The methods may include providing a fluorine-containing precursor to the processing region, forming plasma effluents of the fluorine-containing precursor, and etching the silicon-and-oxygen-containing material from a top, a sidewall, or both of the feature with the plasma effluents of the fluorine-containing precursor.

    Selective atomic layer deposition process utilizing patterned self assembled monolayers for 3D structure semiconductor applications
    6.
    发明授权
    Selective atomic layer deposition process utilizing patterned self assembled monolayers for 3D structure semiconductor applications 有权
    选择性原子层沉积工艺利用3D结构半导体应用的图案化自组装单层

    公开(公告)号：US09515166B2

    公开(公告)日：2016-12-06

    申请号：US14276780

    申请日：2014-05-13

    Applicant: Applied Materials, Inc.

    Inventor： Srinivas D. Nemani ,  Ellie Y. Yieh ,  Ludovic Godet ,  Yin Fan

    IPC: H01L21/469 ,  H01L29/66 ,  H01L21/02 ,  H01L21/3115 ,  H01J37/32

    CPC classification number: H01L21/02304 ,  H01J37/32357 ,  H01J37/32403 ,  H01J37/32422 ,  H01L21/0228 ,  H01L21/02321 ,  H01L21/0234 ,  H01L21/31155 ,  H01L29/66795 ,  H01L29/66803

    Abstract: Methods for forming fin structure with desired materials formed on different locations of the fin structure using a selective deposition process for three dimensional (3D) stacking of fin field effect transistor (FinFET) for semiconductor chips are provided. In one embodiment, a method of forming a structure with desired materials on a substrate includes forming a patterned self-assembled monolayer on a circumference of a structure formed on a substrate, wherein the patterned self-assembled monolayer includes a treated layer formed among a self-assembled monolayer, and performing an atomic layer deposition process to form a material layer predominantly on the self-assembled monolayer from the patterned self-assembled monolayer.

    Abstract translation: 提供了使用用于半导体芯片的鳍式场效应晶体管（FinFET）的三维（3D）堆叠的选择性沉积工艺在翅片结构的不同位置形成所需材料的翅片结构的方法。 在一个实施方案中，在衬底上形成具有期望材料的结构的方法包括在形成在衬底上的结构的圆周上形成图案化的自组装单层，其中所述图案化的自组装单层包括在自身中形成的处理层 并且执行原子层沉积工艺，以从图案化的自组装单层形成主要在自组装单层上的材料层。

    DIRECTIONAL SELECTIVE FILL OF SILICON OXIDE MATERIALS
    10.
    发明申请
    DIRECTIONAL SELECTIVE FILL OF SILICON OXIDE MATERIALS 有权

    公开(公告)号：US20250022704A1

    公开(公告)日：2025-01-16

    申请号：US18221240

    申请日：2023-07-12

    Applicant: Applied Materials, Inc.

    Inventor： Qiang Ma ,  Biao Liu ,  Bhargav S. Citla ,  Srinivas D. Nemani ,  Ellie Y. Yieh ,  Taiki Hatakeyama ,  Shreyas Shukla ,  Mei-Yee Shek

    IPC: H01L21/02 ,  H01J37/32 ,  H01L21/311

    Abstract: Exemplary processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. The substrate may define a feature. The methods may include forming plasma effluents of the silicon-containing precursor. The methods may include depositing a silicon-containing material on the substrate. The methods may include providing an oxygen-containing precursor to the processing region, forming plasma effluents of the oxygen-containing precursor, and contacting the silicon-containing material with the plasma effluents of the oxygen-containing precursor to form a silicon-and-oxygen-containing material. The methods may include providing a fluorine-containing precursor to the processing region, forming plasma effluents of the fluorine-containing precursor, and etching the silicon-and-oxygen-containing material from a top, a sidewall, or both of the feature with the plasma effluents of the fluorine-containing precursor.

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