MULTILAYER CERAMIC CAPACITOR INCLUDING AT LEAST ONE SLOT
    94.
    发明申请
    MULTILAYER CERAMIC CAPACITOR INCLUDING AT LEAST ONE SLOT 审中-公开
    多层陶瓷电容器,包括至少一个插槽

    公开(公告)号:US20150146340A1

    公开(公告)日:2015-05-28

    申请号:US14090589

    申请日:2013-11-26

    IPC分类号: H01G4/30

    CPC分类号: H01G4/30 H01G4/012 H01G4/12

    摘要: An apparatus includes a two-terminal MLCC. The two-terminal MLCC includes a conductive layer, where the conductive layer includes at least one slot. The apparatus may also include a second conductive layer that includes at least one slot and an insulating layer that separates the two conductive layers. In one example, a first (e.g., positive) terminal of the two-terminal MLCC is formed by a first set of plates, where each plate in the first set includes at least one slot. A second (e.g., negative) terminal of the two-terminal MLCC is formed by a second set of plates, where each plate in the second set also includes at least one slot. The first set of plates and the second set of plates are interleaved, and each pair of plates is separated by an insulating layer.

    摘要翻译: 一种装置包括两端MLCC。 双端MLCC包括导电层,其中导电层包括至少一个槽。 该装置还可以包括第二导电层,其包括至少一个槽和分离两个导电层的绝缘层。 在一个示例中,双端子MLCC的第一(例如,正)端子由第一组板形成,其中第一组中的每个板包括至少一个槽。 双端子MLCC的第二(例如,负极)端子由第二组板形成,其中第二组中的每个板还包括至少一个槽。 第一组板和第二组板被交错,并且每对板由绝缘层分开。

    MULTI SPIRAL INDUCTOR
    95.
    发明申请
    MULTI SPIRAL INDUCTOR 审中-公开
    多螺旋电感器

    公开(公告)号:US20150130579A1

    公开(公告)日:2015-05-14

    申请号:US14078174

    申请日:2013-11-12

    IPC分类号: H01F27/28 H01F41/06

    摘要: An apparatus includes a multi spiral inductor that includes a first spiral and a second spiral. The first spiral includes a first turn, a second turn, and a third turn. The first turn is adjacent to and separated from the second turn by first spacing. The second turn is adjacent to and separated from the third turn by second spacing. The first spacing is different from the second spacing.

    摘要翻译: 一种装置包括多螺旋电感器,其包括第一螺旋和第二螺旋。 第一个螺旋包括第一回合,第二回合和第三回合。 第一匝与第二匝相邻并且与第二匝分开。 第二匝与第三匝相邻并且与第三匝分开第二个间距。 第一间距与第二间距不同。

    CONNECTOR PLACEMENT FOR A SUBSTRATE INTEGRATED WITH A TOROIDAL INDUCTOR
    96.
    发明申请
    CONNECTOR PLACEMENT FOR A SUBSTRATE INTEGRATED WITH A TOROIDAL INDUCTOR 审中-公开
    用于与电感电感器集成的基板的连接器放置

    公开(公告)号:US20150092314A1

    公开(公告)日:2015-04-02

    申请号:US14039192

    申请日:2013-09-27

    IPC分类号: H01F27/29 H01F41/04 H01F27/40

    摘要: A system includes a first connector coupled to a first surface of a substrate. The first connector enables the system to be electrically coupled to a first device external to the substrate. The system includes a second connector coupled to a second surface of the substrate. The system also includes a plurality of conductive vias extending through the substrate from the first surface to the second surface. The plurality of conductive vias surrounds the first connector and the second connector. The plurality of conductive vias is electrically coupled together to form a toroidal inductor. A first lead of the toroidal inductor is electrically coupled to the first connector. A second lead of the toroidal inductor is electrically coupled to the second connector.

    摘要翻译: 系统包括耦合到衬底的第一表面的第一连接器。 第一连接器使得系统能够电耦合到衬底外部的第一器件。 该系统包括耦合到基板的第二表面的第二连接器。 该系统还包括从第一表面延伸穿过基底的多个导电通孔到第二表面。 多个导电通孔围绕第一连接器和第二连接器。 多个导电通孔电耦合在一起以形成环形电感器。 环形电感器的第一引线电耦合到第一连接器。 环形电感器的第二引线电耦合到第二连接器。

    Capacitance fine tuning by fin capacitor design

    公开(公告)号:US11515247B2

    公开(公告)日:2022-11-29

    申请号:US17149006

    申请日:2021-01-14

    摘要: A device includes a main capacitor composed of a first plate of a first back-end-of-line (BEOL) metallization layer, a main insulator layer on the first plate, and a second plate on the main insulator layer. The second plate is composed of a second BEOL metallization layer. The device includes a first tuning capacitor of a first portion of a first BEOL interconnect trace coupled to the first plate of the main capacitor through first BEOL sideline traces. The first tuning capacitor is composed of a first insulator layer on a surface and sidewalls of the first portion of the first BEOL interconnect trace. The first tuning capacitor includes a second BEOL interconnect trace on a surface and sidewalls of the first insulator layer. The device includes a first via capture pad coupled to the second BEOL interconnect trace of the first tuning capacitor.