公开(公告)号：US10103116B2

公开(公告)日：2018-10-16

申请号：US15077869

申请日：2016-03-22

Applicant: QUALCOMM Incorporated

Inventor： Daeik Daniel Kim ,  Mario Francisco Velez ,  Changhan Hobie Yun ,  Chengjie Zuo ,  David Francis Berdy ,  Jonghae Kim ,  Niranjan Sunil Mudakatte

IPC: H01L23/00 ,  H05K1/11 ,  H01L23/31 ,  H05K1/03 ,  H05K3/00

Abstract: A conductive bump assembly may include a passive substrate. The conductive bump assembly may also include a conductive bump pad supported by the passive substrate and surrounded by a first passivation layer opening. The conductive bump assembly may further include a second passivation layer opening on the passive substrate. The second passivation layer opening may be merged with the first passivation layer opening surrounding the conductive bump pad proximate an edge of the passive substrate. The conductive bump assembly may also include a conductive bump on the conductive bump pad.

公开(公告)号：US09959964B2

公开(公告)日：2018-05-01

申请号：US14941493

申请日：2015-11-13

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  David Francis Berdy ,  Daeik Daniel Kim ,  Chengjie Zuo ,  Jonghae Kim ,  Je-Hsiung Jeffrey Lan ,  Mario Francisco Velez ,  Niranjan Sunil Mudakatte

IPC: H01F5/00 ,  H01F27/28 ,  H01F10/12 ,  H01F41/04

CPC classification number: H01F10/12 ,  H01F17/0013 ,  H01F27/2804 ,  H01F41/042 ,  H01F41/046 ,  H01F2017/0066 ,  H01F2027/2809

Abstract: A thin film magnet (TFM) three-dimensional (3D) inductor structure may include a substrate with conductive vias extending through the substrate. The TFM 3D inductor structure may also include a magnetic thin film layer on at least sidewalls of the conductive vias and on a first side and an opposing second side of the substrate. The TFM 3D inductor structure may further include a first conductive trace directly on the magnetic thin film layer on the first side of the substrate and electrically coupling to at least one of the conductive vias. The TFM 3D inductor structure also includes a second conductive trace directly on the magnetic thin film layer on the second side of the substrate and coupled to at least one of the conductive vias.

公开(公告)号：US09954267B2

公开(公告)日：2018-04-24

申请号：US15067106

申请日：2016-03-10

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Daeik Daniel Kim ,  Mario Francisco Velez ,  Chengjie Zuo ,  David Francis Berdy ,  Jonghae Kim

IPC: H01P5/12 ,  H01P5/16 ,  H01Q1/50 ,  H01Q1/22 ,  H03H7/01 ,  H03H7/46

CPC classification number: H01P5/16 ,  H01Q1/22 ,  H01Q1/50 ,  H03H7/0115 ,  H03H7/463

Abstract: A multiplexer structure includes a passive substrate. The multiplexer structure may also include a high band filter on the passive substrate. The high band filter may include a 2D planar spiral inductor(s) on the passive substrate. The multiplexer structure may further include a low band filter on the passive substrate. The low band filter may include a 3D through-substrate inductor and a first capacitor(s) on the passive substrate. The multiplexer structure may also include a through substrate via(s) coupling the high band filter and the low band filter.

公开(公告)号：US09893048B2

公开(公告)日：2018-02-13

申请号：US14853701

申请日：2015-09-14

Applicant: QUALCOMM Incorporated

Inventor： Je-Hsiung Jeffrey Lan ,  Niranjan Sunil Mudakatte ,  Changhan Hobie Yun ,  Daeik Daniel Kim ,  Chengjie Zuo ,  David Francis Berdy ,  Mario Francisco Velez ,  Jonghae Kim

IPC: H01L27/12 ,  H01L27/01 ,  H01L49/02 ,  H01L23/522 ,  H01L23/15 ,  H01L21/48 ,  H01L21/70 ,  H01L23/498

CPC classification number: H01L27/01 ,  H01L21/4846 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5223 ,  H01L23/5227 ,  H01L28/10 ,  H01L28/75 ,  H01L2224/11

Abstract: A device includes a glass substrate and a capacitor. The capacitor includes a first metal coupled to a first electrode, a dielectric structure, and a via structure comprising a second electrode of the capacitor. The first metal structure is separated from the via structure by the dielectric structure.

公开(公告)号：US20170338034A1

公开(公告)日：2017-11-23

申请号：US15160776

申请日：2016-05-20

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Chengjie Zuo ,  Daeik Daniel Kim ,  Mario Francisco Velez ,  Niranjan Sunil Mudakatte ,  Jonghae Kim ,  David Francis Berdy

IPC: H01F27/40 ,  H01F41/02 ,  H01F27/28 ,  H01F27/29 ,  H03H7/46 ,  H03H7/01

CPC classification number: H01F27/40 ,  H01F17/00 ,  H01F27/2823 ,  H01F27/29 ,  H01F27/292 ,  H01F41/02 ,  H01F2017/002 ,  H01L23/49822 ,  H01L23/5223 ,  H01L23/5227 ,  H01L28/10 ,  H03H7/0115 ,  H03H7/466

Abstract: An apparatus includes a substrate and a three-dimensional (3D) wirewound inductor integrated within the substrate. The apparatus further includes a capacitor coupled to the 3D wirewound inductor.

公开(公告)号：US09813043B2

公开(公告)日：2017-11-07

申请号：US15079789

申请日：2016-03-24

Applicant: QUALCOMM Incorporated

Inventor： Chengjie Zuo ,  Daeik D. Kim ,  Je-Hsiung Lan ,  Jonghae Kim ,  Mario Francisco Velez ,  Changhan Yun ,  David F. Berdy ,  Robert P. Mikulka ,  Matthew M. Nowak ,  Xiangdong Zhang ,  Puay H. See

IPC: H03H7/46 ,  H03H3/00 ,  H03H7/01

CPC classification number: H03H7/461 ,  H03H3/00 ,  H03H7/0115 ,  H03H7/463 ,  Y10T29/49016

Abstract: Tunable diplexers in three-dimensional (3D) integrated circuits (IC) (3DIC) are disclosed. In one embodiment, the tunable diplexer may be formed by providing one of either a varactor or a variable inductor in the diplexer. The variable nature of the varactor or the variable inductor allows a notch in the diplexer to be tuned so as to select a band stop to eliminate harmonics at a desired frequency as well as control the cutoff frequency of the pass band. By stacking the elements of the diplexer into three dimensions, space is conserved and a variety of varactors and inductors are able to be used.

公开(公告)号：US09807882B1

公开(公告)日：2017-10-31

申请号：US15239751

申请日：2016-08-17

Applicant: QUALCOMM Incorporated

Inventor： David Francis Berdy ,  Changhan Hobie Yun ,  Niranjan Sunil Mudakatte ,  Mario Francisco Velez ,  Chengjie Zuo ,  Jonghae Kim

IPC: H01L23/48 ,  H05K1/11 ,  H05K3/40 ,  H05K3/30 ,  H05K1/03 ,  H05K1/18 ,  H01F27/28 ,  H05K3/06 ,  H03H7/01 ,  H03H7/46 ,  H01L49/02 ,  H01L23/66 ,  H01Q1/48 ,  H01Q1/36 ,  H01Q1/38 ,  H01Q1/24

CPC classification number: H05K1/181 ,  H01F27/2804 ,  H01L23/49822 ,  H01L23/5225 ,  H01L23/5227 ,  H01L23/552 ,  H01L23/645 ,  H01L23/66 ,  H01L24/06 ,  H01L28/10 ,  H01L2223/6672 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01Q1/241 ,  H01Q1/36 ,  H01Q1/38 ,  H01Q1/48 ,  H03H7/0115 ,  H03H7/0138 ,  H03H7/46 ,  H05K1/0224 ,  H05K1/0271 ,  H05K1/144 ,  H05K3/06 ,  H05K3/303 ,  H05K2201/041 ,  H05K2201/045 ,  H05K2201/0715 ,  H05K2201/09136 ,  H05K2201/1003 ,  H05K2201/10378 ,  H05K2201/10674

Abstract: An integrated circuit (IC) device may include a first substrate having an inductor ground plane in a conductive layer of the first substrate. The integrated circuit may also include a first inductor in a passive device layer of a second substrate that is supported by the first substrate. A shape of the inductor ground plane may substantially correspond to a silhouette of the first inductor.

公开(公告)号：US20170280562A1

公开(公告)日：2017-09-28

申请号：US15079811

申请日：2016-03-24

Applicant: QUALCOMM Incorporated

Inventor： Chengjie Zuo ,  David Francis Berdy ,  Daeik Daniel Kim ,  Changhan Hobie Yun ,  Mario Francisco Velez ,  Jonghae Kim

IPC: H05K1/18 ,  H05K3/10 ,  H05K3/40 ,  H03H7/01 ,  H05K3/30

CPC classification number: H05K1/181 ,  H01L21/56 ,  H01L23/12 ,  H01L23/15 ,  H01L23/28 ,  H01L23/5386 ,  H01L23/5389 ,  H01L23/552 ,  H03H7/0138 ,  H05K1/0218 ,  H05K1/141 ,  H05K3/10 ,  H05K3/303 ,  H05K3/4007 ,  H05K2201/042 ,  H05K2201/045 ,  H05K2201/09227 ,  H05K2201/1003 ,  H05K2201/10098 ,  H05K2201/10962 ,  H05K2201/2036

Abstract: Passive device assembly for accurate ground plane control is disclosed. A passive device assembly includes a device substrate conductively coupled to a ground plane separation control substrate. A passive device disposed on a lower surface of the device substrate is separated from an embedded ground plane mounted on a lower surface of the ground plane separation control substrate by a separation distance. The separation distance is accurately controlled to minimize undesirable interference that may occur to the passive device. The separation distance is provided inside the passive device assembly. Conductive mounting pads are disposed on the lower surface of the ground plane separation control substrate to support accurate alignment of the passive device assembly on a circuit board. By providing sufficient separation distance inside the passive device assembly, the passive device assembly can be precisely mounted onto any circuit board regardless of specific design and layout of the circuit board.

公开(公告)号：US20170271266A1

公开(公告)日：2017-09-21

申请号：US15074750

申请日：2016-03-18

Applicant: QUALCOMM Incorporated

Inventor： Daeik Kim ,  Jie Fu ,  Changhan Yun ,  Chin-Kwan Kim ,  Manuel Aldrete ,  Chengjie Zuo ,  Mario Velez ,  Jonghae Kim

IPC: H01L23/538 ,  H01L21/48

CPC classification number: H01L23/5389 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5383 ,  H01L23/5384 ,  H01L24/19 ,  H01L24/20 ,  H01L24/25 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/2518 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2224/83 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A device and method of fabricating are provided. The device includes a substrate having a first side and an opposite second side, a cavity defined within the substrate from the first side, a die coupled to a floor of the cavity and having a conductive pad on a side of the die distal to the floor of the cavity. A laminate layer coupled to the second side of the substrate may be included. A hole may be drilled, at one time, through layers of the device, through the die, and through the conductive pad. The hole extends through and is defined within the laminate layer (if present), the second side of the substrate, the die, and the conductive pad. A conductive material is provided within the hole and extends between and through the laminate layer (if provided), the second side of the substrate, the die, and the conductive pad.

公开(公告)号：US09673275B2

公开(公告)日：2017-06-06

申请号：US14920851

申请日：2015-10-22

Applicant: QUALCOMM Incorporated

Inventor： Daeik Daniel Kim ,  Changhan Hobie Yun ,  Je-Hsiung Jeffrey Lan ,  Niranjan Sunil Mudakatte ,  Jonghae Kim ,  Matthew Michael Nowak

IPC: H01L29/06 ,  H01L29/78 ,  H01L23/48 ,  H01L21/762 ,  H01L21/768 ,  H01L21/78

CPC classification number: H01L29/0653 ,  H01L21/762 ,  H01L21/76224 ,  H01L21/76898 ,  H01L21/78 ,  H01L21/823481 ,  H01L23/3128 ,  H01L23/481 ,  H01L29/78

Abstract: Isolated complementary metal-oxide semiconductor (CMOS) devices for radio-frequency (RF) circuits are disclosed. In some aspects, an RF circuit includes CMOS devices, a silicon substrate having doped regions that define the CMOS devices, and a trench through the silicon substrate. The trench through the silicon substrate forms a continuous channel around the doped regions of one of the CMOS devices to electrically isolate the CMOS device from other CMOS devices embodied on the silicon substrate. By so doing, performance characteristics of the CMOS device, such as linearity and signal isolation, may be improved over those of conventional CMOS devices (e.g., bulk CMOS).