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    Gate electrode material residual removal process
    111.
    发明授权
    Gate electrode material residual removal process 有权

    公开(公告)号：US09640385B2

    公开(公告)日：2017-05-02

    申请号：US15000273

    申请日：2016-01-19

    Applicant: Applied Materials, Inc.

    Inventor： Bhargav Citla ,  Chentsau Ying ,  Srinivas D. Nemani

    IPC: H01L21/02 ,  H01L21/28 ,  H01L21/3213

    CPC classification number: H01L21/02071 ,  H01L21/28035 ,  H01L21/32137

    Abstract: The present disclosure provides methods for removing gate electrode residuals from a gate structure after a gate electrode patterning process. In one example, a method for forming high aspect ratio features in a gate electrode layer in a gate structure includes performing an surface treatment process on gate electrode residuals remaining on a gate structure disposed on a substrate, selectively forming a treated residual in the gate structure on the substrate with some untreated regions nearby in the gate structure, and performing a remote plasma residual removal process to remove the treated residual from the substrate.

    Air gap process
    115.
    发明授权
    Air gap process 有权
    气隙过程

    公开(公告)号：US09385028B2

    公开(公告)日：2016-07-05

    申请号：US14171400

    申请日：2014-02-03

    Applicant: APPLIED MATERIALS, INC.

    Inventor： Srinivas D. Nemani ,  Takehito Koshizawa

    IPC: H01L21/4763 ,  H01L21/768 ,  H01L21/311 ,  H01L21/3105 ,  H01J37/32

    CPC classification number: H01L21/7682 ,  H01J37/32357 ,  H01L21/3105 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/7684 ,  H01L21/76877

    Abstract: Methods are described for forming “air gaps” between adjacent metal lines on patterned substrates. The common name “air gap” will be used interchangeably with the more technically accurate “gas pocket” and both reflect a variety of pressures and elemental ratios. The air gaps are produced within narrow gaps between copper lines while wide gaps retain dielectric material. Retention of the dielectric material within the wide gaps enables formation of a desirable planar top surface. Using a hardmask layer and a selective dry-etch process enables a wet processing step to be avoided right before the formation of the air gaps. The air gaps can have a dielectric constant approaching one, favorably reducing interconnect capacitance compared with typical low-k dielectric materials.

    Abstract translation: 描述了在图案化基板上的相邻金属线之间形成“气隙”的方法。 通用名称“气隙”将与更技术上精确的“气囊”互换使用，并且都反映各种压力和元素比。 气隙在铜线之间的狭窄间隙内产生，而宽间隙保留介电材料。 在宽间隙内的电介质材料的保持能够形成理想的平面顶表面。 使用硬掩模层和选择性干蚀刻工艺使得能够在形成气隙之前避免湿加工步骤。 与典型的低k介电材料相比，气隙可以具有接近一个的介电常数，有利地减少互连电容。

    Halogen-free gas-phase silicon etch
    116.
    发明授权
    Halogen-free gas-phase silicon etch 有权
    无卤素气相硅蚀刻

    公开(公告)号：US09190290B2

    公开(公告)日：2015-11-17

    申请号：US14231180

    申请日：2014-03-31

    Applicant: Applied Materials, Inc.

    Inventor： Jun Xue ,  Chentsau Ying ,  Srinivas D. Nemani

    IPC: H01L37/00 ,  H01L21/311 ,  H01L21/3065

    CPC classification number: H01L21/31116 ,  H01J37/32357 ,  H01L21/3065 ,  H01L21/32137 ,  H01L29/66545

    Abstract: A method of selectively dry etching silicon from patterned heterogeneous structures is described. The method optionally includes a plasma process prior to a remote plasma etch. The plasma process may use a biased plasma to treat some crystalline silicon (e.g. polysilicon or single crystal silicon) to form amorphous silicon. Subsequently, a remote plasma is formed using a hydrogen-containing precursor to form plasma effluents. The plasma effluents are passed into the substrate processing region to etch the amorphous silicon from the patterned substrate. By implementing biased plasma processes, the normally isotropic etch may be transformed into a directional (anisotropic) etch despite the remote nature of the plasma excitation during the etch process.

    Abstract translation: 描述了从图案化异质结构中选择性地干蚀刻硅的方法。 该方法可选地包括在远程等离子体蚀刻之前的等离子体处理。 等离子体工艺可以使用偏置等离子体来处理一些晶体硅（例如多晶硅或单晶硅）以形成非晶硅。 随后，使用含氢前体形成远程等离子体以形成等离子体流出物。 等离子体流出物流入衬底处理区域以从图案化衬底中蚀刻非晶硅。 通过实施偏压等离子体处理，尽管在蚀刻过程中等离子体激发的远端性质，但是通常的各向同性蚀刻可以转化为定向（各向异性）蚀刻。

    HALOGEN-FREE GAS-PHASE SILICON ETCH
    117.
    发明申请
    HALOGEN-FREE GAS-PHASE SILICON ETCH 有权
    无卤素气相硅蚀刻

    公开(公告)号：US20150279687A1

    公开(公告)日：2015-10-01

    申请号：US14231180

    申请日：2014-03-31

    Applicant: Applied Materials, Inc.

    Inventor： Jun Xue ,  Chentsau Ying ,  Srinivas D. Nemani

    IPC: H01L21/311 ,  H01L21/3065

    CPC classification number: H01L21/31116 ,  H01J37/32357 ,  H01L21/3065 ,  H01L21/32137 ,  H01L29/66545

    Abstract: A method of selectively dry etching silicon from patterned heterogeneous structures is described. The method optionally includes a plasma process prior to a remote plasma etch. The plasma process may use a biased plasma to treat some crystalline silicon (e.g. polysilicon or single crystal silicon) to form amorphous silicon. Subsequently, a remote plasma is formed using a hydrogen-containing precursor to form plasma effluents. The plasma effluents are passed into the substrate processing region to etch the amorphous silicon from the patterned substrate. By implementing biased plasma processes, the normally isotropic etch may be transformed into a directional (anisotropic) etch despite the remote nature of the plasma excitation during the etch process.

    Abstract translation: 描述了从图案化异质结构中选择性地干蚀刻硅的方法。 该方法可选地包括在远程等离子体蚀刻之前的等离子体处理。 等离子体工艺可以使用偏置等离子体来处理一些晶体硅（例如多晶硅或单晶硅）以形成非晶硅。 随后，使用含氢前体形成远程等离子体以形成等离子体流出物。 等离子体流出物流入衬底处理区域以从图案化衬底中蚀刻非晶硅。 通过实施偏压等离子体处理，尽管在蚀刻过程中等离子体激发的远端性质，但是通常的各向同性蚀刻可以转化为定向（各向异性）蚀刻。

    Delicate dry clean
    118.
    发明授权
    Delicate dry clean 有权
    细干干净

    公开(公告)号：US08895449B1

    公开(公告)日：2014-11-25

    申请号：US13966453

    申请日：2013-08-14

    Applicant: Applied Materials, Inc.

    Inventor： Lina Zhu ,  Sean S. Kang ,  Srinivas D. Nemani ,  Chia-Ling Kao

    IPC: H01L21/302 ,  H01L21/461 ,  H01L21/3105 ,  H01L21/311

    CPC classification number: H01L21/3105 ,  H01L21/02063 ,  H01L21/31116

    Abstract: A method of selectively removing fluorocarbon layers from overlying low-k dielectric material is described. These protective plasma treatments (PPT) are delicate alternatives to traditional post-etch treatments (PET). The method includes sequential exposure to (1) a local plasma formed from a silicon-fluorine precursor followed by (2) an exposure to plasma effluents formed in a remote plasma from a fluorine-containing precursor. The remote plasma etch (2) has been found to be highly selective of the residual material following the local plasma silicon-fluorine exposure. The sequential process (1)-(2) avoids exposing the low-k dielectric material to oxygen which would undesirably increase its dielectric constant.

    Abstract translation: 描述了从覆盖低k电介质材料中选择性除去碳氟化合物层的方法。 这些保护等离子体处理（PPT）是传统的蚀刻后处理（PET）的精巧替代品。 该方法包括连续暴露于（1）由硅 - 氟前体形成的局部等离子体，随后（2）暴露于在含氟前体的远程等离子体中形成的等离子体流出物。 已经发现远程等离子体蚀刻（2）对于局部等离子体硅 - 氟暴露后的残余材料是高度选择性的。 顺序方法（1） - （2）避免了将低k电介质材料暴露于氧气，这将不利地增加其介电常数。

    Metal based hydrogen barrier
    119.
    发明授权
    Metal based hydrogen barrier 有权

    公开(公告)号：US12288717B2

    公开(公告)日：2025-04-29

    申请号：US18581598

    申请日：2024-02-20

    Applicant: Applied Materials, Inc.

    Inventor： Srinivas Gandikota ,  Steven C. H. Hung ,  Srinivas D. Nemani ,  Yixiong Yang ,  Susmit Singha Roy ,  Nikolaos Bekiaris

    IPC: H01L21/768 ,  H01L23/48

    Abstract: A method of forming an electronic device is disclosed. The method comprises forming depositing a metal on a substrate, the metal comprising one or more of copper (Cu), titanium (Ti), or tantalum (Ta). A metal cap is deposited on the metal. The metal cap comprises one or more of molybdenum (Mo), ruthenium (Ru), iridium (Ir), rhodium (Rh), palladium (Pd), silver (Ag), osmium (Os), platinum (Pt), or gold (Au). The substrate is then exposed to an anneal process, e.g., a hydrogen high-pressure anneal. The formation of the metal cap on the metal minimizes parasitic adsorption of hydrogen by the underlying metal.

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