公开(公告)号：US20100263913A1

公开(公告)日：2010-10-21

申请号：US12424001

申请日：2009-04-15

Applicant: Timothy H. Daubenspeck ,  Wolfgang Sauter ,  Timothy D. Sullivan ,  Steven L. Wright ,  Edmund Sprogis

Inventor： Timothy H. Daubenspeck ,  Wolfgang Sauter ,  Timothy D. Sullivan ,  Steven L. Wright ,  Edmund Sprogis

IPC: H05K1/00

CPC classification number: H01L24/03 ,  H01L23/5226 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/036 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05006 ,  H01L2224/05022 ,  H01L2224/05094 ,  H01L2224/05095 ,  H01L2224/05098 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/11334 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01059 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2224/05552

Abstract: In one embodiment, a sub-pad assembly of metal structures is located directly underneath a metal pad. The sub-pad assembly includes an upper level metal line structure abutting the metal pad, a lower level metal line structure located underneath the upper level metal line structure, and a set of metal vias that provide electrical connection between the lower level metal line structure located underneath the upper level metal line structure. In another embodiment, the reliability of a C4 ball is enhanced by employing a metal pad structure having a set of integrated metal vias that are segmented and distributed to facilitate uniform current density distribution within the C4 ball. The area1 density of the cross-sectional area in the plurality of metal vias is higher at the center portion of the metal pad than at the peripheral portion of the planar portion of the metal pad.

Abstract translation: 在一个实施例中，金属结构的子垫组件位于金属垫的正下方。 子焊盘组件包括邻接金属焊盘的上层金属线结构，位于上层金属线结构下方的下层金属线结构，以及一组在下层金属线结构之间提供电连接的金属通孔 在上层金属线结构下方。 在另一个实施例中，C4球的可靠性通过使用具有一组集成金属通孔的金属焊盘结构而被增强，所述集成金属通孔被分段和分配以便于在C4球内均匀的电流密度分布。 多个金属通孔中的截面积的面积1密度在金属垫的中心部分比在金属垫的平面部分的周边部分高。

公开(公告)号：US20100258335A1

公开(公告)日：2010-10-14

申请号：US12421723

申请日：2009-04-10

Applicant: Charles L. Arvin ,  Raschid J. Bezama ,  Harry D. Cox ,  Timothy H. Daubenspeck ,  Krystyna W. Semkow ,  Timothy D. Sullivan

Inventor： Charles L. Arvin ,  Raschid J. Bezama ,  Harry D. Cox ,  Timothy H. Daubenspeck ,  Krystyna W. Semkow ,  Timothy D. Sullivan

IPC: H01B5/00 ,  C25D5/14

CPC classification number: H01L24/05 ,  C25D5/02 ,  C25D5/14 ,  C25D5/48 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/05075 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13099 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/013 ,  H01L2924/01027

Abstract: Interconnect structures and methods of fabricating the same are provided. The interconnect structures provide highly reliable copper interconnect structures for improving current carrying capabilities (e.g., current spreading). The structure includes an under bump metallurgy formed in a trench. The under bump metallurgy includes at least: an adhesion layer; a plated barrier layer; and a plated conductive metal layer provided between the adhesion layer and the plated barrier layer. The structure further includes a solder bump formed on the under bump metallurgy.

Abstract translation: 提供互连结构及其制造方法。 互连结构提供用于改善载流能力（例如，电流扩展）的高可靠性铜互连结构。 该结构包括在沟槽中形成的凸块下金属。 凸起下冶金至少包括：粘合层; 电镀阻挡层; 以及设置在粘合层和镀层阻挡层之间的镀覆导电金属层。 该结构还包括形成在凸块下金属上的焊料凸块。

公开(公告)号：US07649262B2

公开(公告)日：2010-01-19

申请号：US12537328

申请日：2009-08-07

Applicant: Jonathan D. Chapple-Sokol ,  Terence B. Hook ,  Baozhen Li ,  Thomas L. McDevitt ,  Christopher A. Ponsolle ,  Bette B. Reuter ,  Timothy D. Sullivan ,  Jeffrey S. Zimmerman

Inventor： Jonathan D. Chapple-Sokol ,  Terence B. Hook ,  Baozhen Li ,  Thomas L. McDevitt ,  Christopher A. Ponsolle ,  Bette B. Reuter ,  Timothy D. Sullivan ,  Jeffrey S. Zimmerman

IPC: H01L23/48

CPC classification number: H01L21/7684 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A structure for suppressing localized metal precipitate formation (LMPF) in semiconductor processing. For each metal wire that is exposed to the manufacturing environment and is electrically coupled to an N region, at least one P+ region is formed electrically coupled to the same metal wire. As a result, few excess electrons are available to combine with metal ions to form localized metal precipitate at the metal wire. A monitoring ramp terminal can be formed around and electrically disconnected from the metal wire. By applying a voltage difference to the metal wire and the monitoring ramp terminal and measuring the resulting current flowing through the metal wire and the monitoring ramp terminal, it can be determined whether localized metal precipitate is formed at the metal wire.

Abstract translation: 用于抑制半导体处理中的局部金属沉淀形成（LMPF）的结构。 对于暴露于制造环境并且电耦合到N区域的每个金属线，至少一个P +区形成为电耦合到相同的金属线。 结果，几乎没有多余的电子可用于与金属离子结合以在金属线上形成局部金属沉淀。 可以在金属线周围形成监测斜坡端子并与金属线电断开。 通过向金属线和监视斜坡端子施加电压差并测量流过金属线和监视斜坡端子的所得电流，可以确定在金属线处是否形成了局部金属沉淀物。

公开(公告)号：US20090294968A1

公开(公告)日：2009-12-03

申请号：US12537328

申请日：2009-08-07

Applicant: Jonathan D. Chapple-Sokol ,  Terence B. Hook ,  Baozhen Li ,  Thomas L. McDevitt ,  Christopher A. Ponsolle ,  Bette B. Reuter ,  Timothy D. Sullivan ,  Jeffrey S. Zimmerman

Inventor： Jonathan D. Chapple-Sokol ,  Terence B. Hook ,  Baozhen Li ,  Thomas L. McDevitt ,  Christopher A. Ponsolle ,  Bette B. Reuter ,  Timothy D. Sullivan ,  Jeffrey S. Zimmerman

IPC: H01L23/532

CPC classification number: H01L21/7684 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A structure for suppressing localized metal precipitate formation (LMPF) in semiconductor processing. For each metal wire that is exposed to the manufacturing environment and is electrically coupled to an N region, at least one P+ region is formed electrically coupled to the same metal wire. As a result, few excess electrons are available to combine with metal ions to form localized metal precipitate at the metal wire. A monitoring ramp terminal can be formed around and electrically disconnected from the metal wire. By applying a voltage difference to the metal wire and the monitoring ramp terminal and measuring the resulting current flowing through the metal wire and the monitoring ramp terminal, it can be determined whether localized metal precipitate is formed at the metal wire.

Abstract translation: 用于抑制半导体处理中的局部金属沉淀形成（LMPF）的结构。 对于暴露于制造环境并且电耦合到N区域的每个金属线，至少一个P +区形成为电耦合到相同的金属线。 结果，几乎没有多余的电子可用于与金属离子结合以在金属线上形成局部金属沉淀。 可以在金属线周围形成监测斜坡端子并与金属线电断开。 通过向金属线和监视斜坡端子施加电压差并测量流过金属线和监视斜坡端子的所得电流，可以确定在金属线处是否形成了局部金属沉淀物。

公开(公告)号：US20090250622A1

公开(公告)日：2009-10-08

申请号：US12099307

申请日：2008-04-08

Applicant: Ethan H. CANNON ,  Michael J. Hauser ,  Timothy D. Sullivan

Inventor： Ethan H. CANNON ,  Michael J. Hauser ,  Timothy D. Sullivan

IPC: G01T1/24

CPC classification number: H01L31/115

Abstract: The invention relates to a design structure, and more particularly, to a design structure for an alpha particle sensor in SOI technology and a circuit thereof. The structure is a silicon-on-insulator radiation detector which includes: a charge collection node; a precharge transistor that has a source from the charge collection node, a drain at Vdd, and a gate controlled by a precharge signal; an access transistor that has a source from the charge collection node, a drain connecting to a readout node, and a gate controlled by a read-out signal; and a detector pulldown transistor having a drain from the charge collection node, a source to ground, and a grounded gate.

Abstract translation: 本发明涉及一种设计结构，更具体地说，涉及SOI技术中的α粒子传感器及其电路的设计结构。 该结构是绝缘体上硅辐射检测器，其包括：电荷收集节点; 具有来自电荷收集节点的源极，Vdd处的漏极以及由预充电信号控制的栅极的预充电晶体管; 具有来自电荷收集节点的源极，与读出节点连接的漏极和由读出信号控制的栅极的存取晶体管; 以及检测器下拉晶体管，其具有来自电荷收集节点的漏极，源极接地和接地栅极。

公开(公告)号：US20090179689A1

公开(公告)日：2009-07-16

申请号：US11971937

申请日：2008-01-10

Applicant: Ronald J. Bolam ,  Tom C. Lee ,  Timothy D. Sullivan

Inventor： Ronald J. Bolam ,  Tom C. Lee ,  Timothy D. Sullivan

IPC: H03K3/42 ,  H01L21/00

CPC classification number: H01L23/345 ,  H01L22/14 ,  H01L22/20 ,  H01L23/5228 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Disclosed are embodiments of a semiconductor chip structure and a method that incorporate a localized, on-chip, repair scheme for devices that exhibit performance degradation as a result of negative bias temperature instability (NBTI). The repair scheme utilizes a heating element above each device. The heating element is configured so that it can receive transmission line pulses and, thereby generate enough heat to raise the adjacent device to a temperature sufficient to allow for performance recovery. Specifically, high temperatures (e.g., between approximately 300-400° C. or greater) in the absence of bias can accelerate the recovery process to a matter of seconds as opposed to days or months. The heating element can be activated, for example, on demand, according to a pre-set service schedule, and/or in response to feedback from a device performance monitor.

Abstract translation: 公开了半导体芯片结构的实施例和一种对于由于负偏压温度不稳定性（NBTI）而表现出性能劣化的器件而并入局部的片上修复方案的方法。 修理方案在每个设备上使用加热元件。 加热元件被配置成使得其可以接收传输线脉冲，并且由此产生足够的热量以将相邻设备升高到足以允许性能恢复的温度。 具体而言，在不存在偏压的情况下，高温（例如，约300-400℃或更高）可以将恢复过程加速到几秒钟，而不是几天或几个月。 加热元件例如可以根据预先设定的服务时间表和/或响应于来自设备性能监视器的反馈而被激活。

公开(公告)号：US07397260B2

公开(公告)日：2008-07-08

申请号：US11163948

申请日：2005-11-04

Applicant: Kaushik Chanda ,  Birendra Agarwala ,  Lawrence A. Clevenger ,  Andrew P. Cowley ,  Ronald G. Filippi ,  Jason P. Gill ,  Tom C. Lee ,  Baozhen Li ,  Paul S. McLaughlin ,  Du B. Nguyen ,  Hazara S. Rathore ,  Timothy D. Sullivan ,  Chih-Chao Yang

Inventor： Kaushik Chanda ,  Birendra Agarwala ,  Lawrence A. Clevenger ,  Andrew P. Cowley ,  Ronald G. Filippi ,  Jason P. Gill ,  Tom C. Lee ,  Baozhen Li ,  Paul S. McLaughlin ,  Du B. Nguyen ,  Hazara S. Rathore ,  Timothy D. Sullivan ,  Chih-Chao Yang

IPC: G01R31/02 ,  H01L23/58 ,  G01N25/20

CPC classification number: G01R31/2858 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A microelectronic element such as a chip or microelectronic wiring substrate is provided which includes a plurality of conductive interconnects for improved resistance to thermal stress. At least some of the conductive interconnects include a metallic plate, a metallic connecting line and an upper metallic via. The metallic connecting line has an upper surface at least substantially level with an upper surface of the metallic plate, an inner end connected to the metallic plate at one of the peripheral edges, and an outer end horizontally displaced from the one peripheral edge. The metallic connecting line has a width much smaller than the width of the one peripheral edge of the metallic plate and has length greater than the width of the one peripheral edge. The upper metallic via has a bottom end in contact with the metallic connecting line at a location that is horizontally displaced from the one peripheral edge by at least about 3 microns (μm).

Abstract translation: 提供了诸如芯片或微电子布线基板的微电子元件，其包括用于改善耐热应力的多个导电互连。 至少一些导电互连件包括金属板，金属连接线和上金属通孔。 所述金属连接线具有与所述金属板的上表面至少基本平齐的上表面，在所述周边边缘中的一个处连接到所述金属板的内端和从所述一个周边边缘水平移位的外端。 金属连接线的宽度远小于金属板的一个周边边缘的宽度，并且其长度大于一个周边边缘的宽度。 上金属通孔在与一个外围边缘水平位移至少约3微米（mum）的位置处具有与金属连接线接触的底端。

公开(公告)号：US07224063B2

公开(公告)日：2007-05-29

申请号：US09871883

申请日：2001-06-01

Applicant: Birendra N. Agarwala ,  Eric M. Coker ,  Anthony Correale, Jr. ,  Hazara S. Rathore ,  Timothy D. Sullivan ,  Richard A. Wachnik

Inventor： Birendra N. Agarwala ,  Eric M. Coker ,  Anthony Correale, Jr. ,  Hazara S. Rathore ,  Timothy D. Sullivan ,  Richard A. Wachnik

IPC: H01L23/52

CPC classification number: H01L21/76852 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An interconnect structure, comprising: a lower level wire having a side and a bottom, the lower level wire comprising: a lower core conductor and a lower conductive liner, the lower conductive liner on the side and the bottom of the lower level wire; an upper level wire having a side and a bottom, the upper level wire comprising an upper core conductor and an upper conductive liner, the upper conductive liner on the side and the bottom of the upper level wire; and the upper conductive liner in contact with the lower core conductor and also in contact with the lower conductive liner in a liner-to-liner contact region.

Abstract translation: 一种互连结构，包括：具有侧面和底部的下层导线，所述下层导线包括：下芯导体和下导电衬垫，所述下层导线的侧面和底部上的下导电衬垫; 具有侧面和底部的上部电线，所述上部电线包括上部芯导体和上部导电衬垫，所述上部导电衬垫位于所述上部电线的侧面和底部; 并且上导电衬套与下芯体导体接触并且还与衬套到衬垫接触区域中的下导电衬套接触。

公开(公告)号：US07212091B2

公开(公告)日：2007-05-01

申请号：US11053732

申请日：2005-02-08

Applicant: Panayotis Constantinou Andricacos ,  L. Paivikki Buchwalter ,  Hariklia Deligianni ,  Robert A. Groves ,  Christopher Jahnes ,  Jennifer L. Lund ,  Michael Meixner ,  David Earle Seeger ,  Timothy D. Sullivan ,  Ping-Chuan Wang

Inventor： Panayotis Constantinou Andricacos ,  L. Paivikki Buchwalter ,  Hariklia Deligianni ,  Robert A. Groves ,  Christopher Jahnes ,  Jennifer L. Lund ,  Michael Meixner ,  David Earle Seeger ,  Timothy D. Sullivan ,  Ping-Chuan Wang

IPC: H01H51/22

CPC classification number: H01H59/0009 ,  H01H2001/0078

Abstract: A microelectromechanical switch including: at least one pair of actuator electrodes; at least one input electrode and at least one output electrode for input and output, respectively, of a radio frequency signal; and a beam movable by an attraction between the at least one pair of actuator electrodes, the movable beam having at least a portion electrically connected to the at least one input electrode and to the at least one output electrode when moved by the attraction between the at least one pair of actuator electrodes to make an electrical connection between the at least one input and output electrodes; wherein the at least one pair of actuator electrodes are electrically isolated from each of the at least one input and output electrodes. The microelectromechanical switch can be configured in single or multiple-poles and/or single or multiple throws.

Abstract translation: 一种微机电开关，包括：至少一对致动器电极; 分别输入和输出射频信号的至少一个输入电极和至少一个输出电极; 以及可由所述至少一对致动器电极之间的吸引部移动的光束，所述可移动光束具有至少一部分电连接到所述至少一个输入电极，并且当所述至少一个输入电极在所述至少一个输入电极之间被所述吸引力移动时， 至少一对致动器电极，用于在所述至少一个输入和输出电极之间形成电连接; 其中所述至少一对致动器电极与所述至少一个输入和输出电极中的每一个电隔离。 微机电开关可以配置为单极或多极和/或单掷或多掷。

公开(公告)号：US07084483B2

公开(公告)日：2006-08-01

申请号：US10709727

申请日：2004-05-25

Applicant: John M. Aitken ,  Fen Chen ,  Timothy D. Sullivan

Inventor： John M. Aitken ,  Fen Chen ,  Timothy D. Sullivan

IPC: H01L29/00

CPC classification number: H01L28/20 ,  H01L27/101

Abstract: An on-chip, ultra-compact, and programmable semiconductor resistor device and device structure and a method of fabrication. Each semiconductor resistor device structure is formed of one or more conductively connected buried trench type resistor elements exhibiting a precise resistor value. At least two semiconductor resistor device structures may be connected in series or in parallel configuration through the intermediary of one or more fuse devices that may be blown to achieve a desired total resistance value.