公开(公告)号：US20050240913A1

公开(公告)日：2005-10-27

申请号：US11107446

申请日：2005-04-15

Applicant: Mark Liu ,  Chun-Hung Lin

Inventor： Mark Liu ,  Chun-Hung Lin

IPC: G06F9/45

CPC classification number: G06Q10/06

Abstract: A method of generating organizational structure and a method of controlling authorization thereof are provided. The method separates an organization into a plurality of nodes and links, and defines attributes for nodes and links, so as to describe the details of nodes and links, respectively. In case an attribute of some node (link) needs to be modified, the whole organizational structure is automatically modified by only modifying the node (link) attribute without having to sequentially change all attributes.

Abstract translation: 提供了一种生成组织结构的方法和一种控制其授权的方法。 该方法将组织分为多个节点和链路，并定义节点和链路的属性，以分别描述节点和链路的细节。 如果需要修改某个节点（链接）的属性，则只需修改节点（链接）属性即可自动修改整个组织结构，而不必依次更改所有属性。

公开(公告)号：US06319754B1

公开(公告)日：2001-11-20

申请号：US09613553

申请日：2000-07-10

Applicant: How-Shin Wang ,  Chun-Hung Lin

Inventor： How-Shin Wang ,  Chun-Hung Lin

IPC: H01L2150

CPC classification number: H01L21/6835 ,  H01L21/67132 ,  H01L21/6836 ,  H01L21/78 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L2221/68322 ,  H01L2221/68327 ,  H01L2224/274 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/07802

Abstract: A wafer-dicing process includes the steps of attaching the wafer to a wafer mounting sheet which includes a bonding adhesive layer, a releasable film layer, a resilient substrate layer, and a light-curable adhesive layer, laying assembly of the wafer and the wafer mounting sheet on a wafer carrier sheet, exposing assembly of the wafer, the wafer mounting sheet and the wafer carrier sheet to cure the light-curable adhesive layer, cutting the wafer to form bare dice, sucking one of the dice and pushing upwardly the carrier sheet, and moving and mounting the die to a die mounting substrate.

Abstract translation: 晶片切割工艺包括以下步骤：将晶片连接到晶片安装片上，该晶片安装片包括粘合粘合剂层，可剥离膜层，弹性基底层和可光固化粘合剂层，晶片和晶片的铺设组件 安装片在晶片载体片上，暴露晶片，晶片安装片和晶片载体片的组件以固化可光固化粘合剂层，切割晶片以形成裸裸片，吸取骰子中的一个并向上推动载体 片，并将模具移动并安装到管芯安装基板。

公开(公告)号：US5956473A

公开(公告)日：1999-09-21

申请号：US755194

申请日：1996-11-25

Applicant: Chung-Wen Ma ,  Chun-Hung Lin ,  Tai-Yao Lee ,  Li-Jen Lee ,  Ju-Xu Lee ,  Ting-Chung Hu

Inventor： Chung-Wen Ma ,  Chun-Hung Lin ,  Tai-Yao Lee ,  Li-Jen Lee ,  Ju-Xu Lee ,  Ting-Chung Hu

IPC: G06F3/06 ,  G06F11/10 ,  G06F12/02 ,  G11C16/34 ,  G11C29/00 ,  G11C13/00

CPC classification number: G11C29/765 ,  G06F11/1068 ,  G06F12/0246 ,  G06F3/0616 ,  G06F3/0652 ,  G06F3/0679 ,  G11C16/349 ,  G11C16/3495 ,  G06F2212/1036 ,  G06F2212/7211

Abstract: The present application discloses methods to provide defect management, wear leveling and data security to a mass storage system implemented using flash memory. The flash memory is organized into a plurality of blocks. Each block has a special region for storing its attributes. In defect management, defects arising from manufacturing and on-the-fly defects are scanned. Defective blocks are marked by altering its attributes. The present application also discloses a wear leveling method in which the difference between the number of erasures of any two blocks (except the defective blocks) is within a predetermined value. The present application further discloses a new error detection and correction method. The same data is stored in two separate memory locations. The content of these two locations are later "ored" or "anded" together (depending on the nature of error giving rise to the error) to recover the correct data.

Abstract translation: 本申请公开了向使用闪存实现的大容量存储系统提供缺陷管理，磨损均衡和数据安全性的方法。 闪存被组织成多个块。 每个块都有一个用于存储其属性的特殊区域。 在缺陷管理中，扫描了由制造和飞行缺陷引起的缺陷。 有缺陷的块通过改变其属性来标记。 本申请还公开了一种磨损均衡方法，其中任何两个块（除了缺陷块之外）的擦除次数之间的差异在预定值内。 本申请还公开了一种新的错误检测和校正方法。 相同的数据存储在两个单独的存储器位置。 这两个位置的内容随后“一起”或“并入”（取决于引起错误的错误的性质）来恢复正确的数据。

公开(公告)号：US5745418A

公开(公告)日：1998-04-28

申请号：US756304

申请日：1996-11-25

Applicant: Chung-Wen Ma ,  Chun-Hung Lin ,  Tai-Yao Lee ,  Li-Jen Lee ,  Ju-Xu Lee ,  Ting-Chung Hu

Inventor： Chung-Wen Ma ,  Chun-Hung Lin ,  Tai-Yao Lee ,  Li-Jen Lee ,  Ju-Xu Lee ,  Ting-Chung Hu

IPC: G06F3/06 ,  G06F12/00 ,  G06F12/02 ,  G11C13/00

CPC classification number: G06F3/0616 ,  G06F12/0246 ,  G06F3/0656 ,  G06F3/0679 ,  G06F2212/7203

Abstract: An architecture for a mass storage system using flash memory is described. This architecture involves organizing the flash memory into a plurality of blocks. These blocks are then divided into several categories. One of the categories is a working category used to store data organized in accordance with a pre-defined addressing scheme (such as the logical block address used in Microsoft's operating system). The other category is a temporary buffer used to store data intended to be written to one of the working blocks. Another category contains blocks that need to be erased. When data is written into the mass storage system, a block in the second category is allocated from a block in the third category. The allocated block will then be changed to a block in the first category when writing to the allocated block is completed. The correspond block in the first category is placed into the third category. As a result, blocks can be recycled. Consequently, there is a constant supply of blocks in the second category. In another embodiment of the present invention, a new category is developed to handle random writing to the working blocks.

公开(公告)号：US09282592B2

公开(公告)日：2016-03-08

申请号：US12686276

申请日：2010-01-12

Applicant: Jui-Chun Peng ,  Jacky Chung ,  Heng-Hsin Liu ,  Chun-Hung Lin

Inventor： Jui-Chun Peng ,  Jacky Chung ,  Heng-Hsin Liu ,  Chun-Hung Lin

IPC: H05B3/68 ,  H01L21/67 ,  H01L21/68 ,  H05B3/14 ,  H05B1/02

CPC classification number: H05B3/143 ,  H01L21/67098 ,  H01L21/67103 ,  H01L21/67115 ,  H01L21/67132 ,  H01L21/67259 ,  H01L21/681 ,  H05B1/0233 ,  H05B3/148 ,  H05B3/68

Abstract: An apparatus for selectively heating/cooling one or more substrates and establishing an approximately uniform temperature in the one or more substrates during a heating or cooling event is described. In one embodiment, the apparatus comprises a rotatable hot/cold plate onto which the one or more substrates are placed and a heating/cooling element disposed in close proximity to the rotatable hot/cold plate for selectively elevating/lowering the temperature of the one or more substrates.

Abstract translation: 描述了一种用于在加热或冷却事件期间选择性地加热/冷却一个或多个基底并且在一个或多个基底中建立大致均匀的温度的装置。 在一个实施例中，该设备包括一个可旋转的热/冷板，一个或多个基板被放置在该可旋转的热/冷板上，以及靠近可旋转的热/冷板设置的加热/冷却元件，用于选择性地升高/降低一个或多个 更多的底物。

公开(公告)号：US09159686B2

公开(公告)日：2015-10-13

申请号：US13443556

申请日：2012-04-10

Applicant: Yu-Feng Chen ,  Chun-Hung Lin ,  Han-Ping Pu ,  Chih-Hang Tung ,  Kai-Chiang Wu ,  Ming-Che Ho

Inventor： Yu-Feng Chen ,  Chun-Hung Lin ,  Han-Ping Pu ,  Chih-Hang Tung ,  Kai-Chiang Wu ,  Ming-Che Ho

IPC: H01L23/00 ,  H01L23/488

CPC classification number: H01L24/13 ,  H01L23/488 ,  H01L24/02 ,  H01L24/05 ,  H01L24/10 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05111 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05551 ,  H01L2224/05555 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05686 ,  H01L2224/10125 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13012 ,  H01L2224/13076 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/12042 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01047 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A semiconductor die includes a crack stopper on an under-bump metallization (UBM) layer. The crack stopper is in the shape of hollow cylinder with at least two openings.

Abstract translation: 半导体管芯包括在凸块下金属化（UBM）层上的裂纹阻挡层。 裂缝止动器为具有至少两个开口的中空圆筒形状。

公开(公告)号：US08785402B2

公开(公告)日：2014-07-22

申请号：US12806084

申请日：2010-08-02

Applicant: Chun-Hung Lin ,  Ta-Wei Liu

Inventor： Chun-Hung Lin ,  Ta-Wei Liu

IPC: A01N43/04 ,  A61K31/70 ,  A01N43/40 ,  A61K31/445 ,  C07D211/00 ,  C12N9/99

CPC classification number: G01N33/56922 ,  A61K31/4412 ,  C12Q1/34 ,  G01N2333/924

Abstract: Methods of diagnosing Helicobacter pylori infection or associated conditions are based in part on the correlation of the presence of a α-L-fucosidase 2 marker with the infection. Methods and compositions for treating or preventing Helicobacter pylori infection or associated conditions are based in part on administering an α-L-fucosidase 2 inhibitor to an infected subject or a subject at risk of developing the infection.

Abstract translation: 诊断幽门螺杆菌感染或相关病症的方法部分基于α-L-岩藻糖苷酶2标记物与感染的相关性。 用于治疗或预防幽门螺杆菌感染或相关病症的方法和组合物部分地基于向被感染的受试者或患有发展感染风险的受试者施用α-L-岩藻糖苷酶2抑制剂。

公开(公告)号：US20130119532A1

公开(公告)日：2013-05-16

申请号：US13294859

申请日：2011-11-11

Applicant: Chun-Hung Lin ,  Yu-Feng Chen ,  Tsung-Shu Lin ,  Han-Ping Pu ,  Hsien-Wei Chen

Inventor： Chun-Hung Lin ,  Yu-Feng Chen ,  Tsung-Shu Lin ,  Han-Ping Pu ,  Hsien-Wei Chen

IPC: H01L23/485

CPC classification number: H01L24/14 ,  H01L23/3114 ,  H01L23/3171 ,  H01L23/525 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/0233 ,  H01L2224/02331 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05018 ,  H01L2224/05024 ,  H01L2224/0508 ,  H01L2224/05085 ,  H01L2224/05558 ,  H01L2224/05569 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13111 ,  H01L2224/1403 ,  H01L2224/14131 ,  H01L2224/14135 ,  H01L2224/14136 ,  H01L2224/14179 ,  H01L2224/16225 ,  H01L2224/17051 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2224/05552

Abstract: A chip scale semiconductor device comprises a semiconductor die, a first bump and a second bump. The first bump having a first diameter and a first height is formed on an outer region of the semiconductor die. A second bump having a second diameter and a second height is formed on an inner region of the semiconductor die. The second diameter is greater than the first diameter while the second height is the same as the first height. By changing the shape of the bump, the stress and strain can be redistributed through the bump. As a result, the thermal cycling reliability of the chip scale semiconductor device is improved.

Abstract translation: 芯片级半导体器件包括半导体管芯，第一突起和第二突起。 具有第一直径和第一高度的第一凸块形成在半导体管芯的外部区域上。 具有第二直径和第二高度的第二凸起形成在半导体管芯的内部区域上。 第二直径大于第一直径，而第二高度与第一高度相同。 通过改变凸块的形状，应力和应变可通过凸块重新分布。 结果，提高了芯片级半导体器件的热循环可靠性。

公开(公告)号：US20120264063A1

公开(公告)日：2012-10-18

申请号：US13086935

申请日：2011-04-14

Applicant: Chih-Jen Yu ,  Chun-Hung Lin ,  Juin-Hung Lin ,  Hsueh-Yi Chung ,  Li-Kong Turn ,  Keh-Wen Chang

Inventor： Chih-Jen Yu ,  Chun-Hung Lin ,  Juin-Hung Lin ,  Hsueh-Yi Chung ,  Li-Kong Turn ,  Keh-Wen Chang

IPC: G03F7/20 ,  G06F17/50

CPC classification number: G06F17/50 ,  G03F7/705 ,  G03F7/70558 ,  G03F7/70625

Abstract: A method including providing a present wafer to be processed by a photolithography tool, selecting a processed wafer having a past chip design from a plurality of processed wafers, the processed wafer being previously processed by the photolithography tool, selecting a plurality of critical dimension (CD) data points extracted from a plurality of fields on the processed wafer, modeling the plurality of CD data points with a function relating CD to position on the processed wafer, creating a field layout on the present wafer for a new chip design, creating an initial exposure dose map for the new chip design using the function and the field layout, and controlling the exposure of the photolithography tool according to the initial exposure dose map to form the new chip design on the present wafer.

Abstract translation: 一种方法，包括提供将由光刻工具处理的当前晶片，从多个经处理的晶片中选择具有过去芯片设计的处理晶片，处理的晶片由光刻工具预先处理，选择多个临界尺寸（CD ）数据点，其处理晶片上的多个场中提取的数据点，以与CD相关的功能对处理的晶片上的位置对多个CD数据点进行建模，在当前晶片上创建用于新芯片设计的场布局， 使用功能和现场布局的新芯片设计的曝光剂量图，并根据初始曝光剂量图控制光刻工具的曝光，以在当前晶片上形成新的芯片设计。

公开(公告)号：US08200431B2

公开(公告)日：2012-06-12

申请号：US12490340

申请日：2009-06-24

Applicant: Chun-Hung Lin

Inventor： Chun-Hung Lin

IPC: G01C21/36

CPC classification number: G01C21/32

Abstract: A navigation system includes a plurality of navigation devices and a server. The plurality of navigation devices is used for generating a plurality of position data respectively. Each navigation device generates at least one path data according to the plurality of position data and at least one corresponding electronic map and transmits the path data to the server. Then, the server calculates at least one optimum path data and updates the plurality of navigation devices according to the optimum path data.

Abstract translation: 导航系统包括多个导航装置和服务器。 多个导航装置分别用于产生多个位置数据。 每个导航装置根据多个位置数据和至少一个对应的电子地图生成至少一个路径数据，并将路径数据发送到服务器。 然后，服务器计算至少一个最优路径数据，并根据最佳路径数据更新多个导航装置。