公开(公告)号：US20060055035A1

公开(公告)日：2006-03-16

申请号：US10938594

申请日：2004-09-13

Applicant: Tzu-Han Lin ,  Huei-Mei Yu ,  Chia-Jen Cheng ,  Chun-Yen Lo ,  Li-Hsin Tseng ,  Boe Su ,  Simon Lu

Inventor： Tzu-Han Lin ,  Huei-Mei Yu ,  Chia-Jen Cheng ,  Chun-Yen Lo ,  Li-Hsin Tseng ,  Boe Su ,  Simon Lu

IPC: H01L23/48

CPC classification number: H01L24/13 ,  H01L24/05 ,  H01L2224/02125 ,  H01L2224/05001 ,  H01L2224/05007 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05562 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/056 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: Solder bump structures for semiconductor device packaging is provided. In one embodiment, a solder bump structure comprises a semiconductor substrate, the substrate has at least one contact pad and an upper passivation layer having at least one opening formed therein exposing a portion of the contact pad. At least one patterned and etched polymer layer is formed on a portion of the contact pad. At least one patterned and etched conductive metal layer is formed above the polymer layer and is aligned therewith. And at least one layer of solder material having a solder height is provided above the conductive metal layer, the layer of solder is aligned with the conductive metal layer, the layer of solder is thereafter reflown thereby creating a solder ball.

Abstract translation: 提供了用于半导体器件封装的焊接凸块结构。 在一个实施例中，焊料凸块结构包括半导体衬底，所述衬底具有至少一个接触焊盘和具有形成在其中的至少一个开口的上钝化层，其暴露接触焊盘的一部分。 在接触垫的一部分上形成至少一个图案化和蚀刻的聚合物层。 在聚合物层之上形成至少一个图案化和蚀刻的导电金属层并与其对准。 并且在导电金属层的上方设置至少一层具有焊料高度的焊料材料，该焊料层与导电金属层对准，此后焊料层被回流，从而形成焊球。

公开(公告)号：US20060046434A1

公开(公告)日：2006-03-02

申请号：US10926764

申请日：2004-08-26

Applicant: Boe Su ,  H.M. Yu ,  Chia-Jen Cheng ,  Tzu-Han Lin ,  Kuo-Wei Lin

Inventor： Boe Su ,  H.M. Yu ,  Chia-Jen Cheng ,  Tzu-Han Lin ,  Kuo-Wei Lin

IPC: H01L21/78 ,  H01L21/44 ,  H01L21/302

CPC classification number: H01L21/02076 ,  H01L21/78 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05568 ,  H01L2224/05655 ,  H01L2224/1147 ,  H01L2224/11502 ,  H01L2224/11849 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2224/13099

Abstract: A method for preventing lead precipitation during wafer processing is disclosed. The method includes singulating a semiconductor wafer having a plurality of solder bumps and applying cold deionized (DI) water to the semiconductor wafer during singulation. Application of the cold DI water reduces or prevents lead precipitation during the singulation process, and thereby reduces the presence of bump oxidation.

Abstract translation: 公开了一种在晶片加工过程中防止铅析出的方法。 该方法包括在分割期间单片化具有多个焊料凸块的半导体晶片并将冷去离子（DI）水施加到半导体晶片。 冷去离子水的应用减少或防止在分离过程中的铅沉淀，从而减少凸起氧化的存在。

公开(公告)号：US20080251916A1

公开(公告)日：2008-10-16

申请号：US11734483

申请日：2007-04-12

Applicant: CHIU SUNG CHENG ,  HSIU-MEI YU ,  CHIA-JEN CHENG ,  C.T. CHUANG ,  CHUN-YEN LO ,  LI-HSIN TSENG

Inventor： CHIU SUNG CHENG ,  HSIU-MEI YU ,  CHIA-JEN CHENG ,  C.T. CHUANG ,  CHUN-YEN LO ,  LI-HSIN TSENG

IPC: H01L23/488 ,  H01L21/44

CPC classification number: H01L24/13 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05572 ,  H01L2224/05655 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/115 ,  H01L2224/11502 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13023 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2224/1146

Abstract: A novel UBM structure for improving the strength and performance of individual UBM layers in a UBM structure is disclosed. In one aspect, a UBM structure for disposal onto an electrically conductive element comprised of aluminum is disclosed. In one embodiment, the UBM structure comprises a tantalum layer disposed over the aluminum electrically conductive element, and a copper layer disposed over the tantalum layer, where the UBM structure is configured to receive a solder ball thereon.

Abstract translation: 公开了一种用于提高UBM结构中单个UBM层的强度和性能的新型UBM结构。 一方面，公开了一种用于处理在由铝构成的导电元件上的UBM结构。 在一个实施例中，UBM结构包括设置在铝导电元件上的钽层和设置在钽层上的铜层，其中UBM结构被配置为在其上接收焊球。

公开(公告)号：US20080044756A1

公开(公告)日：2008-02-21

申请号：US11465375

申请日：2006-08-17

Applicant: Chih-Min Tseng ,  Hsiu-Mei Yu ,  Wen-Hsiang Tseng ,  Chia-Jen Cheng ,  Y. L. Feng ,  Tung-Wen Hsieh

Inventor： Chih-Min Tseng ,  Hsiu-Mei Yu ,  Wen-Hsiang Tseng ,  Chia-Jen Cheng ,  Y. L. Feng ,  Tung-Wen Hsieh

IPC: G03C11/12

CPC classification number: G03F7/422

Abstract: A method for removing dry film resist (DFR) from a fine pitch solder bump array on a semiconductor wafer provides for pre-soaking the wafer in a chemical bath then turbulently exposing the wafer to a chemical solution, both steps taking place in batch processing with the wafers processed in a vertical position. The wafers are then individually processed through a chemical spinning operation in which a chemical solution is dispensed from a spray nozzle while motion such as spinning is imparted the horizontally disposed wafer. The spin speed of the chemical spraying process may then be increased to accelerate physical removal of residue. Deionized water rinsing and spin-drying provide a solder bump array void of any DFR or other residuals.

Abstract translation: 从半导体晶片上的细间距焊料凸点阵列去除干膜抗蚀剂（DFR）的方法提供将晶片预浸在化学浴中，然后将晶片湍流地暴露于化学溶液，这两个步骤在批处理中发生， 晶片在垂直位置处理。 然后通过化学纺丝操作单独处理晶片，其中从喷雾喷嘴分配化学溶液，同时使诸如旋转的运动赋予水平设置的晶片。 然后可以增加化学喷涂过程的旋转速度以加速残留物的物理去除。 去离子水冲洗和旋转干燥提供无任何DFR或其他残留物的焊料凸块阵列。

公开(公告)号：US06541366B1

公开(公告)日：2003-04-01

申请号：US10043058

申请日：2002-01-08

Applicant: Shih-Ming Chin ,  Fang-Chuang Liu ,  Chia-Jen Cheng ,  Hsiu-Mei Yu

Inventor： Shih-Ming Chin ,  Fang-Chuang Liu ,  Chia-Jen Cheng ,  Hsiu-Mei Yu

IPC: H01L2144

CPC classification number: H01L24/81 ,  H01L24/02 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11502 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/14051 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/19042 ,  H01L2924/30107 ,  H01L2224/13099 ,  H01L2224/1146

Abstract: A method for improving an adhesion bond between a solder material and an under bump metallization (UBM) layer including providing at least two UBM layers overlying a chip bonding pad including an uppermost UBM layer forming a contact layer for forming a solder bump thereon; depositing a solder bump precursor material overlying the contact layer to form a solder column; exposing the sidewalls of the solder column to include the contact layer sidewalls; oxidizing the contact layer sidewalls to form a contact layer sidewall oxide at a temperature lower than the melting point of the solder bump precursor material; and forming a solder bump by reflowing the precursor material to wet the contact layer surface to exclude the contact layer sidewalls.

Abstract translation: 一种用于改善焊料材料和凸块下金属化（UBM）层之间的粘合粘合的方法，包括提供覆盖在包括形成用于在其上形成焊料凸块的接触层的最上层的UBM层的芯片焊盘上的至少两个UBM层; 沉积覆盖接触层的焊料凸起前体材料以形成焊料柱; 暴露焊料柱的侧壁以包括接触层侧壁; 氧化接触层侧壁以在低于焊料凸块前体材料的熔点的温度下形成接触层侧壁氧化物; 以及通过回流前体材料以润湿接触层表面以排除接触层侧壁而形成焊料凸块。

公开(公告)号：US08669658B2

公开(公告)日：2014-03-11

申请号：US11782384

申请日：2007-07-24

Applicant: Mon-Chin Tsai ,  Hsiu-Mei Yo ,  Chien-Min Lin ,  Chia-Jen Cheng ,  Li-Hsin Tseng

Inventor： Mon-Chin Tsai ,  Hsiu-Mei Yo ,  Chien-Min Lin ,  Chia-Jen Cheng ,  Li-Hsin Tseng

IPC: H01L23/48

CPC classification number: H01L23/66 ,  H01L23/3114 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05559 ,  H01L2224/05647 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/03 ,  H01L2924/01014 ,  H01L2924/00

Abstract: A structure, a system, and a method for manufacture of crosstalk-free wafer level chip scale packaging (WLCSP) structure for high frequency applications is provided. An illustrative embodiment comprises a substrate on which various layers and structures form circuitry, a signal pin formed on the substrate and coupled with the circuitry, a ground ring encircling the signal pin, and a grounded solder bump coupled to the ground ring.

Abstract translation: 提供了用于高频应用的用于制造无串扰晶片级芯片级封装（WLCSP）结构的结构，系统和方法。 示例性实施例包括其上各种层和结构形成电路的衬底，形成在衬底上并与电路耦合的信号引脚，环绕信号引脚的接地环和耦合到接地环的接地焊料凸块。

公开(公告)号：US20120306070A1

公开(公告)日：2012-12-06

申请号：US13152734

申请日：2011-06-03

Applicant: Ming-Chih Yew ,  Fu-Jen Li ,  Po-Yao Lin ,  Chia-Jen Cheng ,  Hsiu-Mei Yu

Inventor： Ming-Chih Yew ,  Fu-Jen Li ,  Po-Yao Lin ,  Chia-Jen Cheng ,  Hsiu-Mei Yu

IPC: H01L23/485

CPC classification number: H01L24/13 ,  H01L21/76885 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/82 ,  H01L2224/02235 ,  H01L2224/02255 ,  H01L2224/0235 ,  H01L2224/02375 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05541 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/10155 ,  H01L2224/13005 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13024 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/351 ,  H01L2924/35121 ,  H01L2924/207 ,  H01L2924/2076 ,  H01L2224/05552

Abstract: A system and method for providing a post-passivation and underbump metallization is provided. An embodiment comprises a post-passivation layer that is larger than an overlying underbump metallization. The post-passivation layer extending beyond the underbump metallization shields the underlying layers from stresses generated from mismatches of the materials' coefficient of thermal expansion.

Abstract translation: 提供了一种用于提供后钝化和欠掺杂金属化的系统和方法。 一个实施例包括大于上覆下凸点金属化的后钝化层。 延伸超过下凸块金属化的后钝化层屏蔽下层不受材料的热膨胀系数的不匹配产生的应力。

公开(公告)号：US07781140B2

公开(公告)日：2010-08-24

申请号：US11465375

申请日：2006-08-17

Applicant: Chih-Min Tseng ,  Hsiu-Mei Yu ,  Wen-Hsiang Tseng ,  Chia-Jen Cheng ,  Yu-Lung Feng ,  Tung-Wen Hsieh

Inventor： Chih-Min Tseng ,  Hsiu-Mei Yu ,  Wen-Hsiang Tseng ,  Chia-Jen Cheng ,  Yu-Lung Feng ,  Tung-Wen Hsieh

IPC: G03F7/42 ,  B08B3/08 ,  B08B3/10

CPC classification number: G03F7/422

Abstract: A method for removing dry film resist (DFR) from a fine pitch solder bump array on a semiconductor wafer provides for pre-soaking the wafer in a chemical bath then turbulently exposing the wafer to a chemical solution, both steps taking place in batch processing with the wafers processed in a vertical position. The wafers are then individually processed through a chemical spinning operation in which a chemical solution is dispensed from a spray nozzle while motion such as spinning is imparted the horizontally disposed wafer. The spin speed of the chemical spraying process may then be increased to accelerate physical removal of residue. Deionized water rinsing and spin-drying provide a solder bump array void of any DFR or other residuals.

Abstract translation: 从半导体晶片上的细间距焊料凸点阵列去除干膜抗蚀剂（DFR）的方法提供将晶片预浸在化学浴中，然后将晶片湍流地暴露于化学溶液，这两个步骤在批处理中发生， 晶片在垂直位置处理。 然后通过化学纺丝操作单独处理晶片，其中从喷雾喷嘴分配化学溶液，同时使诸如旋转的运动赋予水平设置的晶片。 然后可以增加化学喷涂过程的旋转速度以加速残留物的物理去除。 去离子水冲洗和旋转干燥提供无任何DFR或其他残留物的焊料凸块阵列。

公开(公告)号：US20090115058A1

公开(公告)日：2009-05-07

申请号：US11933572

申请日：2007-11-01

Applicant: Hsiu-Mei Yu ,  Tjandra Winata Karta ,  Daniel Yang ,  Shih-Ming Chen ,  Chia-Jen Cheng

Inventor： Hsiu-Mei Yu ,  Tjandra Winata Karta ,  Daniel Yang ,  Shih-Ming Chen ,  Chia-Jen Cheng

IPC: H01L23/488

CPC classification number: H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11 ,  H01L2224/1147 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/05552 ,  H01L2924/01004 ,  H01L2924/013 ,  H01L2924/01028 ,  H01L2924/0105

Abstract: An integrated circuit structure includes a passivation layer; a via opening in the passivation layer; a copper-containing via in the via opening; a polymer layer over the passivation layer, wherein the polymer layer comprises an aperture, and wherein the copper-containing via is exposed through the aperture; a post-passivation interconnect (PPI) line over the polymer layer, wherein the PPI line extends into the aperture and physically contacts the copper-via opening; and an under-bump metallurgy (UBM) over and electrically connected to the PPI line.

Abstract translation: 集成电路结构包括钝化层; 钝化层中的通孔; 通孔开口中的含铜通孔; 在所述钝化层上的聚合物层，其中所述聚合物层包括孔，并且其中所述含铜通孔通过所述孔露出; 在聚合物层上方的钝化后互连（PPI）线，其中PPI线延伸到孔中并物理接触铜通孔; 以及在PPI线上电连接的凸块下冶金（UBM）。

公开(公告)号：US07459386B2

公开(公告)日：2008-12-02

申请号：US10988528

申请日：2004-11-16

Applicant: Li-Hsin Tseng ,  Gil Huang ,  Huei-Mei Yu ,  Chia-Jen Cheng ,  Ken Sun ,  Chien-Tung Yu ,  Blenny Chang ,  Chih Yang Chan ,  Jian-Wen Luo ,  Owen Chen

Inventor： Li-Hsin Tseng ,  Gil Huang ,  Huei-Mei Yu ,  Chia-Jen Cheng ,  Ken Sun ,  Chien-Tung Yu ,  Blenny Chang ,  Chih Yang Chan ,  Jian-Wen Luo ,  Owen Chen

IPC: H01L21/44

CPC classification number: H01L24/11 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05572 ,  H01L2224/13099 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2224/05552 ,  H01L2924/00014 ,  H01L2924/013

Abstract: A method for forming solder bumps (or solder balls after reflow) of improved height and reliability is provided. In one embodiment, a semiconductor substrate having at least one contact pad and an upper passivation layer having at least one opening formed therein exposing a portion of the contact pad is provided. A layer of under bump metal (UBM) is formed above the passivation layer and the contact pad. A first patterned and etched photoresist layer is provided above the UBM layer, the first patterned and etched photoresist layer defining at least one first opening therein. A second patterned and etched photoresist layer is provided above the first patterned and etched photoresist layer, the second patterned and etched photoresist layer defining at least one second opening therein, the second opening being wider than the first opening. A solder material is filled in the at least one first opening and substantially filled in the at least one second opening. The first and second photoresist layers are removed and the solder material is reflown to create a solder ball of increased height.

Abstract translation: 提供了一种改善高度和可靠性的形成焊料凸块（或回流焊球）的方法。 在一个实施例中，提供了具有至少一个接触焊盘和具有形成在其中的至少一个开口的上钝化层的半导体衬底，其暴露接触焊盘的一部分。 在钝化层和接触垫之上形成一层下凸块金属（UBM）。 第一图案化和蚀刻的光致抗蚀剂层设置在UBM层上方，第一图案化和蚀刻光刻胶层在其中限定至少一个第一开口。 第二图案化和蚀刻光刻胶层设置在第一图案化和蚀刻光刻胶层的上方，第二图案化和蚀刻光刻胶层在其中限定至少一个第二开口，第二开口比第一开口更宽。 焊料材料填充在至少一个第一开口中并且基本上填充在至少一个第二开口中。 去除第一和第二光致抗蚀剂层，并且焊料材料被重新喷射以产生增加的高度的焊球。