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    Semiconductor element
    13.
    发明申请
    Semiconductor element 失效
    半导体元件

    公开(公告)号：US20060220026A1

    公开(公告)日：2006-10-05

    申请号：US10553628

    申请日：2004-11-24

    申请人： Masao Uchida ,  Makoto Kitabatake ,  Osamu Kusumoto ,  Kenya Yamashita ,  Kunimasa Takahashi ,  Ryoko Miyanaga

    发明人： Masao Uchida ,  Makoto Kitabatake ,  Osamu Kusumoto ,  Kenya Yamashita ,  Kunimasa Takahashi ,  Ryoko Miyanaga

    IPC分类号： H01L31/0312

    CPC分类号： H01L29/7802 ,  H01L21/049 ,  H01L29/045 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/365 ,  H01L29/41766 ,  H01L29/4238 ,  H01L29/518 ,  H01L29/66068 ,  H01L29/7838

    摘要： In a semiconductor device of the present invention, the top surface of an n-type silicon carbide layer formed on a silicon carbide substrate is miscut from the (0001) plane in the direction. A gate electrode, a source electrode and other elements are arranged such that in a channel region, the dominating current flows along a miscut direction. In the present invention, a gate insulating film is formed and then heat treatment is performed in an atmosphere containing a group-V element. In this way, the interface state density at the interface between the silicon carbide layer and the gate insulating film is reduced. As a result, the electron mobility becomes higher in a miscut direction A than in the direction perpendicular to the miscut direction A.

    摘要翻译： 在本发明的半导体器件中，形成在碳化硅衬底上的n型碳化硅层的顶表面从（0001）面向<11-20>方向错开。 栅电极，源电极等元件被布置成使得在通道区域中，主导电流沿着误差方向流动。 在本发明中，形成栅极绝缘膜，然后在含有V族元素的气氛中进行热处理。 以这种方式，碳化硅层和栅极绝缘膜之间的界面处的界面态密度降低。 结果，电子迁移率在错误方向A上比在与错误方向A垂直的方向上更高。

    Polyether ester elastic fiber and fabric, clothes made by using the same
    14.
    发明申请
    Polyether ester elastic fiber and fabric, clothes made by using the same 审中-公开
    聚酯酯弹性纤维和织物，使用同样的衣服

    公开(公告)号：US20060177655A1

    公开(公告)日：2006-08-10

    申请号：US10561155

    申请日：2004-06-18

    申请人： Seiji Mizohata ,  Shoji Makino ,  Shigeru Morioka ,  Masao Uchida ,  Bunsow Nagasaka

    发明人： Seiji Mizohata ,  Shoji Makino ,  Shigeru Morioka ,  Masao Uchida ,  Bunsow Nagasaka

    IPC分类号： D02G3/00

    CPC分类号： D01F6/86 ,  Y10T428/2913

    摘要： A polyether ester elastic fiber comprising a polyether ester elastomer containing polybutylene terephthalate as a hard segment and polyoxyethylene glycol as a soft segment and copolymerized with a specific metal organic sulfonate, having a coefficient of moisture absorption of not less than 5% at 35° C. and at a RH of 95% and a coefficient of water absorption extension of not less than 10%. The above-mentioned polyether ester elastic fiber has a good moisture-absorbing property, and is reversibly largely expanded or contracted by the absorption or release of water. Therefore, a fabric giving excellent comfortableness can be obtained from said elastic fibers, and can be recycled.

    摘要翻译： 一种聚醚酯弹性纤维，其包含聚对苯二甲酸丁二醇酯作为硬链段的聚醚酯弹性体，聚氧乙烯二醇作为软链段，并与特定的金属有机磺酸盐共聚，其吸湿系数在35℃下不低于5％ RH为95％，吸水系数为10％以上。 上述聚醚酯弹性纤维具有良好的吸湿性，并且通过水的吸收或释放而可逆地大幅膨胀或收缩。 因此，可以从所述弹性纤维获得具有优异舒适性的织物，并且可以再循环。

    Semiconductor device and method for fabricating the same
    16.
    发明授权
    Semiconductor device and method for fabricating the same 有权
    半导体装置及其制造方法

    公开(公告)号：US06580125B2

    公开(公告)日：2003-06-17

    申请号：US10204097

    申请日：2002-08-15

    申请人： Makoto Kitabatake ,  Toshiya Yokogawa ,  Osamu Kusumoto ,  Masao Uchida ,  Kunimasa Takahashi ,  Kenya Yamashita

    发明人： Makoto Kitabatake ,  Toshiya Yokogawa ,  Osamu Kusumoto ,  Masao Uchida ,  Kunimasa Takahashi ,  Kenya Yamashita

    IPC分类号： H01L2976

    CPC分类号： H01L29/7395 ,  H01L29/1608 ,  H01L29/365 ,  H01L29/66068 ,  H01L29/7391 ,  H01L29/7828

    摘要： A DMOS device (or IGBT) includes an SiC substrate 2, an n-SiC layer 3 (drift region) formed in an epitaxial layer, a gate insulating film 6, a gate electrode 7a, a source electrode 7b formed to surround the gate electrode 7a, a drain electrode 7c formed on the lower surface of the SiC substrate 2, a p-SiC layer 4, an n+ SiC layer 3 formed to be present from under edges of the source electrode 7b to under associated edges of the gate electrode 7a. In addition, the device includes an n-type doped layer 10a containing a high concentration of nitrogen and an undoped layer 10b, which are stacked in a region in the surface portion of the epitaxial layer except the region where the n+ SiC layer 5 is formed. By utilizing a quantum effect, the device can have its on-resistance decreased, and can also have its breakdown voltage increased when in its off state.

    摘要翻译： DMOS器件（或IGBT）包括SiC衬底2，形成在外延层中的n-SiC层3（漂移区），栅极绝缘膜6，栅电极7a，形成为围绕栅电极的源电极7b 如图7a所示，形成在SiC衬底2的下表面上的漏极电极7c，形成为从源电极7b的下边缘形成的p-SiC层4，n + SiC层3到栅电极7a的相关边缘 。 此外，该器件包括含有高浓度氮的n型掺杂层10a和未掺杂层10b，层叠在除了形成n + SiC层5的区域之外的外延层的表面部分的区域中 。 通过利用量子效应，器件可以使其导通电阻降低，并且当其处于截止状态时也可以使其击穿电压增加。

    Method for growing semiconductor film and method for fabricating semiconductor device
    17.
    发明授权
    Method for growing semiconductor film and method for fabricating semiconductor device 失效
    用于生长半导体膜的方法和用于制造半导体器件的方法

    公开(公告)号：US06306211B1

    公开(公告)日：2001-10-23

    申请号：US09523671

    申请日：2000-03-10

    申请人： Kunimasa Takahashi ,  Makoto Kitabatake ,  Masao Uchida ,  Toshiya Yokogawa

    发明人： Kunimasa Takahashi ,  Makoto Kitabatake ,  Masao Uchida ,  Toshiya Yokogawa

    IPC分类号： C30B2514

    CPC分类号： H01L29/66068 ,  C30B25/02 ,  C30B25/14 ,  C30B29/52 ,  H01L21/0237 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02634 ,  H01L21/02658 ,  H01L21/0455 ,  H01L29/365 ,  H01L29/66431

    摘要： In a chamber, a substrate is mounted on a susceptor and then heated to an elevated temperature. Source and diluting gases are supplied into the chamber through source and diluting gas supply pipes provided with respective flow meters. In addition, a doping gas is also supplied through an additive gas supply pipe, which is provided with a pulse valve, and a gas inlet pipe into the chamber by repeatedly opening and closing the pulse valve. In this manner, a doped layer is grown epitaxially on the substrate. In this case, a pulsed flow of the doping gas is directly supplied through the pulse valve onto the substrate from the outlet port of a pressure reducer for a doping gas cylinder. As a result, a steeply rising dopant concentration profile appears in a transition region between the substrate and the doped layer, and the surface of the doped layer is planarized.

    摘要翻译： 在室中，将基底安装在基座上，然后加热到升高的温度。 源和稀释气体通过源和稀释供应有相应流量计的气体供应管道供应到室中。 此外，还通过反复打开和关闭脉冲阀，通过设置有脉冲阀的添加剂气体供给管和进入管中的气体导入管来供给掺杂气体。 以这种方式，在衬底上外延生长掺杂层。 在这种情况下，掺杂气体的脉冲流通过脉冲阀从用于掺杂气体筒的减压器的出口直接供给到基板上。 结果，在衬底和掺杂层之间的过渡区域中出现急剧上升的掺杂剂浓度分布，并且掺杂层的表面被平坦化。

    Method and device for activating semiconductor impurities
    18.
    发明授权
    Method and device for activating semiconductor impurities 失效
    激活半导体杂质的方法和装置

    公开(公告)号：US06255201B1

    公开(公告)日：2001-07-03

    申请号：US09341464

    申请日：1999-07-12

    申请人： Akihisa Yoshida ,  Masatoshi Kitagawa ,  Masao Uchida ,  Makoto Kitabatake ,  Tsuneo Mitsuyu

    发明人： Akihisa Yoshida ,  Masatoshi Kitagawa ,  Masao Uchida ,  Makoto Kitabatake ,  Tsuneo Mitsuyu

    IPC分类号： H01L2142

    CPC分类号： H01L29/6606 ,  H01L21/046 ,  H01L29/1608 ,  H01L29/861 ,  Y10T29/41

    摘要： An impurity doped SiC substrate 1 and SiC thin film 2 are irradiated with a laser light 5 having a wavelength longer than such a wavelength that a band edge absorption of a semiconductor is caused. The wavelength of the laser light 5 may be such a wavelength that an absorption is caused by a vibration by the bond of an impurity element and an element constituting the semiconductor, for example, a wavelength of 9 &mgr;m to 11 &mgr;m. Specifically, in the case where Al is doped in SiC, the wavelength of the laser light 5 may be within the range of 9.5 &mgr;m to 10 &mgr;m.

    摘要翻译： 用波长比发生半导体的带边缘吸收的波长的波长的激光5照射杂质掺杂的SiC衬底1和SiC薄膜2。 激光5的波长可以是由杂质元素和构成半导体的元素的键合引起的吸收引起的波长，例如9μm〜11μm的波长。 具体地，在Al中掺杂有Al的情况下，激光5的波长可以在9.5μm〜10μm的范围内。