公开(公告)号：US07521810B2

公开(公告)日：2009-04-21

申请号：US11502427

申请日：2006-08-11

申请人： In-Ku Kang ,  Pyoung-Wan Kim

发明人： In-Ku Kang ,  Pyoung-Wan Kim

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L25/0657 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/78 ,  H01L24/83 ,  H01L24/85 ,  H01L24/91 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/1134 ,  H01L2224/1308 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/83101 ,  H01L2224/83139 ,  H01L2224/83855 ,  H01L2224/8388 ,  H01L2224/85051 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85399 ,  H01L2224/85986 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/15787 ,  H01L2924/20105 ,  H01L2924/351 ,  H01L2224/85186 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/4554

摘要： A chip stack package may include a package substrate, a plurality of semiconductor chips mounted on the package substrate, bonding wires electrically connecting the semiconductor chips to the package substrate, and spacers interposed between the adjacent semiconductor chips. Each of the spacers may include a plurality of metal bumps. The spacers may be higher than the highest point of the bonding wire from the active surface of the semiconductor chip.

摘要翻译： 芯片堆叠封装可以包括封装基板，安装在封装基板上的多个半导体芯片，将半导体芯片电连接到封装基板的接合线以及夹在相邻半导体芯片之间的间隔物。 每个间隔件可以包括多个金属凸块。 间隔物可以高于来自半导体芯片的有源表面的接合线的最高点。

公开(公告)号：US20090039491A1

公开(公告)日：2009-02-12

申请号：US12104333

申请日：2008-04-16

申请人： Pyoung-Wan KIM ,  Teak-Hoon LEE ,  Chul-Yong JANG

发明人： Pyoung-Wan KIM ,  Teak-Hoon LEE ,  Chul-Yong JANG

IPC分类号： H01L23/00 ,  H01L21/50

CPC分类号： H01L23/5389 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L24/18 ,  H01L24/19 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/04105 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/12105 ,  H01L2224/13023 ,  H01L2224/18 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05599

摘要： In one embodiment, a semiconductor package includes a first insulating body and a first semiconductor chip having a first active surface and a first back surface opposite the first active surface. The first semiconductor chip is disposed within the first insulating body. The first active surface is exposed by the first insulating body. The first back surface is substantially surrounded by the first insulating body. The semiconductor package includes a post within the first insulating body and adjacent to a side of the first semiconductor chip.

摘要翻译： 在一个实施例中，半导体封装包括第一绝缘体和具有第一有源表面和与第一有源表面相对的第一后表面的第一半导体芯片。 第一半导体芯片设置在第一绝缘体内。 第一活性表面被第一绝缘体暴露。 第一后表面基本上被第一绝缘体包围。 半导体封装包括在第一绝缘体内并邻近第一半导体芯片的一侧的柱。

公开(公告)号：US06498389B1

公开(公告)日：2002-12-24

申请号：US10058123

申请日：2002-01-29

申请人： Pyoung Wan Kim

发明人： Pyoung Wan Kim

IPC分类号： H01L2348

CPC分类号： H01L24/49 ,  H01L23/3107 ,  H01L23/49506 ,  H01L23/49524 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/4899 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/10162 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

摘要： An ultra-thin semiconductor package device comprises a heat-resistant film-type adhesive support tape which connects a semiconductor chip to a plurality of individual lead frames, wherein each lead frame is connected to an associated one of a plurality of electrode pads of the semiconductor chip by a plurality of bonding wires. An encapsulating molding material provides environmental protection for the completed package. Within the encapsulating molding, the semiconductor chip is mounted on a same underside of the support tape as the plurality of lead frames, such that the bottom of the semiconductor chip is aligned with the bottom of an encapsulating molding, and the height of a loop in each bonding wire is minimized.

摘要翻译： 超薄半导体封装器件包括将半导体芯片连接到多个单独引线框架的耐热膜型粘合剂支撑带，其中每个引线框架连接到半导体的多个电极焊盘中的相关联的一个 通过多个接合线芯片。 封装成型材料为完成的包装提供环境保护。 在封装模制中，半导体芯片安装在与多个引线框架相同的支撑带的下侧，使得半导体芯片的底部与封装模制件的底部对准，并且环路的高度 每个接合线最小化。

公开(公告)号：US08344497B2

公开(公告)日：2013-01-01

申请号：US12240036

申请日：2008-09-29

申请人： Pyoung-Wan Kim ,  Eun-Chul Ahn ,  Teak-Hoon Lee ,  Chul-Yong Jang

发明人： Pyoung-Wan Kim ,  Eun-Chul Ahn ,  Teak-Hoon Lee ,  Chul-Yong Jang

IPC分类号： H01L23/48

CPC分类号： H01L23/49541 ,  H01L23/3114 ,  H01L2224/04105 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor package may include a semiconductor chip, a molding layer which molds the semiconductor chip, and an interconnection which extends crossing an interface between the semiconductor chip and the molding layer and connects the semiconductor chip to an outside, wherein a shape of the interconnection is changed along the extended length thereof. According to the present invention, even if a mechanical stress or a thermal stress is applied to an interconnection, a crack does not occur in the interconnection or the interconnection is not disconnected. Therefore, a reliability of the semiconductor package is improved.

摘要翻译： 半导体封装可以包括半导体芯片，模制半导体芯片的模制层和跨越半导体芯片和模制层之间的界面延伸并将半导体芯片连接到外部的互连，其中互连的形状是 沿其长度改变。 根据本发明，即使对互连件施加机械应力或热应力，在互连中也不会发生裂纹，也不会断开互连。 因此，提高了半导体封装的可靠性。

公开(公告)号：US07807512B2

公开(公告)日：2010-10-05

申请号：US12320916

申请日：2009-02-09

申请人： Teak-Hoon Lee ,  Pyoung-Wan Kim ,  Nam-Seog Kim ,  Chul-Yong Jang

发明人： Teak-Hoon Lee ,  Pyoung-Wan Kim ,  Nam-Seog Kim ,  Chul-Yong Jang

IPC分类号： H01L21/00 ,  H01L21/30 ,  H01L21/46

CPC分类号： H01L25/0657 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/32145 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2224/82

摘要： A semiconductor package and module, and methods of fabricating the same are provided. A method of fabricating a semiconductor package may include bonding rear surfaces of first and second semiconductor chips to each other, each of the semiconductor chips having chip pads exposed on front surfaces. The method may also include forming an encapsulation portion configured to encapsulate side surfaces of the bonded semiconductor chips, forming via plugs configured to pass through the encapsulation portion, forming an insulating layer configured to expose surfaces of the chip pads and the via plugs on the exposed surfaces of the two semiconductor chips and surfaces of the encapsulation portion, and forming package pads on the exposed surfaces of the chip pads and the surfaces of the via plugs.

摘要翻译： 提供半导体封装和模块及其制造方法。 制造半导体封装的方法可以包括将第一和第二半导体芯片的后表面彼此粘合，每个半导体芯片具有在前表面上暴露的芯片焊盘。 该方法还可以包括形成封装部分，该封装部分被配置为封装接合的半导体芯片的侧表面，形成穿过被配置成穿过封装部分的插塞，形成绝缘层，该绝缘层被配置成暴露在暴露的芯片焊盘和通孔塞上的表面 两个半导体芯片的表面和封装部分的表面，以及在芯片焊盘和通孔塞的表面的暴露表面上形成封装焊盘。

公开(公告)号：US20100081236A1

公开(公告)日：2010-04-01

申请号：US12570047

申请日：2009-09-30

申请人： Se-Young Yang ,  Kyu-Jin Lee ,  Pyoung-Wan Kim ,  Keum-Hee Ma ,  Chul-Yong Jang

发明人： Se-Young Yang ,  Kyu-Jin Lee ,  Pyoung-Wan Kim ,  Keum-Hee Ma ,  Chul-Yong Jang

IPC分类号： H01L21/60

CPC分类号： H01L24/94 ,  H01L23/147 ,  H01L23/49822 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/0557 ,  H01L2224/12105 ,  H01L2224/13009 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73209 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2224/83 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/05552

摘要： A method of manufacturing a semiconductor device includes forming printed circuit board (PCB) having an embedded interposer. A semiconductor chip or a semiconductor package is mounted onto the embedded interposer using a conductive adhesive agent. The embedded interposer has substantially the same coefficient of thermal expansion (CTE) as the semiconductor chip. The embedded interposer is formed using a semiconductor wafer.

摘要翻译： 制造半导体器件的方法包括形成具有嵌入式插入器的印刷电路板（PCB）。 使用导电粘合剂将半导体芯片或半导体封装安装到嵌入式插入件上。 嵌入式插入器具有与半导体芯片基本上相同的热膨胀系数（CTE）。 嵌入式插入器使用半导体晶片形成。

公开(公告)号：US20090298234A1

公开(公告)日：2009-12-03

申请号：US12359820

申请日：2009-01-26

申请人： Teak-hoon Lee ,  Pyoung-wan Kim ,  Nam-seog Kim

发明人： Teak-hoon Lee ,  Pyoung-wan Kim ,  Nam-seog Kim

IPC分类号： H01L21/78

CPC分类号： H01L21/78 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/172 ,  B23K2103/50 ,  B28D5/00 ,  H01L23/3114 ,  H01L23/525 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05184 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014

摘要： A method of fabricating a semiconductor chip package, in which a protection layer is formed on a scribe lane of a wafer including a plurality of semiconductor chips, an encapsulation layer is formed on the semiconductor chips and the protection layer, and at least two types of lasers having different respective wavelengths are sequentially irradiated to the scribe lane so as to separate the semiconductor chips. Therefore, the wafer can be protected from the laser that is used to saw the encapsulation layer.

摘要翻译： 一种制造半导体芯片封装的方法，其中在包括多个半导体芯片的晶片的划线上形成保护层，在半导体芯片和保护层上形成封装层，并且至少两种 具有不同的各自波长的激光被顺序地照射到划线，以分离半导体芯片。 因此，可以保护晶片免受用于观察封装层的激光的影响。

公开(公告)号：US20090239336A1

公开(公告)日：2009-09-24

申请号：US12320916

申请日：2009-02-09

申请人： Teak-Hoon Lee ,  Pyoung-Wan Kim ,  Nam-Seog Kim ,  Chul-Yong Jang

发明人： Teak-Hoon Lee ,  Pyoung-Wan Kim ,  Nam-Seog Kim ,  Chul-Yong Jang

IPC分类号： H01L21/98

CPC分类号： H01L25/0657 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/32145 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2224/82

摘要： A semiconductor package and module, and methods of fabricating the same are provided. A method of fabricating a semiconductor package may include bonding rear surfaces of first and second semiconductor chips to each other, each of the semiconductor chips having chip pads exposed on front surfaces. The method may also include forming an encapsulation portion configured to encapsulate side surfaces of the bonded semiconductor chips, forming via plugs configured to pass through the encapsulation portion, forming an insulating layer configured to expose surfaces of the chip pads and the via plugs on the exposed surfaces of the two semiconductor chips and surfaces of the encapsulation portion, and forming package pads on the exposed surfaces of the chip pads and the surfaces of the via plugs.

摘要翻译： 提供半导体封装和模块及其制造方法。 制造半导体封装的方法可以包括将第一和第二半导体芯片的后表面彼此粘合，每个半导体芯片具有在前表面上暴露的芯片焊盘。 该方法还可以包括形成封装部分，该封装部分被配置为封装接合的半导体芯片的侧表面，形成穿过被配置成穿过封装部分的插塞，形成绝缘层，该绝缘层被配置成暴露在暴露的芯片焊盘和通孔塞上的表面 两个半导体芯片的表面和封装部分的表面，以及在芯片焊盘和通孔塞的表面的暴露表面上形成封装焊盘。

公开(公告)号：US07498679B2

公开(公告)日：2009-03-03

申请号：US11354469

申请日：2006-02-14

申请人： Jung-Seok Ryu ,  Pyoung-Wan Kim

发明人： Jung-Seok Ryu ,  Pyoung-Wan Kim

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L23/40 ,  H01L23/495 ,  H01L21/50 ,  H01L21/48 ,  H01L21/44

CPC分类号： H01L23/13 ,  H01L23/49827 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L2224/27013 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/83051 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A package substrate may have an improved surface structure for controlling the flow of an adhesive. The package substrate may have an upper surface and a lower surface covered with a passivation layer. A window may be provided in, for example, the center of the package substrate. Sinks may be provided on the lower surface, clear of the passivation layer. The semiconductor package may have an indented or non-planar surface structure.

摘要翻译： 封装基板可以具有改进的表面结构，用于控制粘合剂的流动。 封装基板可以具有被钝化层覆盖的上表面和下表面。 例如可以在封装基板的中心设置窗口。 可以在下表面上提供沉积物，而不需要钝化层。 半导体封装可以具有凹入或非平面的表面结构。

公开(公告)号：US20080283996A1

公开(公告)日：2008-11-20

申请号：US12121490

申请日：2008-05-15

申请人： Min-Ho O ,  Jong-Ho LEE ,  Eun-Chul AHN ,  Pyoung-Wan KIM

发明人： Min-Ho O ,  Jong-Ho LEE ,  Eun-Chul AHN ,  Pyoung-Wan KIM

IPC分类号： H01L23/49 ,  H01L23/538

CPC分类号： H01L24/85 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L24/83 ,  H01L24/91 ,  H01L25/0657 ,  H01L2224/05553 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73227 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/78 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A semiconductor package using a chip-embedded interposer substrate is provided. The chip-embedded interposer substrate includes a chip including a plurality of chip pads; a substrate having the chip mounted thereon and including a plurality of redistribution pads for redistributing the chip pads; bonding wires for connecting the chip pads to the redistribution pads; a protective layer having via holes for exposing the redistribution pads while burying the chip and the substrate; and vias connected to the redistribution pads through the via holes. The semiconductor package including chips of various sizes is fabricated using the chip-embedded interposer substrate.

摘要翻译： 提供了使用芯片嵌入式插入器基板的半导体封装。 芯片嵌入式插入器基板包括：包括多个芯片焊盘的芯片; 具有安装在其上的芯片并且包括用于重新分配芯片焊盘的多个再分配焊盘的衬底; 用于将芯片焊盘连接到再分配焊盘的接合线; 保护层，其具有用于在掩埋所述芯片和所述基板的同时露出所述再分布焊盘的通孔; 以及通过通孔连接到再分配焊盘的通孔。 包括各种尺寸的芯片的半导体封装使用芯片嵌入式插入器基板来制造。