公开(公告)号：US10229827B2

公开(公告)日：2019-03-12

申请号：US15844989

申请日：2017-12-18

Applicant: Applied Materials, Inc.

Inventor： Han-Wen Chen ,  Steven Verhaverbeke ,  Roman Gouk ,  Guan Huei See ,  Yu Gu ,  Arvind Sundarrajan

IPC: H01L21/31 ,  H01L21/02 ,  H01L23/538 ,  H01L21/48 ,  H01L21/311 ,  G03F7/00 ,  H01L21/027

Abstract: Embodiments of the present disclosure generally describe methods of forming one or more device terminal redistribution layers using imprint lithography. The methods disclosed herein enable the formation of high aspect ratio interconnect structures at lower costs than conventional photolithography and etch processes. Further, the processes and methods described herein desirably remove, reduce, and/or substantially eliminate voids in the surrounding polymer layer formed during the polymer deposition process or subsequent thereto.

公开(公告)号：US20180366401A1

公开(公告)日：2018-12-20

申请号：US15623704

申请日：2017-06-15

Applicant: APPLIED MATERIALS, INC.

Inventor： Peng Suo ,  Guan Huei See ,  Arvind Sundarrajan

IPC: H01L23/498 ,  H01L21/8234 ,  H01L49/02 ,  H01L27/02 ,  H01L23/522 ,  H01L23/367 ,  H01L25/065 ,  H01L25/00

Abstract: Methods of processing a substrate include: providing a substrate with a first polymer dielectric layer; forming a first RDL on the first polymer dielectric layer; constructing a 3D MIM capacitive stack on the first RDL in at least one opening in a top surface of a second polymer dielectric layer, the 3D MIM capacitive stack having a top electrode, a bottom electrode, and a capacitive dielectric layer interposed between the top electrode and the bottom electrode; depositing a dielectric layer on the 3D MIM capacitive stack and on the second polymer dielectric layer; and removing a portion of the dielectric layer to expose at least a portion of the top electrode at a bottom of at least one opening of the 3D MIM capacitive stack and to expose at least a portion of the metal layer at a bottom of at least one opening of the second polymer dielectric layer.

公开(公告)号：US20180277384A1

公开(公告)日：2018-09-27

申请号：US15467866

申请日：2017-03-23

Applicant: Applied Materials, Inc.

Inventor： Ranga Rao Arnepalli ,  Prerna Goradia ,  Prayudi Lianto ,  Jie Zeng ,  Arvind Sundarrajan ,  Robert Jan Visser ,  Guan Huei See

IPC: H01L21/3105 ,  H01L21/321 ,  H01L21/3205 ,  H01L21/67 ,  C09G1/02 ,  C09K3/14

CPC classification number: H01L21/31058 ,  B24B1/00 ,  B24B37/044 ,  C09G1/00 ,  C09G1/02 ,  C09G1/04 ,  C09G1/06 ,  C09K3/1409 ,  C09K3/1436 ,  C09K3/1454 ,  C09K3/1463 ,  C09K13/06 ,  H01L21/30625 ,  H01L21/32051

Abstract: A slurry for chemical mechanical planarization includes water, 1-3 wt. % of abrasive particles having an average diameter of at least 10 nm and less than 100 nm and an outer surface of ceria, and ½-3 wt. % of at least one amine.

公开(公告)号：US10047430B2

公开(公告)日：2018-08-14

申请号：US14205260

申请日：2014-03-11

Applicant: Applied Materials, Inc.

Inventor： Peijun Ding ,  Rong Tao ,  Zheng Xu ,  Daniel C. Lubben ,  Suraj Rengarajan ,  Michael A. Miller ,  Arvind Sundarrajan ,  Xianmin Tang ,  John C. Forster ,  Jianming Fu ,  Roderick C. Mosely ,  Fusen Chen ,  Praburam Gopalraja

IPC: C23C14/34 ,  H01J37/34 ,  C23C14/04 ,  C23C14/35 ,  C23C14/56 ,  H01J37/32 ,  H01L21/285 ,  H01L21/768

CPC classification number: C23C14/046 ,  C23C14/345 ,  C23C14/3457 ,  C23C14/35 ,  C23C14/358 ,  C23C14/564 ,  C23C14/568 ,  H01J37/321 ,  H01J37/3402 ,  H01J37/3408 ,  H01J37/3441 ,  H01J2237/3327 ,  H01L21/2855 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76862 ,  H01L21/76865 ,  H01L21/76868 ,  H01L21/76871 ,  H01L21/76873 ,  H01L21/76876 ,  H01L21/76877 ,  H01L2221/1089

Abstract: A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same or different chambers. Also, bottom coverage may be thinned or eliminated by ICP resputtering in one chamber and SIP in another. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. ICP is provided by one or more RF coils which inductively couple RF energy into a plasma. The combined SIP-ICP layers can act as a liner or barrier or seed or nucleation layer for hole. In addition, an RF coil may be sputtered to provide protective material during ICP resputtering. In another chamber an array of auxiliary magnets positioned along sidewalls of a magnetron sputter reactor on a side towards the wafer from the target. The magnetron preferably is a small, strong one having a stronger outer pole of a first magnetic polarity surrounding a weaker outer pole of a second magnetic polarity and rotates about the central axis of the chamber. The auxiliary magnets preferably have the first magnetic polarity to draw the unbalanced magnetic field component toward the wafer. The auxiliary magnets may be either permanent magnets or electromagnets.

公开(公告)号：US10002771B1

公开(公告)日：2018-06-19

申请号：US15728604

申请日：2017-10-10

Applicant: APPLIED MATERIALS, INC.

Inventor： Prayudi Lianto ,  Kuma Hsiung ,  Eric J. Bergman ,  John L. Klocke ,  Mohamed Rafi ,  Muhammad Azim ,  Guan Huei See ,  Arvind Sundarrajan

IPC: H01L21/3105 ,  H01L21/687

CPC classification number: H01L21/31053 ,  H01L21/31058 ,  H01L21/68764

Abstract: A polymer layer on a substrate may be treated with ozone gas or with deionized water and ozone gas to increase a removal rate of the polymer layer in a chemical mechanical polishing (CMP) process. The ozone gas may be diffused directly into the polymer layer or through a thin layer of deionized water on the surface of the polymer layer and into the polymer layer. The deionized water may also be heated during the process to further enhance the diffusion of the ozone gas into the polymer layer.

公开(公告)号：US12138742B2

公开(公告)日：2024-11-12

申请号：US17176839

申请日：2021-02-16

Applicant: Applied Materials, Inc. ,  NATIONAL UNIVERSITY OF SINGAPORE

Inventor： Prayudi Lianto ,  Guan Huei See ,  Arvind Sundarrajan ,  Andrivo Rusydi ,  Muhammad Avicenna Naradipa

IPC: B24B57/02 ,  G01N21/21

Abstract: Methods and apparatus for processing a substrate are provided herein. For example, a method of processing a substrate using extended spectroscopic ellipsometry (ESE) includes directing a beam from an extended spectroscopic ellipsometer toward a surface of a substrate for determining in-situ ESE data therefrom during substrate processing, measuring a change of phase and amplitude in determined in-situ ESE data, and determining various aspects of the surface of the substrate using simultaneously complex dielectric function, optical conductivity, and electronic correlations from a measured change of phase and amplitude in the in-situ ESE data.

公开(公告)号：US12048948B2

公开(公告)日：2024-07-30

申请号：US16427723

申请日：2019-05-31

Applicant: APPLIED MATERIALS, INC.

Inventor： Yueh Sheng Ow ,  Yue Cui ,  Arvind Sundarrajan ,  Nuno Yen-Chu Chen ,  Guan Huei See ,  Felix Deng

IPC: B05D3/06 ,  H01L23/00 ,  H01P3/08 ,  H01P11/00

CPC classification number: B05D3/06 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/03515 ,  H01L2224/0401 ,  H01L2224/05024 ,  H01L2924/19031 ,  H01L2924/19032 ,  H01L2924/3511 ,  H01P3/08 ,  H01P11/003

Abstract: Methods of curing a polymer layer on a substrate using variable microwave frequency are provided herein. In some embodiments, methods of curing a polymer layer on a substrate using variable microwave frequency include (a) forming a first thin-film polymer layer on a substrate, the first thin-film polymer layer including at least one first base dielectric material and at least one microwave tunable material, (b) applying a variable frequency microwave energy to the substrate and the first thin-film polymer layer to heat the substrate and the first thin-film polymer layer to a first temperature, and (c) adjusting the variable frequency microwave energy applied to the substrate and the first thin-film polymer layer to tune at least one material property of the first thin-film polymer layer.

公开(公告)号：US11854886B2

公开(公告)日：2023-12-26

申请号：US17847419

申请日：2022-06-23

Applicant: Applied Materials, Inc.

Inventor： Peng Suo ,  Ying W. Wang ,  Guan Huei See ,  Chang Bum Yong ,  Arvind Sundarrajan

IPC: H01L21/768 ,  H01L21/308 ,  H01L21/288 ,  H01L21/285 ,  H01L21/306

CPC classification number: H01L21/76898 ,  H01L21/288 ,  H01L21/2855 ,  H01L21/308 ,  H01L21/30625

Abstract: The present disclosure relates to through-via structures with dielectric shielding of interconnections for advanced wafer level semiconductor packaging. The methods described herein enable the formation of high thickness dielectric shielding layers within low aspect ratio through-via structures, thus facilitating thin and small-form-factor package structures having high I/O density with improved bandwidth and power.

公开(公告)号：US11791094B2

公开(公告)日：2023-10-17

申请号：US17227332

申请日：2021-04-11

Applicant: APPLIED MATERIALS, INC.

Inventor： Peng Suo ,  Yu Gu ,  Guan Huei See ,  Arvind Sundarrajan

IPC: H01F27/00 ,  H01F41/04 ,  H01F17/00 ,  H01F27/24 ,  H01F27/28 ,  H01L21/48 ,  H01L23/498 ,  H01L49/02

CPC classification number: H01F41/041 ,  H01F17/0013 ,  H01F27/24 ,  H01F27/2804 ,  H01F41/046 ,  H01L21/486 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49838 ,  H01L28/10 ,  H01F41/04 ,  H01F2017/0066 ,  H01F2027/2809

Abstract: A method of forming a magnetic core on a substrate having a stacked inductor coil includes etching a plurality of polymer layers to form at least one feature through the plurality of polymer layers, wherein the at least one feature is disposed within a central region of a stacked inductor coil formed on the substrate; and depositing a magnetic material within the at least one feature.

公开(公告)号：US20230061392A1

公开(公告)日：2023-03-02

申请号：US17897372

申请日：2022-08-29

Applicant: Applied Materials, Inc.

Inventor： Suketu Arun Parikh ,  Ashish Pal ,  El Mehdi Bazizi ,  Andrew Yeoh ,  Nitin K. Ingle ,  Arvind Sundarrajan ,  Guan Huei See ,  Martinus Maria Berkens ,  Sameer A. Deshpande ,  Balasubramanian Pranatharthiharan ,  Yen-Chu Yang

IPC: H01L21/768 ,  H01L21/304 ,  H01L21/306 ,  H01L21/762

Abstract: Semiconductor devices and methods of manufacturing the same are described. A silicon wafer is provided and a buried etch stop layer is formed on the silicon wafer. The wafer is then subjected to device and front-end processing. After front-end processing, the wafer undergoes hybrid bonding, and then the wafer is thinned. To thin the wafer, the silicon substrate layer, which has a starting first thickness, is ground to a second thickness, the second thickness less than the first thickness. After grinding, the silicon wafer is subjected to chemical mechanical planarization (CMP), followed by etching and CMP buffing, to reduce the thickness of the silicon to a third thickness, the third thickness less than the second thickness.