公开(公告)号：US08726838B2

公开(公告)日：2014-05-20

申请号：US12963995

申请日：2010-12-09

申请人： Sunil Shanker ,  Tony P. Chiang ,  Chi-I Lang

发明人： Sunil Shanker ,  Tony P. Chiang ,  Chi-I Lang

IPC分类号： C23C16/50 ,  C23C16/509 ,  H01L21/3065 ,  C23C16/455 ,  C23C16/02 ,  C23C16/458 ,  H01L21/67 ,  H01J37/32

CPC分类号： H01L21/02274 ,  C23C16/0227 ,  C23C16/44 ,  C23C16/45523 ,  C23C16/45525 ,  C23C16/45536 ,  C23C16/45548 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/4586 ,  C23C16/509 ,  C23C16/5096 ,  H01J37/32091 ,  H01J37/3244 ,  H01J37/32532 ,  H01J37/32541 ,  H01J37/32568 ,  H01J37/32715 ,  H01J37/32779 ,  H01L21/3065 ,  H01L21/67069

摘要： According to various embodiments of the disclosure, an apparatus and method for enhanced deposition and etch techniques is described, including a pedestal, the pedestal having at least two electrodes embedded in the pedestal, a showerhead above the pedestal, a plasma gas source connected to the showerhead, wherein the showerhead is configured to deliver plasma gas to a processing region between the showerhead and the substrate and a power source operably connected to the showerhead and the at least two electrodes with plasma being substantially contained in an area which corresponds with one electrode of the at least two electrodes.

摘要翻译： 根据本公开的各种实施例，描述了一种用于增强沉积和蚀刻技术的装置和方法，包括基座，具有至少两个嵌入基座的电极的基座，基座上方的喷头，连接到基座的等离子体气体源 淋浴头，其中所述喷头被构造成将等离子体气体输送到所述喷头和所述基板之间的处理区域，以及电源，其可操作地连接到所述喷头和所述至少两个电极，其中等离子体基本上包含在对应于 所述至少两个电极。

公开(公告)号：US08334015B2

公开(公告)日：2012-12-18

申请号：US12013759

申请日：2008-01-14

申请人： Tony P. Chiang ,  Sunil Shanker ,  Chi-I Lang

发明人： Tony P. Chiang ,  Sunil Shanker ,  Chi-I Lang

IPC分类号： C23C16/04

CPC分类号： C23C16/45574 ,  C23C16/45544 ,  C23C16/45548

摘要： A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings.

摘要翻译： 提供组合处理室和方法。 在该方法中，流体体积在衬底的表面上流动，具有不同部分的流体体积具有不同构成组分，以同时将衬底的偏析区域暴露于与构成组分的混合物中，所述构成组分与相邻区域暴露于其中的构成组分不同 。 通过多个流动产生不同处理的分离区域。

公开(公告)号：US20120090545A1

公开(公告)日：2012-04-19

申请号：US13332813

申请日：2011-12-21

申请人： Tony P. Chiang ,  Sunil Shanker ,  Chi-I Lang

发明人： Tony P. Chiang ,  Sunil Shanker ,  Chi-I Lang

IPC分类号： C23C16/455

CPC分类号： C23C16/45574 ,  C23C16/45544 ,  C23C16/45548

摘要： A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings.

摘要翻译： 提供组合处理室和方法。 在该方法中，流体体积在衬底的表面上流动，具有不同部分的流体体积具有不同构成组分，以同时将衬底的偏析区域暴露于与构成组分的混合物中，所述构成组分与相邻区域暴露于其中的构成组分不同 。 通过多个流动产生不同处理的分离区域。

公开(公告)号：US20090061083A1

公开(公告)日：2009-03-05

申请号：US12013729

申请日：2008-01-14

申请人： Tony P. Chiang ,  Sunil Shanker ,  Chi-I Lang

发明人： Tony P. Chiang ,  Sunil Shanker ,  Chi-I Lang

IPC分类号： C23C16/00

CPC分类号： C23C16/45574 ,  C23C16/45544 ,  C23C16/45548

摘要： A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings.

公开(公告)号：US07514375B1

公开(公告)日：2009-04-07

申请号：US11500799

申请日：2006-08-08

申请人： Sunil Shanker ,  Chi-I Lang

发明人： Sunil Shanker ,  Chi-I Lang

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/31608 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/76837

摘要： During bottom filling of high aspect ratio gaps and trenches in an integrated circuit substrate using HDP-CVD, a pulsed HF bias is applied to the substrate. In some embodiments, pulsed HF bias is applied to the substrate during etching operations. The pulsed bias typically has a pulse frequency in a range of about from 500 Hz to 20 kHz and a duty cycle in a range of about from 0.1 to 0.95.

摘要翻译： 在使用HDP-CVD的集成电路衬底中的高纵横比间隙和沟槽的底部填充期间，将脉冲HF偏压施加到衬底。 在一些实施例中，在蚀刻操作期间将脉冲HF偏压施加到衬底。 脉冲偏压通常具有在约500Hz至20kHz的范围内的脉冲频率和约0.1至0.95的范围内的占空比。

公开(公告)号：US20090061644A1

公开(公告)日：2009-03-05

申请号：US12013759

申请日：2008-01-14

申请人： Tony P. Chiang ,  Sunil Shanker ,  Chi I. Lang

发明人： Tony P. Chiang ,  Sunil Shanker ,  Chi I. Lang

IPC分类号： H01L21/31 ,  B05C11/00

CPC分类号： C23C16/45574 ,  C23C16/45544 ,  C23C16/45548

摘要： A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings.

公开(公告)号：US08821795B2

公开(公告)日：2014-09-02

申请号：US12504232

申请日：2009-07-16

申请人： Imran Hashim ,  Sandra Malhotra ,  Ryan Clarke ,  Sunil Shanker ,  Yun Wang ,  Yoram Schwarz

发明人： Imran Hashim ,  Sandra Malhotra ,  Ryan Clarke ,  Sunil Shanker ,  Yun Wang ,  Yoram Schwarz

IPC分类号： G01N27/00 ,  H01L45/00 ,  H01L21/66

CPC分类号： H01L22/20 ,  H01L22/14 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/16

摘要： A combinatorial screening method and system are provided. The combinatorial system and method provide rapid data generation for characterization of phase change material. The characterization data is collected through a multipoint probe card where multiple regions are characterized in a single annealing cycle.

摘要翻译： 提供组合筛选方法和系统。 组合系统和方法提供用于表征相变材料的快速数据生成。 通过多点探针卡收集表征数据，其中多个区域在单个退火循环中表征。

公开(公告)号：US08354702B1

公开(公告)日：2013-01-15

申请号：US12708848

申请日：2010-02-19

申请人： Sunil Shanker ,  Xiangxin Rui ,  Pragati Kumar ,  Hanhong Chen ,  Toshiyuki Hirota

发明人： Sunil Shanker ,  Xiangxin Rui ,  Pragati Kumar ,  Hanhong Chen ,  Toshiyuki Hirota

IPC分类号： H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC分类号： C01G23/07 ,  C01G39/02 ,  H01L27/10808 ,  H01L27/10852 ,  H01L28/75

摘要： This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor and DRAM cell. In particular, a bottom electrode has a material selected for lattice matching characteristics. This material may be created from a relatively inexpensive metal oxide which is processed to adopt a conductive, but difficult-to-produce oxide state, with specific crystalline form; to provide one example, specific materials are disclosed that are compatible with the growth of rutile phase titanium dioxide (TiO2) for use as a dielectric, thereby leading to predictable and reproducible higher dielectric constant and lower effective oxide thickness and, thus, greater part density at lower cost.

公开(公告)号：US20120122291A1

公开(公告)日：2012-05-17

申请号：US13337611

申请日：2011-12-27

申请人： Sandra G. Malhotra ,  Pragati Kumar ,  Sean Barstow ,  Tony Chiang ,  Prashant B. Phatak ,  Wen Wu ,  Sunil Shanker

发明人： Sandra G. Malhotra ,  Pragati Kumar ,  Sean Barstow ,  Tony Chiang ,  Prashant B. Phatak ,  Wen Wu ,  Sunil Shanker

IPC分类号： H01L21/02

CPC分类号： H01L45/1608 ,  H01L27/2418 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1641

摘要： Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.

摘要翻译： 提供了基于电阻式开关存储元件层的非易失性存储元件。 非易失性存储元件可以具有电阻性开关金属氧化物层。 电阻式开关金属氧化物层可以具有一层或多层氧化物。 电阻式开关金属氧化物可以掺杂有增加其熔融温度并增强其热稳定性的掺杂剂。 可以形成层以增强非易失性存储元件的热稳定性。 用于非易失性存储元件的电极可以包含导电层和缓冲层。

公开(公告)号：US20120100724A1

公开(公告)日：2012-04-26

申请号：US13337759

申请日：2011-12-27

申请人： Sunil Shanker ,  Tony Chiang

发明人： Sunil Shanker ,  Tony Chiang

IPC分类号： H01L21/31

CPC分类号： C23C16/047 ,  C23C16/04 ,  C23C16/45536 ,  C23C16/45551 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/45591 ,  C23C16/4583 ,  C23C16/46 ,  C23C16/50 ,  C23C16/5096 ,  C23C16/52 ,  H01J37/32357 ,  H01J37/32366

摘要： Combinatorial plasma enhanced deposition techniques are described, including designating multiple regions of a substrate, providing a precursor to at least a first region of the multiple regions, and providing a plasma to the first region to deposit a first material on the first region formed using the first precursor, wherein the first material is different from a second material formed on a second region of the substrate.