公开(公告)号：US09761514B2

公开(公告)日：2017-09-12

申请号：US15205223

申请日：2016-07-08

Applicant: Intel Corporation

Inventor： Qing Ma ,  Chuan Hu ,  Patrick Morrow

IPC: H05K1/11 ,  H01L23/498 ,  H05K3/42 ,  H05K3/46 ,  H01L21/48 ,  H01L23/367 ,  H01L23/00

CPC classification number: H01L23/49822 ,  B32B2457/08 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/3675 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/81815 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01016 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/05442 ,  H01L2924/14 ,  H01L2924/15184 ,  H01L2924/15788 ,  H01L2924/16251 ,  H05K3/42 ,  H05K3/4605 ,  H05K2201/0195 ,  H05K2201/096 ,  Y10T156/10 ,  H01L2924/00

Abstract: Disclosed are embodiments of a substrate for an integrated circuit (IC) device. The substrate includes a core comprised of two or more discrete glass layers that have been bonded together. A separate bonding layer may be disposed between adjacent glass layers to couple these layers together. The substrate may also include build-up structures on opposing sides of the multi-layer glass core, or perhaps on one side of the core. Electrically conductive terminals may be formed on both sides of the substrate, and an IC die may be coupled with the terminals on one side of the substrate. The terminals on the opposing side may be coupled with a next-level component, such as a circuit board. One or more conductors extend through the multi-layer glass core, and one or more of the conductors may be electrically coupled with the build-up structures disposed over the core. Other embodiments are described and claimed.

公开(公告)号：US20170200677A1

公开(公告)日：2017-07-13

申请号：US15469964

申请日：2017-03-27

Applicant: INTEL CORPORATION

Inventor： Qing Ma ,  Johanna M. Swan ,  Robert Starkston ,  John S. Guzek ,  Robert L. Sankman ,  Aleksandar Aleksov

IPC: H01L23/538 ,  H01L25/065 ,  H01L21/683 ,  H01L21/48 ,  H01L23/498 ,  H01L23/15 ,  H01L23/00

CPC classification number: H01L23/5386 ,  B32B2457/08 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/09 ,  H01L24/13 ,  H01L24/17 ,  H01L24/19 ,  H01L24/24 ,  H01L24/81 ,  H01L24/82 ,  H01L25/0655 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/08238 ,  H01L2224/12105 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/2402 ,  H01L2224/24137 ,  H01L2224/81192 ,  H01L2224/814 ,  H01L2224/81801 ,  H01L2224/8185 ,  H01L2224/8203 ,  H01L2224/821 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/18162 ,  H01L2924/2064 ,  H01L2924/20641 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/115 ,  H05K1/185 ,  H05K3/4688 ,  H05K2201/017 ,  H05K2203/1469 ,  Y10T156/1057 ,  H01L2924/014 ,  H01L2924/00

Abstract: Embodiments of the present description relate to the field of fabricating microelectronic structures. The microelectronic structures may include a glass routing structure formed separately from a trace routing structure, wherein the glass routing structure is incorporated with the trace routing substrate, either in a laminated or embedded configuration. Also disclosed are embodiments of a microelectronic package including at least one microelectronic device disposed proximate to the glass routing structure of the microelectronic substrate and coupled with the microelectronic substrate by a plurality of interconnects. Further, disclosed are embodiments of a microelectronic structure including at least one microelectronic device embedded within a microelectronic encapsulant having a glass routing structure attached to the microelectronic encapsulant and a trace routing structure formed on the glass routing structure.

公开(公告)号：US20160343650A1

公开(公告)日：2016-11-24

申请号：US15228329

申请日：2016-08-04

Applicant: Intel Corporation

Inventor： Qing Ma ,  Johanna M. Swan

IPC: H01L23/498 ,  H05K1/18 ,  H01L21/48

CPC classification number: H01L23/49827 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/16 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/16238 ,  H01L2224/81192 ,  H01L2924/00013 ,  H01L2924/12042 ,  H05K1/0306 ,  H05K1/181 ,  H05K3/40 ,  H05K2201/10378 ,  Y10T29/49147 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/05599 ,  H01L2924/014 ,  H01L2924/00

Abstract: Embodiments of the present description relate to the field of fabricating microelectronic substrates. The microelectronic substrate may include a trace routing structure disposed between opposing glass layers. The trace routing structure may comprise one or more dielectric layers having conductive traces formed thereon and therethrough. Also disclosed are embodiments of a microelectronic package including a microelectronic device disposed proximate one glass layer of the microelectronic substrate and coupled with the microelectronic substrate by a plurality of interconnects.

Abstract translation: 本说明书的实施例涉及制造微电子基板的领域。 微电子衬底可以包括布置在相对的玻璃层之间的迹线路由结构。 迹线布线结构可以包括一个或多个具有形成在其上并具有导电迹线的电介质层。 还公开了微电子封装的实施例，其包括微电子器件，微电子器件设置在微电子衬底的一个玻璃层附近，并通过多个互连与微电子衬底耦合。

公开(公告)号：US20150156869A1

公开(公告)日：2015-06-04

申请号：US14618235

申请日：2015-02-10

Applicant: Intel Corporation

Inventor： Qing Ma ,  Johanna M. Swan ,  Robert Starkston ,  John S. Guzek ,  Robert L. Sankman ,  Aleksandar Aleksov

IPC: H05K1/03 ,  H01L21/48 ,  H05K1/11 ,  H01L23/498 ,  H05K1/02 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L23/5386 ,  B32B2457/08 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/09 ,  H01L24/13 ,  H01L24/17 ,  H01L24/19 ,  H01L24/24 ,  H01L24/81 ,  H01L24/82 ,  H01L25/0655 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/08238 ,  H01L2224/12105 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/2402 ,  H01L2224/24137 ,  H01L2224/81192 ,  H01L2224/814 ,  H01L2224/81801 ,  H01L2224/8185 ,  H01L2224/8203 ,  H01L2224/821 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/18162 ,  H01L2924/2064 ,  H01L2924/20641 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/115 ,  H05K1/185 ,  H05K3/4688 ,  H05K2201/017 ,  H05K2203/1469 ,  Y10T156/1057 ,  H01L2924/014 ,  H01L2924/00

Abstract: Embodiments of the present description relate to the field of fabricating microelectronic structures. The microelectronic structures may include a glass routing structure formed separately from a trace routing structure, wherein the glass routing structure is incorporated with the trace routing substrate, either in a laminated or embedded configuration. Also disclosed are embodiments of a microelectronic package including at least one microelectronic device disposed proximate to the glass routing structure of the microelectronic substrate and coupled with the microelectronic substrate by a plurality of interconnects. Further, disclosed are embodiments of a microelectronic structure including at least one microelectronic device embedded within a microelectronic encapsulant having a glass routing structure attached to the microelectronic encapsulant and a trace routing structure formed on the glass routing structure.

Abstract translation: 本说明书的实施例涉及制造微电子结构的领域。 微电子结构可以包括与轨迹路由结构分开形成的玻璃布线结构，其中玻璃布线结构以层叠或嵌入的形式结合到迹线布线基板中。 还公开了微电子封装的实施例，其包括设置在微电子衬底的玻璃布线结构附近并通过多个互连与微电子衬底耦合的至少一个微电子器件。 此外，公开了微电子结构的实施例，其包括嵌入微电子密封剂内的至少一个微电子器件，该微电子器件具有连接到微电子密封剂的玻璃布线结构和形成在玻璃布线结构上的迹线布线结构。

公开(公告)号：US10508961B2

公开(公告)日：2019-12-17

申请号：US14951422

申请日：2015-11-24

Applicant: Intel Corporation

Inventor： Kevin L. Lin ,  Qing Ma ,  Feras Eid ,  Johanna Swan ,  Weng Hong Teh

IPC: G01L9/00 ,  B81B7/00 ,  B81C1/00 ,  H01L23/00 ,  H01L29/84

Abstract: A semiconductor package having an air pressure sensor and methods to form a semiconductor package having an air pressure sensor are described. For example, a semiconductor package includes a plurality of build-up layers. A cavity is disposed in one or more of the build-up layers. An air pressure sensor is disposed in the plurality of build-up layers and includes the cavity and an electrode disposed above the cavity.

公开(公告)号：US10156583B2

公开(公告)日：2018-12-18

申请号：US15051856

申请日：2016-02-24

Applicant: Intel Corporation

Inventor： Qing Ma ,  Valluri Rao ,  Feras Eid ,  Kevin Lin ,  Weng Hong Teh ,  Johanna M. Swan ,  Robert L. Sankman

IPC: H01F7/06 ,  G01P15/097 ,  G01P15/105 ,  G01P15/18

Abstract: A method of manufacturing an accelerometer, including placing a magnet on a substrate, laminating a dielectric layer over the magnet, forming a conductive layer over the dielectric layer, the conductive layer including a mass and a conductive path overlying the magnet, removing a portion of the dielectric layer proximate the mass and conductive path such that the mass is movable in response to acceleration of the accelerometer, and forming a dielectric layer over the mass to form a space between the mass and the dielectric layer formed over the mass sufficiently clear such that the mass remains movable.

公开(公告)号：US10008452B2

公开(公告)日：2018-06-26

申请号：US15469964

申请日：2017-03-27

Applicant: INTEL CORPORATION

Inventor： Qing Ma ,  Johanna M. Swan ,  Robert Starkston ,  John S. Guzek ,  Robert L. Sankman ,  Aleksandar Aleksov

IPC: H01L29/40 ,  H01L23/538 ,  H01L23/15 ,  H01L25/065 ,  H01L23/00 ,  H01L21/48 ,  H01L23/498 ,  H01L21/683

CPC classification number: H01L23/5386 ,  B32B2457/08 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/09 ,  H01L24/13 ,  H01L24/17 ,  H01L24/19 ,  H01L24/24 ,  H01L24/81 ,  H01L24/82 ,  H01L25/0655 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/08238 ,  H01L2224/12105 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/2402 ,  H01L2224/24137 ,  H01L2224/81192 ,  H01L2224/814 ,  H01L2224/81801 ,  H01L2224/8185 ,  H01L2224/8203 ,  H01L2224/821 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/18162 ,  H01L2924/2064 ,  H01L2924/20641 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/115 ,  H05K1/185 ,  H05K3/4688 ,  H05K2201/017 ,  H05K2203/1469 ,  Y10T156/1057 ,  H01L2924/014 ,  H01L2924/00

Abstract: Embodiments of the present description relate to the field of fabricating microelectronic structures. The microelectronic structures may include a glass routing structure formed separately from a trace routing structure, wherein the glass routing structure is incorporated with the trace routing substrate, either in a laminated or embedded configuration. Also disclosed are embodiments of a microelectronic package including at least one microelectronic device disposed proximate to the glass routing structure of the microelectronic substrate and coupled with the microelectronic substrate by a plurality of interconnects. Further, disclosed are embodiments of a microelectronic structure including at least one microelectronic device embedded within a microelectronic encapsulant having a glass routing structure attached to the microelectronic encapsulant and a trace routing structure formed on the glass routing structure.

公开(公告)号：US20180138001A1

公开(公告)日：2018-05-17

申请号：US15633237

申请日：2017-06-26

Applicant: Intel Corporation

Inventor： Qing Ma ,  Johanna M. Swan ,  Valluri Rao ,  Feras Eid

IPC: H01H59/00 ,  H01H50/00 ,  H01Q5/314

Abstract: An electronic device and methods including a switch formed in a chip package are shown. An electronic device and methods including a switch formed in a polymer based dielectric are shown. Examples of switches shown include microelectromechanical system (MEMS) structures, such as cantilever switches and/or shunt switches.

公开(公告)号：US09691579B2

公开(公告)日：2017-06-27

申请号：US14368771

申请日：2013-12-17

Applicant: Intel Corporation

Inventor： Qing Ma ,  Johanna Swan ,  Valluri Rao ,  Feras Eid

IPC: H01H59/00 ,  H01Q5/314 ,  H01H50/00

CPC classification number: H01H59/0009 ,  H01H50/005 ,  H01H2229/016 ,  H01H2229/05 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01Q5/314

Abstract: An electronic device and methods including a switch formed in a chip package are shown. An electronic device and methods including a switch formed in a polymer based dielectric are shown. Examples of switches shown include microelectromechanical system (MEMS) structures, such as cantilever switches and/or shunt switches.

公开(公告)号：US09686861B2

公开(公告)日：2017-06-20

申请号：US15172029

申请日：2016-06-02

Applicant: Intel Corporation

Inventor： Qing Ma ,  Quan A. Tran ,  Robert L. Sankman ,  Johanna M. Swan ,  Valluri R. Rao

IPC: H05K1/11 ,  H01L21/48 ,  H01L23/367 ,  H01L23/498 ,  H05K3/46 ,  H01L23/15 ,  H05K3/00

CPC classification number: H05K1/112 ,  H01L21/4803 ,  H01L21/486 ,  H01L23/15 ,  H01L23/3675 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/10253 ,  H05K3/0014 ,  H05K3/4605 ,  H05K3/4644 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10287 ,  H05K2201/10371 ,  H05K2201/10674 ,  H05K2203/0108 ,  H05K2203/0228 ,  H05K2203/025 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/0401

Abstract: Disclosed are embodiments of a glass core substrate for an integrated circuit (IC) device. The glass core substrate includes a glass core and build-up structures on opposing sides of the glass core. Electrically conductive terminals may be formed on both sides of the glass core substrate. An IC die may be coupled with the terminals on one side of the substrate, whereas the terminals on the opposing side may be coupled with a next-level component, such as a circuit board. The glass core may comprise a single piece of glass in which conductors have been formed, or the glass core may comprise two or more glass sections that have been joined together, each section having conductors. The conductors extend through the glass core, and one or more of the conductors may be electrically coupled with the build-up structures disposed over the glass core. Other embodiments are described and claimed.