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公开(公告)号：US11424539B2
公开(公告)日：2022-08-23
申请号：US16472830
申请日：2017-12-20
Applicant: Intel Corporation
Inventor： Erkan Alpman , Arnaud Lucres Amadjikpe , Omer Asaf , Kameran Azadet , Rotem Banin , Miroslav Baryakh , Anat Bazov , Stefano Brenna , Bryan K. Casper , Anandaroop Chakrabarti , Gregory Chance , Debabani Choudhury , Emanuel Cohen , Claudio Da Silva , Sidharth Dalmia , Saeid Daneshgar Asl , Kaushik Dasgupta , Kunal Datta , Brandon Davis , Ofir Degani , Amr M. Fahim , Amit Freiman , Michael Genossar , Eran Gerson , Eyal Goldberger , Eshel Gordon , Meir Gordon , Josef Hagn , Shinwon Kang , Te Yu Kao , Noam Kogan , Mikko S. Komulainen , Igal Yehuda Kushnir , Saku Lahti , Mikko M. Lampinen , Naftali Landsberg , Wook Bong Lee , Run Levinger , Albert Molina , Resti Montoya Moreno , Tawfiq Musah , Nathan G. Narevsky , Hosein Nikopour , Oner Orhan , Georgios Palaskas , Stefano Pellerano , Ron Pongratz , Ashoke Ravi , Shmuel Ravid , Peter Andrew Sagazio , Eren Sasoglu , Lior Shakedd , Gadi Shor , Baljit Singh , Menashe Soffer , Ra'anan Sover , Shilpa Talwar , Nebil Tanzi , Moshe Teplitsky , Chintan S. Thakkar , Jayprakash Thakur , Avi Tsarfati , Yossi Tsfati , Marian Verhelst , Nir Weisman , Shuhei Yamada , Ana M. Yepes , Duncan Kitchin
IPC: H01Q5/47 , H01Q9/04 , H01Q1/24 , H01Q1/38 , H01Q1/48 , H01Q3/24 , H01Q21/24 , H03L7/14 , H04B1/3827 , H04B7/0456 , H04B7/06 , H04B15/04
Abstract: Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.
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公开(公告)号：US10756931B2
公开(公告)日：2020-08-25
申请号：US16452381
申请日：2019-06-25
Applicant: Intel Corporation
Inventor： Tawfiq Musah , Hariprasath Venkatram , Bryan K. Casper
Abstract: Described is an apparatus which comprises: a Variable Gain Amplifier (VGA); a set of samplers to sample data output from the VGA according to a clock signal; and a Clock Data Recovery (CDR) circuit to adjust phase of the clock signal such that magnitude of a first post-cursor signal associated with the sampled data is substantially half of a magnitude of a primary cursor tap associated with the sampled data.
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公开(公告)号：US09794089B2
公开(公告)日：2017-10-17
申请号：US15187382
申请日：2016-06-20
Applicant: Intel Corporation
Inventor： Tawfiq Musah , Gokce Keskin , Ganesh Balamurugan , James E. Jaussi , Bryan K. Casper
CPC classification number: H04L25/03057 , H04L7/0058 , H04L7/0087 , H04L7/033 , H04L25/03146 , H04L25/14
Abstract: Some embodiments include apparatus and methods having an input to receive an input signal, additional inputs to receive clock signals having different phases to sample the input signal, and a decision feedback equalizer (DFE) having DFE slices. The DFE slices include a number of data comparators to provide data information based on the sampling of the input signal, and a number of phase error comparators to provide phase error information associated with the sampling of the input signal. The number of phase error comparators of the DFE slices is not greater than the number of data comparators of the DFE slices.
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公开(公告)号：US20160301548A1
公开(公告)日：2016-10-13
申请号：US15187382
申请日：2016-06-20
Applicant: Intel Corporation
Inventor： Tawfiq Musah , Gokce Keskin , Ganesh Balamurugan , James E. Jaussi , Bryan K. Casper
CPC classification number: H04L25/03057 , H04L7/0058 , H04L7/0087 , H04L7/033 , H04L25/03146 , H04L25/14
Abstract: Some embodiments include apparatus and methods having an input to receive an input signal, additional inputs to receive clock signals having different phases to sample the input signal, and a decision feedback equalizer (DFE) having DFE slices. The DFE slices include a number of data comparators to provide data information based on the sampling of the input signal, and a number of phase error comparators to provide phase error information associated with the sampling of the input signal. The number of phase error comparators of the DFE slices is not greater than the number of data comparators of the DFE slices.
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公开(公告)号：US20240243477A1
公开(公告)日：2024-07-18
申请号：US18442331
申请日：2024-02-15
Applicant: Intel Corporation
Inventor： Erkan Alpman , Arnaud Lucres Amadjikpe , Omer Asaf , Kameran Azadet , Rotem Banin , Miroslav Baryakh , Anat Bazov , Stefano Brenna , Bryan K. Casper , Anandaroop Chakrabarti , Gregory Chance , Debabani Choudhury , Emanuel Cohen , Claudio Da Silva , Sidharth Dalmia , Saeid Daneshgar Asl , Kaushik Dasgupta , Kunal Datta , Ofir Degani , Amr M. Fahim , Amit Freiman , Michael Genossar , Eran Gerson , Eyal Goldberger , Eshel Gordon , Meir Gordon , Josef Hagn , Shinwon Kang , Te Yu Kao , Noam Kogan , Mikko S. Komulainen , Igal Yehuda Kushnir , Saku Lahti , Mikko M. Lampinen , Naftali Landsberg , Wook Bong Lee , Run Levinger , Albert Molina , Resti Montoya Moreno , Tawfiq Musah , Nathan G. Narevsky , Hosein Nikopour , Oner Orhan , Georgios Palaskas , Stefano Pellerano , Ron Pongratz , Ashoke Ravi , Shmuel Ravid , Peter Andrew Sagazio , Eren Sasoglu , Lior Shakedd , Gadi Shor , Baljit Singh , Menashe Soffer , Ra'anan Sover , Shilpa Talwar , Nebil Tanzi , Moshe Teplitsky , Chintan S. Thakkar , Jayprakash Thakur , Avi Tsarfati , Marian Verhelst , Yossi Tsfati , Nir Weisman , Shuhei Yamada , Ana M. Yepes , Duncan Kitchin
IPC: H01Q9/04 , H01Q1/24 , H01Q1/38 , H01Q1/48 , H01Q3/24 , H01Q5/47 , H01Q21/24 , H03L7/14 , H04B1/3827 , H04B7/0456 , H04B7/06 , H04B15/04
CPC classification number: H01Q9/0414 , H01Q1/243 , H01Q1/38 , H01Q1/48 , H01Q3/24 , H01Q5/47 , H01Q21/24 , H03L7/145 , H04B1/3827 , H04B7/0482 , H04B7/0639 , H04B15/04
Abstract: Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.
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Patent Agency Ranking
公开(公告)号：US20230145401A1
公开(公告)日：2023-05-11
申请号：US18089220
申请日：2022-12-27
Applicant: Intel Corporation
Inventor： Erkan Alpman , Arnaud Lucres Amadjikpe , Omer Asaf , Kameran Azadet , Rotem Banin , Miroslav Baryakh , Anat Bazov , Stefano Brenna , Bryan K. Casper , Anandaroop Chakrabarti , Gregory Chance , Debabani Choudhury , Emanuel Cohen , Claudio Da Silva , Sidharth Dalmia , Saeid Daneshgar Asl , Kaushik Dasgupta , Kunal Datta , Brandon Davis , Ofir Degani , Amr M. Fahim , Amit Freiman , Michael Genossar , Eran Gerson , Eyal Goldberger , Eshel Gordon , Meir Gordon , Josef Hagn , Shinwon Kang , Te Yu Kao , Noam Kogan , Mikko S. Komulainen , Igal Yehuda Kushnir , Saku Lahti , Mikko M. Lampinen , Naftali Landsberg , Wook Bong Lee , Run Levinger , Albert Molina , Resti Montoya Moreno , Tawfiq Musah , Nathan G. Narevsky , Hosein Nikopour , Oner Orhan , Georgios Palaskas , Stefano Pellerano , Ron Pongratz , Ashoke Ravi , Shmuel Ravid , Peter Andrew Sagazio , Eren Sasoglu , Lior Shakedd , Gadi Shor , Baljit Singh , Menashe Soffer , Ra'anan Sover , Shilpa Talwar , Nebil Tanzi , Moshe Teplitsky , Chintan S. Thakkar , Jayprakash Thakur , Avi Tsarfati , Yossi Tsfati , Marian Verhelst , Nir Weisman , Shuhei Yamada , Ana M. Yepes , Duncan Kitchin
IPC: H01Q9/04 , H01Q5/47 , H01Q1/24 , H01Q1/38 , H01Q1/48 , H01Q3/24 , H01Q21/24 , H03L7/14 , H04B1/3827 , H04B7/0456 , H04B7/06 , H04B15/04
CPC classification number: H01Q9/0414 , H01Q5/47 , H01Q1/243 , H01Q1/38 , H01Q1/48 , H01Q3/24 , H01Q21/24 , H03L7/145 , H04B1/3827 , H04B7/0482 , H04B7/0639 , H04B15/04
Abstract: Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.
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公开(公告)号：US10341145B2
公开(公告)日：2019-07-02
申请号：US14637291
申请日：2015-03-03
Applicant: Intel Corporation
Inventor： Tawfiq Musah , Hariprasath Venkatram , Bryan K. Casper
Abstract: Described is an apparatus which comprises: a Variable Gain Amplifier (VGA); a set of samplers to sample data output from the VGA according to a clock signal; and a Clock Data Recovery (CDR) circuit to adjust phase of the clock signal such that magnitude of a first post-cursor signal associated with the sampled data is substantially half of a magnitude of a primary cursor tap associated with the sampled data.
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公开(公告)号：US20170229161A1
公开(公告)日：2017-08-10
申请号：US15439800
申请日：2017-02-22
Applicant: Intel Corporation
Inventor： Jaydeep P. Kulkarni , Ashoke Ravi , Dinesh Somasekhar , Ganesh Balamurugan , Sudip Shekhar , Tawfiq Musah , Tzu-Chien Hsueh
CPC classification number: G11C11/161 , G05F3/00 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C13/0004 , G11C13/0011 , G11C13/003 , G11C2213/74 , G11C2213/79 , G11C2213/82 , H03H11/22 , H03K3/356104 , H03K19/018557 , H03K19/018585 , H03M1/12 , H03M1/362 , H03M1/66 , H03M1/765 , H04L25/00 , H04L25/03878
Abstract: Embodiments include a resistor, coupled on a signal path, that includes one or more resistive memory elements, such as one or more magnetic tunnel junctions (MTJs). The resistance of the resistive memory elements may be digitally trimmable to adjust a resistance of the resistor on the signal path. The resistor may be incorporated into an analog or mixed signal circuit to pass an analog signal on the signal path. Other embodiments may be described and claimed.
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公开(公告)号：US20160277219A1
公开(公告)日：2016-09-22
申请号：US14660799
申请日：2015-03-17
Applicant: Intel Corporation
Inventor： Hariprasath Venkatram , Sami Hyvonen , Tawfiq Musah , Bryan K. Casper
CPC classification number: H04L25/03057 , H04L7/0062 , H04L7/033 , H04L7/0334 , H04L25/03878
Abstract: Described is an apparatus which comprises: an amplifier; a first set of samplers to sample data output from the amplifier according to a clock signal, the set of samplers to generate an output; and a converter to convert the output of the first set of samplers to 1 -hot encoded data.
Abstract translation: 描述了一种装置，包括：放大器; 第一组采样器，用于根据时钟信号对从放大器输出的数据进行采样，该采样器组用于产生输出; 以及将第一组采样器的输出转换为1 -hot编码数据的转换器。
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20.发明申请LOW POWER HIGH SPEED RECEIVER WITH REDUCED DECISION FEEDBACK EQUALIZER SAMPLERS 审中-公开低功率高速接收器，具有降低响应的反馈均衡器采样器公开(公告)号：US20160261435A1
公开(公告)日：2016-09-08
申请号：US14637291
申请日：2015-03-03
Applicant: INTEL CORPORATION
Inventor： Tawfiq Musah , Hariprasath Venkatram , Bryan K. Casper
IPC: H04L25/03
CPC classification number: H04L25/03019 , H04L7/0062 , H04L7/0334 , H04L25/03038 , H04L25/03057 , H04L25/03885
Abstract: Described is an apparatus which comprises: a Variable Gain Amplifier (VGA); a set of samplers to sample data output from the VGA according to a clock signal; and a Clock Data Recovery (CDR) circuit to adjust phase of the clock signal such that magnitude of a first post-cursor signal associated with the sampled data is substantially half of a magnitude of a primary cursor tap associated with the sampled data.
Abstract translation: 描述了一种装置，其包括：可变增益放大器（VGA）; 一组采样器，用于根据时钟信号对从VGA输出的数据进行采样; 以及时钟数据恢复（CDR）电路，用于调整时钟信号的相位，使得与采样数据相关联的第一后置光标信号的大小基本上是与采样数据相关联的主光标抽头的幅度的一半。
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