Abstract:
A semiconductor package structure has a first electronic component on an insulating layer, a dielectric layer on the insulating layer and surrounding the first electronic component, a second electronic component stacked on the first electronic component, wherein an active surface of the first electronic component faces an active surface of the second electronic component, a molding compound on the first electronic component and surrounding the second electronic component, a third electronic component stacked on the second electronic component and the molding compound.
Abstract:
A semiconductor package structure is provided. The structure includes a first semiconductor die having a first surface and a second surface opposite thereto. A first molding compound surrounds the first semiconductor die. A first redistribution layer (RDL) structure is disposed on the second surface of the first semiconductor die and laterally extends on the first molding compound. A second semiconductor die is disposed on the first RDL structure and has a first surface and a second surface opposite thereto. A second molding compound surrounds the second semiconductor die. A first protective layer covers a sidewall of the first RDL structure and a sidewall of the first molding compound.
Abstract:
A semiconductor package structure is provided. The structure includes a molding compound having a dicing lane region. A semiconductor die is disposed in the molding compound and surrounded by the dicing lane region. The semiconductor die has a first surface and a second surface opposite thereto, and the first and second surfaces are exposed from the molding compound. The structure further includes a redistribution layer (RDL) structure disposed on the first surface of the semiconductor die and covering the molding compound. The RDL structure includes a photo-sensitive material and has an opening aligned with the dicing lane region.
Abstract:
The invention provides a semiconductor package assembly. The semiconductor package assembly includes a semiconductor die. A first molding compound covers a back surface of the semiconductor die. A redistribution layer (RDL) structure is disposed on a front surface of the semiconductor die. The semiconductor die is coupled to the RDL structure. A second molding compound is disposed on the front surface of the semiconductor die and embedded in the RDL structure. A passive device is disposed on the second molding compound and coupled to the semiconductor die.
Abstract:
A semiconductor package structure is provided. The semiconductor package structure includes a substrate, a semiconductor die disposed over the substrate, and a frame disposed over the substrate. The frame is adjacent to the semiconductor die, and an upper surface of the frame is lower than the upper surface of the semiconductor die. IN addition, a passive component is disposed on the substrate and located between the frame and the semiconductor die.
Abstract:
The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first semiconductor package and a second semiconductor package overlying a portion of the first semiconductor package. The first semiconductor package includes a first redistribution layer (RDL) structure, a first semiconductor die and a molding compound. The first semiconductor die is disposed on a first surface of the first RDL structure and electrically coupled to the first RDL structure. The molding compound is positioned overlying the first semiconductor die and the first surface of the first RDL structure. The second semiconductor package includes a first memory die and a second memory die vertically stacked on the first memory die. The second memory die is electrically coupled to first memory die by through silicon via (TSV) interconnects formed passing through the second memory die.
Abstract:
The invention provides a semiconductor package assembly. The semiconductor package assembly includes a redistribution layer (RDL) structure. The RDL structure includes a conductive trace. A redistribution layer (RDL) contact pad is electrically coupled to the conductive trace. The RDL contact pad is composed of a symmetrical portion and an extended wing portion connected to the symmetrical portion. The extended wing portion overlaps at least one-half of a boundary of the symmetrical portion when observed from a plan view.
Abstract:
A semiconductor package structure is provided. The semiconductor package structure includes a semiconductor body and a conductive structure disposed below the semiconductor body. The semiconductor package structure also includes an insulating layer surrounding the conductive structure. The semiconductor package structure further includes a redistribution layer structure coupled to the conductive structure. In addition, the semiconductor package structure includes a molding compound surrounding the semiconductor body. A portion of the molding compound extends between the redistribution layer structure and the semiconductor body.
Abstract:
A semiconductor package structure is provided. The semiconductor package structure includes a first semiconductor package that includes a first semiconductor die having a first surface and a second surface opposite thereto. A first package substrate is disposed on the first surface of the first semiconductor die. A first molding compound surrounds the first semiconductor die and the first package substrate. A first redistribution layer (RDL) structure is disposed on the first molding compound, in which the first package substrate is interposed and electrically coupled between the first semiconductor die and the first RDL structure.
Abstract:
A semiconductor package assembly is provided. The semiconductor package assembly includes a first semiconductor package. The first semiconductor package includes a first semiconductor die. A first redistribution layer (RDL) structure is coupled to the first semiconductor die. The semiconductor package assembly also includes a second semiconductor package bonded to the first semiconductor package. The second semiconductor package includes a second semiconductor die. An active surface of the second semiconductor die faces an active surface of the first semiconductor die. A second RDL structure is coupled to the second semiconductor die. The first RDL structure is positioned between the first semiconductor die and the second RDL structure.