公开(公告)号：US09318406B2

公开(公告)日：2016-04-19

申请号：US11887082

申请日：2006-03-04

Applicant: Harald Prautzsch

Inventor： Harald Prautzsch

IPC: H05K1/02 ,  H05K7/00 ,  H01L23/34 ,  H01L23/373 ,  H01L23/62 ,  H01L23/40 ,  H05K3/00

CPC classification number: H05K1/0203 ,  H01L23/34 ,  H01L23/3735 ,  H01L23/4006 ,  H01L23/62 ,  H01L2924/0002 ,  H05K1/0206 ,  H05K1/0207 ,  H05K3/0061 ,  H05K2201/09745 ,  H05K2201/10409 ,  H05K2201/1056 ,  H01L2924/00

Abstract: A method for determining the temperature of a heat source and an electronic unit, including a printed-circuit board equipped with a sensor and a heat sink, the sensor being connected to the heat sink in a heat-conducting manner.

Abstract translation: 一种用于确定热源和电子单元的温度的方法，包括装有传感器和散热器的印刷电路板，传感器以导热方式连接到散热器。

公开(公告)号：US09261252B2

公开(公告)日：2016-02-16

申请号：US13368140

申请日：2012-02-07

Applicant: Nam Seok Oh ,  Yun Min Cho ,  Jong Woo Lee

Inventor： Nam Seok Oh ,  Yun Min Cho ,  Jong Woo Lee

IPC: H01L27/15 ,  F21S8/10 ,  H05K1/05 ,  H05K1/18 ,  H01L25/075 ,  H01L33/58 ,  F21V9/16 ,  F21Y101/02 ,  H05K3/28 ,  F21V3/04 ,  F21V7/22 ,  F21V13/02

CPC classification number: F21S41/147 ,  F21S41/125 ,  F21S41/141 ,  F21S41/255 ,  F21S41/285 ,  F21S41/321 ,  F21S41/36 ,  F21S41/365 ,  F21S41/43 ,  F21S45/47 ,  F21V3/08 ,  F21V7/22 ,  F21V9/30 ,  F21V13/02 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L27/153 ,  H01L33/58 ,  H01L2224/48091 ,  H05K1/05 ,  H05K1/183 ,  H05K3/284 ,  H05K2201/09745 ,  H05K2201/10106 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Disclosed is a light emitting module including a light emitting device package having a circuit board having a cavity, an insulation substrate arranged in the cavity, with a conductive pattern formed thereon, and at least one light emitting device disposed on the insulation substrate, with being electrically connected with the conductive pattern; and a glass cover located on the light emitting device package, with lateral surfaces, a top surface and an open bottom surface, wherein the light emitting device package and the circuit board are electrically connected with each other.

Abstract translation: 公开了一种发光模块，其包括发光器件封装，其具有具有空腔的电路板，布置在腔中的绝缘基板，其上形成有导电图案，以及设置在绝缘基板上的至少一个发光器件， 与导电图案电连接; 以及玻璃盖，其位于所述发光器件封装上，具有侧表面，顶表面和开放的底表面，其中所述发光器件封装和所述电路板彼此电连接。

公开(公告)号：US09247644B2

公开(公告)日：2016-01-26

申请号：US14329062

申请日：2014-07-11

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Kentaro Kaneko ,  Kazuhiro Kobayashi ,  Toshimitsu Omiya ,  Kotaro Kodani ,  Shunichiro Matsumoto ,  Ruofan Tang

IPC: H05K1/03 ,  H05K1/09 ,  H05K1/00 ,  H05K7/10 ,  H05K1/11 ,  H05K3/34 ,  H05K3/24 ,  H05K3/38 ,  H05K3/46

CPC classification number: H05K1/113 ,  H05K3/244 ,  H05K3/3452 ,  H05K3/383 ,  H05K3/4682 ,  H05K2201/09472 ,  H05K2201/09745 ,  H05K2201/2072 ,  H05K2203/0152 ,  H05K2203/0307 ,  H05K2203/0376 ,  H05K2203/0384 ,  H05K2203/1184 ,  H05K2203/308

Abstract: A wiring substrate includes an insulating layer, a pad, and a solder resist layer. The insulating layer has a first surface formed with a first recess portion. The pad is embedded in the first recess portion. The pad includes a second surface and a third surface. The third surface that is located at a lower position than the first surface so as to expose an inner wall surface of the first recess portion. The pad is formed with a second recess portion in a center portion of the third surface. The solder resist layer is provided on the first surface. An adjacent portion of the first surface to a peripheral portion of the first recess portion is smaller in roughness than a region of the first surface peripheral to the adjacent portion of the first surface.

Abstract translation: 布线基板包括绝缘层，焊盘和阻焊层。 绝缘层具有形成有第一凹部的第一表面。 衬垫嵌入第一凹部。 垫包括第二表面和第三表面。 所述第三表面位于比所述第一表面更低的位置处，以暴露所述第一凹部的内壁表面。 垫在第三表面的中心部分形成有第二凹部。 阻焊层设置在第一表面上。 所述第一表面与所述第一凹部的周边部分的相邻部分的粗糙度小于所述第一表面的相邻部分的周边的第一表面的区域。

公开(公告)号：US09237659B2

公开(公告)日：2016-01-12

申请号：US13631683

申请日：2012-09-28

Applicant: MD Altaf Hossain ,  Scott A. Gilbert

Inventor： MD Altaf Hossain ,  Scott A. Gilbert

IPC: H01R9/00 ,  H05K3/34 ,  H05K1/11 ,  H01L23/498 ,  H01L21/48

CPC classification number: H05K3/3436 ,  B23K31/02 ,  H01L21/4853 ,  H01L23/49816 ,  H01L2224/16 ,  H01L2924/0002 ,  H05K1/111 ,  H05K3/3478 ,  H05K2201/09745 ,  H05K2203/041 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00

Abstract: A BGA structure having larger solder balls in high stress regions of the array is disclosed. The larger solder balls have higher solder joint reliability (SJR) and as such may be designated critical to function (CTF), whereby the larger solder balls in high stress regions carry input/output signals between a circuit board and a package mounted thereon. The larger solder balls are accommodated by recessing each ball in the package substrate, the circuit board, or both the package substrate and the circuit board. Additionally, a ball attach method for mounting a plurality of solder balls having different average diameters is disclosed.

Abstract translation: 公开了一种在阵列的高应力区域具有较大焊球的BGA结构。 较大的焊球具有较高的焊点可靠性（SJR），因此可被指定为关键功能（CTF），因此高应力区域中较大的焊球在电路板和安装在其上的封装之间承载输入/输出信号。 通过将封装基板，电路板或封装基板和电路板两者中的每个球凹入来容纳较大的焊球。 另外，公开了一种用于安装具有不同平均直径的多个焊球的球附着方法。

公开(公告)号：US20150342045A1

公开(公告)日：2015-11-26

申请号：US14718094

申请日：2015-05-21

Applicant: NICHIA CORPORATION

Inventor： Takuya NAKABAYASHI ,  Akira HORI

IPC: H05K1/11 ,  H05K1/18 ,  F21V8/00

CPC classification number: H05K1/111 ,  G02B6/0066 ,  G02B6/0073 ,  H05K1/181 ,  H05K3/3442 ,  H05K2201/09381 ,  H05K2201/09427 ,  H05K2201/09472 ,  H05K2201/09745 ,  H05K2201/10106 ,  H05K2201/10454 ,  H05K2203/048 ,  Y02P70/611

Abstract: A semiconductor device mounting structure includes a semiconductor device and a mounting substrate. The semiconductor device includes a first external connection terminal and a device-side mounting insulating region. The first external connection terminal is provided at a first end and has a metal region on a semiconductor mounting surface of the semiconductor device. The device-side mounting insulating region is defined by the metal region on the semiconductor mounting surface. The semiconductor mounting surface faces a substrate mounting surface. The mounting substrate has on the substrate mounting surface a land pattern made of an electrically conductive material to be electrically connected to the first external connection terminal. The land pattern is provided in a first shape to surround the device-side mounting insulating region and includes a land-side insulating region which has a second shape to correspond to a periphery of the device-side mounting insulating region.

Abstract translation: 半导体器件安装结构包括半导体器件和安装基板。 半导体器件包括第一外部连接端子和器件侧安装绝缘区域。 第一外部连接端子设置在第一端，并且在半导体器件的半导体安装表面上具有金属区域。 器件侧安装绝缘区域由半导体安装表面上的金属区域限定。 半导体安装表面面向基板安装表面。 安装基板在基板安装表面上具有由导电材料制成的焊盘图案，以电连接到第一外部连接端子。 所述焊盘图案设置成围绕所述器件侧安装绝缘区域的第一形状，并且包括具有与所述器件侧安装绝缘区域的周边相对应的第二形状的焊盘侧绝缘区域。

公开(公告)号：US20150235914A1

公开(公告)日：2015-08-20

申请号：US14328092

申请日：2014-07-10

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chang-Fu Lin ,  Chin-Tsai Yao ,  Ming-Chin Chuang ,  Po-Hua Chen ,  Fu-Tang Huang

IPC: H01L23/13 ,  H05K3/46 ,  H05K1/11 ,  C25D5/02 ,  H01L23/00 ,  H01L21/48

CPC classification number: H05K3/4661 ,  C25D5/02 ,  C25D5/48 ,  C25D7/00 ,  H01L21/4853 ,  H01L23/49894 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/131 ,  H01L2224/16237 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2224/81444 ,  H01L2224/81815 ,  H01L2924/3841 ,  H05K1/111 ,  H05K3/244 ,  H05K3/3436 ,  H05K2201/09745 ,  H05K2201/099 ,  H05K2201/10674 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A flip-chip packaging substrate is provided, which includes: a substrate body; a plurality of conductive pads formed on a surface of the substrate body; an insulating layer formed on the surface of the substrate body and having a plurality of openings correspondingly exposing a portion of each of the conductive pads; and a metal layer formed on each of the conductive pads in the openings, wherein the metal layer has a top surface having a lowest point lower than a top surface of the insulating layer, and a thickness ratio of the metal layer to the insulating layer is greater than or equal to 1/4 and less than 1, thereby preventing a solder bridge or short circuit from occurring.

Abstract translation: 提供一种倒装芯片封装基板，其包括：基板主体; 形成在所述基板主体的表面上的多个导电焊盘; 绝缘层，其形成在所述基板主体的表面上并且具有多个开口，对应地暴露所述导电焊盘的每一个的一部分; 以及形成在所述开口中的每个所述导电焊盘上的金属层，其中，所述金属层具有比所述绝缘层的顶表面低的最低点的顶表面，并且所述金属层与所述绝缘层的厚度比为 大于或等于1/4且小于1，从而防止发生焊料桥或短路。

公开(公告)号：US20150014027A1

公开(公告)日：2015-01-15

申请号：US14329062

申请日：2014-07-11

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Kentaro Kaneko ,  Kazuhiro Kobayashi ,  Toshimitsu Omiya ,  Kotaro Kodani ,  Shunichiro Matsumoto ,  Ruofan Tang

IPC: H05K1/11 ,  H05K1/03

CPC classification number: H05K1/113 ,  H05K3/244 ,  H05K3/3452 ,  H05K3/383 ,  H05K3/4682 ,  H05K2201/09472 ,  H05K2201/09745 ,  H05K2201/2072 ,  H05K2203/0152 ,  H05K2203/0307 ,  H05K2203/0376 ,  H05K2203/0384 ,  H05K2203/1184 ,  H05K2203/308

Abstract: A wiring substrate includes an insulating layer, a pad, and a solder resist layer. The insulating layer has a first surface formed with a first recess portion. The pad is embedded in the first recess portion. The pad includes a second surface and a third surface. The third surface that is located at a lower position than the first surface so as to expose an inner wall surface of the first recess portion. The pad is formed with a second recess portion in a center portion of the third surface. The solder resist layer is provided on the first surface. An adjacent portion of the first surface to a peripheral portion of the first recess portion is smaller in roughness than a region of the first surface peripheral to the adjacent portion of the first surface.

Abstract translation: 布线基板包括绝缘层，焊盘和阻焊层。 绝缘层具有形成有第一凹部的第一表面。 衬垫嵌入第一凹部。 垫包括第二表面和第三表面。 所述第三表面位于比所述第一表面更低的位置处，以暴露所述第一凹部的内壁表面。 垫在第三表面的中心部分形成有第二凹部。 阻焊层设置在第一表面上。 所述第一表面与所述第一凹部的周边部分的相邻部分的粗糙度小于所述第一表面的相邻部分的周边的第一表面的区域。

公开(公告)号：USRE45146E1

公开(公告)日：2014-09-23

申请号：US13846941

申请日：2013-03-18

Applicant: Taiyo Yuden Co., Ltd.

Inventor： Masashi Miyazaki ,  Mitsuhiro Takayama ,  Tatsuro Sawatari

IPC: H01L23/04

CPC classification number: H05K1/185 ,  H01L23/49822 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/2518 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15159 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H05K1/021 ,  H05K3/445 ,  H05K3/4641 ,  H05K2201/0969 ,  H05K2201/09745 ,  H01L2924/00

Abstract: A composite multi-layer substrate comprising a flat plate-like core member formed of a material having an excellent electric conductivity, an excellent heat conductivity, and a high rigidity, a front resin layer and a rear resin layer covering at least the front and rear surfaces of the core member, and a bottomless hole formed in the core member through the front and rear sides of the core member, wherein an electronic component is installed in the bottomless hole, whereby since the strength of the composite multi-layer substrate can be assured by the rigidity of the core member, conventional prior art glass cloth can be eliminated, deterioration in the electric characteristics caused by ion migration can be avoided and will result in reduced production cost.

Abstract translation: 一种复合多层基板，包括由具有优异导电性，优异导热性和高刚性的材料形成的平板状芯体，至少覆盖前后树脂层和后树脂层 芯构件的表面和通过芯构件的前后侧形成在芯构件中的无底孔，其中电子部件安装在无底孔中，由此，复合多层基板的强度可以 通过芯构件的刚性保证，可以消除传统的现有技术的玻璃布，可以避免由离子迁移引起的电特性的劣化，并且将导致降低生产成本。

公开(公告)号：US20140168979A1

公开(公告)日：2014-06-19

申请号：US13855647

申请日：2013-04-02

Applicant: HON HAI PRECISION INDUSTRY CO., LTD.

Inventor： CHIH-CHEN LAI

IPC: F21V29/00

CPC classification number: F21V29/80 ,  F21K9/00 ,  F21Y2105/10 ,  F21Y2115/10 ,  H01L2224/48091 ,  H05K1/0204 ,  H05K3/0061 ,  H05K2201/09745 ,  H05K2201/10106 ,  H05K2201/10242 ,  H01L2924/00014

Abstract: An exemplary light-emitting diode (LED) module includes a base, a substrate arranged on the base, and LED chips mounted on the substrate. Through holes are defined in the substrate. The through holes are spaced from each other. Heat-conducting poles extend through the through holes, and a top end of each heat-conducting pole connects the LED chip and a bottom end of each heat-conducting pole connects the base. Heat generated from the LED chips is absorbed by the heat-conducting poles, and then transferred to the base for dissipation from the base.

Abstract translation: 示例性的发光二极管（LED）模块包括基座，布置在基座上的基板和安装在基板上的LED芯片。 在基板中限定通孔。 通孔彼此间隔开。 导热柱延伸穿过通孔，每个导热柱的顶端连接LED芯片，每个导热柱的底端连接底座。 从LED芯片产生的热量被导热极吸收，然后转移到基座以从基座中消散。

公开(公告)号：US20130335940A1

公开(公告)日：2013-12-19

申请号：US14002346

申请日：2012-03-01

Applicant: Takashi Matsui ,  Motoji Shiota ,  Hiroki Nakahama

Inventor： Takashi Matsui ,  Motoji Shiota ,  Hiroki Nakahama

IPC: H05K1/18

CPC classification number: H05K1/18 ,  G02F1/13454 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/10165 ,  H01L2224/13013 ,  H01L2224/13144 ,  H01L2224/14132 ,  H01L2224/14133 ,  H01L2224/16237 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2224/81903 ,  H01L2224/83851 ,  H01L2224/9211 ,  H01L2924/07802 ,  H01L2924/15788 ,  H01L2924/351 ,  H05K1/111 ,  H05K2201/09436 ,  H05K2201/09709 ,  H05K2201/09745 ,  H05K2201/09909 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

Abstract: A wiring substrate (11) includes: a substrate; and, formed upon the substrate, a plurality of wiring lines, a plurality of circuit elements, and a plurality of connecting terminals (51) connected via the plurality of wiring lines. Each of the plurality of connecting terminals (51) includes a pair of protrusion parts (50), forming a depression part (60) between the pair of protrusion parts (50), and a depression electrode (52) that is disposed in the depression part (60) and that at least partially covers each protrusion of the pair of protrusion parts (50).

Abstract translation: 布线基板（11）包括：基板; 并且在所述基板上形成有多条布线，多个电路元件以及经由所述多根布线连接的多个连接端子（51）。 多个连接端子（51）中的每一个包括在一对突出部（50）之间形成有凹部（60）的一对突出部（50），设置在该凹部 部分（60）并且至少部分地覆盖所述一对突出部分（50）中的每个突起。