公开(公告)号：US20190288123A1

公开(公告)日：2019-09-19

申请号：US16353548

申请日：2019-03-14

申请人： EMBERION OY

发明人： Sami KALLIOINEN ,  Helena POHJONEN

IPC分类号： H01L29/812 ,  H01L23/528 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423 ,  H01L29/10 ,  H01L27/095 ,  H01L27/146 ,  H01L29/66 ,  H01L29/40

摘要： A MESFET transistor on a horizontal substrate surface with at least one wiring layer on the substrate surface. The transistor comprises source, drain and gate electrodes which are at least partly covered by a semiconducting channel layer. The source, drain and gate electrodes optionally comprise interface contact materials for changing the junction type between each electrode and the channel. The interface between the source electrode and the channel is an ohmic junction, the interface between the drain electrode and the channel is an ohmic junction, and the interface between the gate electrode and the channel is a Schottky junction. The substrate is a CMOS substrate.

公开(公告)号：US10381489B2

公开(公告)日：2019-08-13

申请号：US15764426

申请日：2016-09-27

申请人： NATIONAL UNIVERSITY CORPORATION HOKKAIDO UNIVERSITY ,  JAPAN SCIENCE AND TECHNOLOGY AGENCY

发明人： Takashi Fukui ,  Katsuhiro Tomioka

IPC分类号： H01L29/786 ,  H01L29/66 ,  H01L29/778 ,  H01L29/78 ,  H01L27/095 ,  H01L29/808 ,  H01L29/812 ,  H01L29/06 ,  H01L29/04 ,  H01L29/205

摘要： The tunnel field effect transistor according to the present invention has: a channel; a source electrode connected directly or indirectly to one end of the channel; a drain electrode connected directly or indirectly to the other end of the channel; and a gate electrode for causing an electric field to act on the channel, generating a tunnel phenomenon at the source electrode-side joint part of the channel, and simultaneously generating a two-dimensional electron gas in the channel.

公开(公告)号：US20190237574A1

公开(公告)日：2019-08-01

申请号：US16250367

申请日：2019-01-17

申请人： DENSO CORPORATION

发明人： Toshinori MARUYAMA

IPC分类号： H01L29/78 ,  H02M1/08 ,  H02K19/36 ,  H02K11/04 ,  H01L27/02 ,  H01L27/095 ,  H01L29/872

摘要： A rectifier has a rectification circuit configured to rectify multi-phase alternating current generated by a rotating electric machine into direct current. The rectifier includes upper-arm semiconductor switching elements included in an upper arm of the rectification circuit, upper-arm protection diodes included in the upper arm and each being electrically connected in parallel with one of the upper-arm semiconductor switching elements, lower-arm semiconductor switching elements included in a lower arm of the rectification circuit, and lower-arm protection diodes included in the lower arm and each being electrically connected in parallel with one of the lower-arm semiconductor switching elements. Each of the upper-arm and lower-arm protection diodes is configured to have, when a reverse voltage higher than a breakdown voltage of the protection diode is applied to the protection diode, an operating resistance that is higher than three times an operating resistance of any of the upper-arm and lower-arm semiconductor switching elements.

公开(公告)号：US20190051649A1

公开(公告)日：2019-02-14

申请号：US16161956

申请日：2018-10-16

申请人： SONY CORPORATION

发明人： MASAHIRO MITSUNAGA

IPC分类号： H01L27/095 ,  H01L41/25 ,  H01L41/08 ,  H01L29/778 ,  H01L21/8252 ,  H01L29/10 ,  H01L29/66 ,  H01L21/28 ,  H01L29/205

摘要： A semiconductor device includes a buffer layer formed with a semiconductor adapted to produce piezoelectric polarization, and a channel layer stacked on the buffer layer, wherein a two-dimensional hole gas, generated in the channel layer by piezoelectric polarization of the buffer layer, is used as a carrier of the channel layer. On a complementary semiconductor device, the semiconductor device described above and an n-type field effect transistor are formed on the same compound semiconductor substrate. Also, a level shift circuit is manufactured by using the semiconductor device. Further, a semiconductor device manufacturing method includes forming a compound semiconductor base portion, forming a buffer layer on the base portion, forming a channel layer on the buffer layer, forming a gate on the channel layer, and forming a drain and source with the gate therebetween on the channel layer.

公开(公告)号：US20180374943A1

公开(公告)日：2018-12-27

申请号：US15628932

申请日：2017-06-21

申请人： Cree, Inc.

发明人： Yueying Liu ,  Saptharishi Sriram ,  Scott Sheppard

IPC分类号： H01L29/778 ,  H01L29/06 ,  H01L29/423 ,  H01L29/20 ,  H01L27/095 ,  H01L21/8252 ,  H01L29/66 ,  H01L21/326 ,  H01L29/205

摘要： A semiconductor device includes a plurality of unit cell transistors on a common semiconductor structure, the unit cell transistors electrically connected in parallel, and each unit cell transistor including a respective gate finger. Respective threshold voltages of first and second of the unit cell transistors differ by at least 0.1 volts and/or threshold voltages of first and second segments of a third of the unit cell transistors differ by at least 0.1 volts.

公开(公告)号：US09966945B2

公开(公告)日：2018-05-08

申请号：US15212126

申请日：2016-07-15

申请人： Panasonic Corporation

发明人： Shinji Ujita ,  Hiroshi Inada ,  Tatsuo Morita

IPC分类号： H03B1/00 ,  H03K3/00 ,  H03K17/687 ,  H01L29/778 ,  H01L27/095 ,  H01L27/098 ,  H01L29/20 ,  H01L27/088 ,  H01L23/482 ,  H01L23/00 ,  H03K17/0412 ,  H03K17/16 ,  H01L27/06 ,  H02M3/158 ,  H01L23/522 ,  H01L29/417 ,  H01L29/10

CPC分类号： H03K17/6871 ,  H01L23/4824 ,  H01L23/5226 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L27/0605 ,  H01L27/0883 ,  H01L27/095 ,  H01L27/098 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/7786 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/06051 ,  H01L2224/06177 ,  H01L2224/131 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/13055 ,  H01L2924/13091 ,  H02M3/158 ,  H02M3/1588 ,  H03K17/04123 ,  H03K17/162 ,  H03K17/6877 ,  H03K2017/6875 ,  H03K2217/0063 ,  H03K2217/0072 ,  Y02B70/1466 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2924/014

摘要： A semiconductor device is provided which realizes speed-up and cost reduction. The semiconductor device has a high side gate driver including a depression type FET and an enhancement type FET, a low side gate driver including a depression type FET and an enhancement type FET, and a high side power FET and a low side power FET as field-effect transistors, in which the high side gate driver, the low side gate driver, the high side power FET and the low side power FET are integrated in the same chip.

公开(公告)号：US09966491B2

公开(公告)日：2018-05-08

申请号：US15049743

申请日：2016-02-22

申请人： University of South Carolina

发明人： MVS Chandrashekhar ,  Tangali S. Sudarshan ,  Sabih U. Omar ,  Gabriel Brown ,  Shamaita S. Shetu

IPC分类号： H01L27/095 ,  H01L31/11 ,  H01L31/028 ,  H01L31/0224 ,  H01L31/18

CPC分类号： H01L31/1105 ,  H01L31/022408 ,  H01L31/028 ,  H01L31/1804 ,  Y02E10/547

摘要： A bi-polar device is provided, along with methods of making the same. The bi-polar device can include a semiconductor substrate doped with a first dopant, a semiconductor layer on the first surface of the semiconductor substrate, and a Schottky barrier layer on the semiconductor layer. The method of forming a bi-polar device can include: forming a semiconductor layer on a first surface of a semiconductor substrate, where the semiconductor substrate comprises a first dopant and where the semiconductor layer comprises a second dopant that has an opposite polarity than the first dopant; and forming a Schottky barrier layer on a first portion of the semiconductor layer while leaving a second portion of the semiconductor layer exposed.

公开(公告)号：US20180090476A1

公开(公告)日：2018-03-29

申请号：US15681721

申请日：2017-08-21

申请人： FUJITSU LIMITED

发明人： Youichi KAMADA

IPC分类号： H01L27/02 ,  H01L27/095 ,  H01L29/40 ,  H01L29/778 ,  H01L21/8232 ,  H01L29/66 ,  H01L29/417 ,  H03F3/213 ,  H03F1/30 ,  H02M5/458

CPC分类号： H01L27/0211 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/0272 ,  H01L21/0274 ,  H01L21/8232 ,  H01L27/0248 ,  H01L27/095 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/207 ,  H01L29/402 ,  H01L29/404 ,  H01L29/41758 ,  H01L29/41775 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/7787 ,  H02M1/4225 ,  H02M3/33592 ,  H02M3/337 ,  H02M5/458 ,  H02M7/003 ,  H02M2001/007 ,  H03F1/306 ,  H03F1/3247 ,  H03F3/195 ,  H03F3/213 ,  H03F3/245 ,  H03F2200/451 ,  Y02B70/126 ,  Y02B70/1475

摘要： A compound semiconductor device includes transistors each including a gate electrode, a source electrode, and a drain electrode, wherein out of the transistors, a transistor whose temperature becomes higher during operation has a higher withstand voltage prior to temperature rise due to the operation.

公开(公告)号：US09899474B2

公开(公告)日：2018-02-20

申请号：US15617342

申请日：2017-06-08

申请人： Alpha and Omega Semiconductor Incorporated

发明人： Hamza Yilmaz ,  Xiaobin Wang ,  Anup Bhalla ,  John Chen ,  Hong Chang

IPC分类号： H01L27/095 ,  H01L29/47 ,  H01L29/812 ,  H01L31/07 ,  H01L29/74 ,  H01L31/111 ,  H01L29/08 ,  H01L29/66 ,  H01L29/40 ,  H01L29/739 ,  H01L29/78 ,  H01L29/861 ,  H01L29/872 ,  H01L21/265 ,  H01L27/06 ,  H01L29/06 ,  H01L29/10

CPC分类号： H01L29/0886 ,  H01L21/26586 ,  H01L27/0623 ,  H01L27/0629 ,  H01L27/0664 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0676 ,  H01L29/0688 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0865 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/365 ,  H01L29/402 ,  H01L29/404 ,  H01L29/41741 ,  H01L29/41775 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66136 ,  H01L29/66143 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7803 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/861 ,  H01L29/8613 ,  H01L29/872 ,  H01L29/8725

摘要： Semiconductor devices includes a thin epitaxial layer (nanotube) formed on sidewalls of mesas formed in a semiconductor layer. In one embodiment, a semiconductor device includes a first semiconductor layer, a second semiconductor layer formed thereon and of the opposite conductivity type, and a first epitaxial layer formed on mesas of the second semiconductor layer. An electric field along a length of the first epitaxial layer is uniformly distributed.

公开(公告)号：US09818692B2

公开(公告)日：2017-11-14

申请号：US15078023

申请日：2016-03-23

申请人： GaN Systems Inc.

发明人： John Roberts ,  Greg P. Klowak ,  Cameron McKnight-MacNeil

IPC分类号： H01L23/528 ,  H01L21/66 ,  H01L27/095 ,  H01L29/40 ,  H01L29/778 ,  H01L23/373 ,  H01L29/20 ,  H01L29/06 ,  H01L23/36

CPC分类号： H01L23/528 ,  H01L22/32 ,  H01L23/36 ,  H01L23/3737 ,  H01L27/095 ,  H01L29/0619 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/7786

摘要： Devices and systems comprising high current/high voltage GaN semiconductor devices are disclosed. A GaN die, comprising a lateral GaN transistor, is sandwiched between an overlying header and an underlying composite thermal dielectric layer. Fabrication comprises providing a conventional GaN device structure fabricated on a low cost silicon substrate (GaN-on-Si die), mechanically and electrically attaching source, drain and gate contact pads of the GaN-on-Si die to corresponding contact areas of conductive tracks of the header, then entirely removing the silicon substrate. The exposed substrate-surface of the epi-layer stack is coated with the composite dielectric thermal layer. Preferably, the header comprises a ceramic dielectric support layer having a CTE matched to the GaN epi-layer stack. The thermal dielectric layer comprises a high dielectric strength thermoplastic polymer and a dielectric filler having a high thermal conductivity. This structure offers improved electrical breakdown resistance and effective thermal dissipation compared to conventional GaN-on-Si device structures.